The Week Of Monday 4 November 2024 Archives by author
Starting: Mon Nov 4 00:07:41 PST 2024
Ending: Sun Nov 10 23:59:44 PST 2024
Messages: 6223
- [clang] [llvm] Expose format (attribute) info for function declarations in Clang Index API (PR #113754)
AR Visions via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang] Introduce diagnostics suppression mappings (PR #112517)
Aaron Ballman via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang] Introduce diagnostics suppression mappings (PR #112517)
Aaron Ballman via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang] Introduce diagnostics suppression mappings (PR #112517)
Aaron Ballman via llvm-commits
- [clang] [clang-tools-extra] [flang] [lldb] [llvm] [openmp] [pstl] Finally formalise our defacto line-ending policy (PR #86318)
Aaron Ballman via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang] Introduce diagnostics suppression mappings (PR #112517)
Aaron Ballman via llvm-commits
- [clang] [llvm] [Clang] Match MSVC handling of duplicate header search paths in Microsoft compatibility modes. (PR #105738)
Aaron Ballman via llvm-commits
- [clang] [llvm] [Clang] Match MSVC handling of duplicate header search paths in Microsoft compatibility modes. (PR #105738)
Aaron Ballman via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #107493)
Aaron Ballman via llvm-commits
- [clang] [llvm] [Clang] Match MSVC handling of duplicate header search paths in Microsoft compatibility modes. (PR #105738)
Aaron Ballman via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)
Adam Yang via llvm-commits
- [llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)
Adam Yang via llvm-commits
- [llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)
Adam Yang via llvm-commits
- [llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)
Adam Yang via llvm-commits
- [clang] [llvm] [HLSL][SPIRV] Added clamp intrinsic (PR #113394)
Adam Yang via llvm-commits
- [clang] [llvm] [HLSL][SPIRV] Added clamp intrinsic (PR #113394)
Adam Yang via llvm-commits
- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
Adrian Kuegel via llvm-commits
- [llvm] 3c3f19c - Revert "[NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (#114822)"
Adrian Kuegel via llvm-commits
- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
Adrian Kuegel via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
Adrian Prantl via llvm-commits
- [llvm] [DebugInfo] Add an specification_of attribute to LLVM DebugInfo (PR #115362)
Adrian Prantl via llvm-commits
- [llvm] [DebugInfo] Add an specification_of attribute to LLVM DebugInfo (PR #115362)
Adrian Prantl via llvm-commits
- [llvm] [DebugInfo] Add an specification_of attribute to LLVM DebugInfo (PR #115362)
Adrian Prantl via llvm-commits
- [llvm] [DebugInfo] Add an specification_of attribute to LLVM DebugInfo (PR #115362)
Adrian Prantl via llvm-commits
- [lldb] [llvm] [lldb-dap] Support column breakpoints (PR #113787)
Adrian Vogelsgesang via llvm-commits
- [lldb] [llvm] [lldb-dap] Support column breakpoints (PR #113787)
Adrian Vogelsgesang via llvm-commits
- [lldb] [llvm] [lldb-dap] Support column breakpoints (PR #113787)
Adrian Vogelsgesang via llvm-commits
- [lldb] [llvm] [lldb-dap] Support column breakpoints (PR #113787)
Adrian Vogelsgesang via llvm-commits
- [lldb] [llvm] [lldb-dap] Support column breakpoints (PR #113787)
Adrian Vogelsgesang via llvm-commits
- [llvm] [SROA] Fix NumPromoted statistic for SROA pass. (PR #115586)
Afanasyev Ivan via llvm-commits
- [llvm] [SROA] Fix NumPromoted statistic for SROA pass. (PR #115586)
Afanasyev Ivan via llvm-commits
- [llvm] [llvm-exegesis] Use older instructions to load lower vregs (PR #114768)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Use older instructions to load lower vregs (PR #114768)
Aiden Grossman via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
Aiden Grossman via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
Aiden Grossman via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
Aiden Grossman via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
Aiden Grossman via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
Aiden Grossman via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
Aiden Grossman via llvm-commits
- [llvm] [X86] Use proxy scheduler models for bdver3/bdver4 cpus (PR #114873)
Aiden Grossman via llvm-commits
- [llvm] [llvm][llvm-lit] Hide --use-unique-output-file-name from --help (PR #114812)
Aiden Grossman via llvm-commits
- [llvm] [ci] Write test results to unique file names (PR #113160)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add explicit support for setting DF in X86 (PR #115644)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][X86] Groups ports 2, 3, and 11 for Golden Cove (PR #115645)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add explicit support for setting DF in X86 (PR #115644)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][X86] Groups ports 2, 3, and 11 for Golden Cove (PR #115645)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][X86] Groups ports 2, 3, and 11 for Golden Cove (PR #115645)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][X86] Groups ports 2, 3, and 11 for Golden Cove (PR #115645)
Aiden Grossman via llvm-commits
- [clang] [llvm] [OpenMP][Clang] Migrate OpenMP UserDefinedMapper from Clang to OMPIRBuilder (PR #110001)
Akash Banerjee via llvm-commits
- [clang] [llvm] [OpenMP][Clang] Migrate OpenMP UserDefinedMapper from Clang to OMPIRBuilder (PR #110001)
Akash Banerjee via llvm-commits
- [clang] [llvm] [OpenMP][Clang] Migrate OpenMP UserDefinedMapper from Clang to OMPIRBuilder (PR #110001)
Akash Banerjee via llvm-commits
- [clang] [llvm] [OpenMP][Clang] Migrate OpenMP UserDefinedMapper from Clang to OMPIRBuilder (PR #110001)
Akash Banerjee via llvm-commits
- [clang] [llvm] [OpenMP][Clang] Migrate OpenMP UserDefinedMapper from Clang to OMPIRBuilder (PR #110001)
Akash Banerjee via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize SpillPhysVGPRs (PR #113129)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize SpillPhysVGPRs (PR #113129)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU] Fix 3495d04 MIR test (PR #114963)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU] Fix 3495d04 MIR test (PR #114963)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU] Fix 3495d04 MIR test (PR #114963)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Akshat Oke via llvm-commits
- [llvm] [NFC][CodeGen] Clang format MachineSink.cpp (PR #114027)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
Akshat Oke via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
Akshay Kumar via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
Akshay Kumar via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
Akshay Kumar via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
Akshay Kumar via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
Akshay Kumar via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
Akshay Kumar via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Alan Zhao via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Alan Zhao via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Alan Zhao via llvm-commits
- [clang] [llvm] Revert "[X86][AMX] Support AMX-AVX512" (PR #115570)
Alan Zhao via llvm-commits
- [clang] [llvm] Revert "[X86][AMX] Support AMX-AVX512" (PR #115570)
Alan Zhao via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Aleksei Romanov via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [clang] [llvm] [RFC][RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)
Alex Bradbury via llvm-commits
- [llvm] [LegalizeTypes] Support softening FMINIMUM/FMAXIMUM (PR #115463)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] When using global merging, don't enable merging of external globals by default (PR #115484)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Enable global merging by default (PR #115495)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Enable global merging by default (PR #115495)
Alex Bradbury via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Alex Bradbury via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Alex Bradbury via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Alex Bradbury via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Alex Bradbury via llvm-commits
- [llvm] [LegalizeTypes] Support softening FMINIMUM/FMAXIMUM (PR #115463)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] When using global merging, don't enable merging of external globals by default (PR #115484)
Alex Bradbury via llvm-commits
- [clang] [llvm] [RFC][RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)
Alex Bradbury via llvm-commits
- [clang] [llvm] [RFC][RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)
Alex Bradbury via llvm-commits
- [clang] [llvm] [RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)
Alex Bradbury via llvm-commits
- [clang] [llvm] [RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)
Alex Bradbury via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Alex Bradbury via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Alex Bradbury via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Alex Bradbury via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Alex Bradbury via llvm-commits
- [clang] [llvm] [RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)
Alex Bradbury via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
Alex Bradbury via llvm-commits
- [llvm] [NVPTX] Add TTI support for folding isspacep in InferAS (PR #114486)
Alex MacLean via llvm-commits
- [llvm] [NVPTX][docs] Add isspacep.* to usage doc (PR #114839)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Add TTI support for folding isspacep in InferAS (PR #114486)
Alex MacLean via llvm-commits
- [llvm] [NVPTX][docs] Add isspacep.* to usage doc (PR #114839)
Alex MacLean via llvm-commits
- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Emit prmt selection value in hex (PR #115049)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Add TTI support for folding isspacep in InferAS (PR #114486)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Add TTI support for folding isspacep in InferAS (PR #114486)
Alex MacLean via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Add TTI support for folding isspacep in InferAS (PR #114486)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Add TTI support for folding isspacep in InferAS (PR #114486)
Alex MacLean via llvm-commits
- [clang] [llvm] [llvm][opt][Transforms][SPIR-V] Enable `InferAddressSpaces` for SPIR-V (PR #110897)
Alex Voicu via llvm-commits
- [clang] [llvm] [opt][AMDGPU] Add pass to handle AMDGCN pseudo-intrinsics, start with `llvm.amdgcn.wavefrontsize` (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [opt][AMDGPU] Add pass to handle AMDGCN pseudo-intrinsics, start with `llvm.amdgcn.wavefrontsize` (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [clang][llvm][SPIR-V] Explicitly encode native integer widths for SPIR-V (PR #110695)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Alex Voicu via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 support (but still whole register) for reductions (PR #112361)
Alexander Kornienko via llvm-commits
- [compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Reduce build output for tests (PR #115085)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Reduce build output for tests (PR #115085)
Alexander Richardson via llvm-commits
- [compiler-rt] [libc++abi] Stop copying headers to the build directory (PR #115086)
Alexander Richardson via llvm-commits
- [compiler-rt] [libc++abi] Stop copying headers to the build directory (PR #115086)
Alexander Richardson via llvm-commits
- [compiler-rt] [libc++abi] Stop copying headers to the build directory (PR #115086)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
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Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Make add_custom_libcxx() resilient to DESTDIR being set (PR #115525)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Make add_custom_libcxx() resilient to DESTDIR being set (PR #115525)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Make add_custom_libcxx() resilient to DESTDIR being set (PR #115525)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Make add_custom_libcxx() resilient to DESTDIR being set (PR #115525)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Add custom libc++ workaround for CMake < 3.26 (PR #115677)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Make add_custom_libcxx() resilient to DESTDIR being set (PR #115525)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Add custom libc++ workaround for CMake < 3.26 (PR #115677)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Add custom libc++ workaround for CMake < 3.26 (PR #115677)
Alexander Richardson via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Alexander Yermolovich via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Alexandre Ganea via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Alexandros Lamprineas via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Alexandros Lamprineas via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Alexandros Lamprineas via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Alexandros Lamprineas via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Alexandros Lamprineas via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Alexandros Lamprineas via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Alexandros Lamprineas via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Alexandros Lamprineas via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Alexandros Lamprineas via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Alexandros Lamprineas via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Alexandros Lamprineas via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Alexandros Lamprineas via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Alexandros Lamprineas via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Alexandros Lamprineas via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV] Remove feature dgh. (PR #115363)
Alexandros Lamprineas via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV] Remove feature dgh. (PR #115363)
Alexandros Lamprineas via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Alexandros Lamprineas via llvm-commits
- [clang] [llvm] [FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (PR #113281)
Alexandros Lamprineas via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Alexandros Lamprineas via llvm-commits
- [clang] [llvm] [FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (PR #113281)
Alexandros Lamprineas via llvm-commits
- [clang] [llvm] [FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (PR #113281)
Alexandros Lamprineas via llvm-commits
- [clang] [llvm] [FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (PR #113281)
Alexandros Lamprineas via llvm-commits
- [clang] [llvm] [FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (PR #113281)
Alexandros Lamprineas via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Alexandros Lamprineas via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Alexandros Lamprineas via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Alexandros Lamprineas via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Alexandros Lamprineas via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Alexandros Lamprineas via llvm-commits
- [clang] [lldb] [llvm] Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (PR #115539)
Alexandros Lamprineas via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Alexandros Lamprineas via llvm-commits
- [clang] [llvm] [FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (PR #113281)
Alexandros Lamprineas via llvm-commits
- [llvm] a15bf88 - [SLP][NFC]Add a test with missing freeze instruction before reduction, NFC
Alexey Bataev via llvm-commits
- [clang] [flang] [llvm] Enable seq_cst Clause for flush Directive in OpenMP (PR #114072)
Alexey Bataev via llvm-commits
- [llvm] 8993367 - [SLP]Be more pessimistic about poisonous reductions
Alexey Bataev via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support reordered buildvector nodes for better clustering (PR #114284)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 (but still whole register) for remaining nodes (PR #113356)
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] Remove assert because canConvertToMinOrMaxIntrinsic can support vector type. (PR #114946)
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (PR #114965)
Alexey Bataev via llvm-commits
- [llvm] 0c18def - [SLP]Allow interleaving check only if it is less than number of elements
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 support (but still whole register) for reductions (PR #112361)
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] Remove assert because canConvertToMinOrMaxIntrinsic can support vector type. (PR #114946)
Alexey Bataev via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for interleaved loads (PR #112042)
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (PR #114965)
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] Remove assert because canConvertToMinOrMaxIntrinsic can support vector type. (PR #114946)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Enable splat ordering for loads (PR #115173)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support reordered buildvector nodes for better clustering (PR #114284)
Alexey Bataev via llvm-commits
- [llvm] [LV]Enable max safe distance in predicated DataWithEVL vectorization mode. (PR #100755)
Alexey Bataev via llvm-commits
- [llvm] 9f3b6ad - [SLP][NFC]Exit early if the graph is empty, NFC
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 (but still whole register) for remaining nodes (PR #113356)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add cost estimation for gather node reshuffling (PR #115201)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support reordered buildvector nodes for better clustering (PR #114284)
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #114946)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Represent externally used values as original scalars, if profitable. (PR #100904)
Alexey Bataev via llvm-commits
- [llvm] 79fd615 - [SLP][NFC]Add a test with the segmented loads, NFC
Alexey Bataev via llvm-commits
- [llvm] [SLP]Enable interleaved stores support (PR #115354)
Alexey Bataev via llvm-commits
- [llvm] b7a8f5f - [SLP][NFC]Exit early from attempt-to-reorder, if it is useless
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support reordered buildvector nodes for better clustering (PR #114284)
Alexey Bataev via llvm-commits
- [llvm] dec3839 - [SLP][NFC]Add a test with the missed vectorization opportunity for stores with same address
Alexey Bataev via llvm-commits
- [llvm] 62db1c8 - [SLP]Better decision making on whether to try stores packs for vectorization
Alexey Bataev via llvm-commits
- [llvm] [SystemZ] SLP reductions: cost functions of reductions and scalarization (PR #112491)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Use Value instead of template. (PR #115440)
Alexey Bataev via llvm-commits
- [llvm] [LV]Enable max safe distance in predicated DataWithEVL vectorization mode. (PR #100755)
Alexey Bataev via llvm-commits
- [llvm] 77bec78 - [SLP]Do not look for last instruction in schedule block for buildvectors
Alexey Bataev via llvm-commits
- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
Alexey Bataev via llvm-commits
- [llvm] [SystemZ] SLP reductions: cost functions of reductions and scalarization (PR #112491)
Alexey Bataev via llvm-commits
- [llvm] [SystemZ] SLP reductions: cost functions of reductions and scalarization (PR #112491)
Alexey Bataev via llvm-commits
- [llvm] 26a9f3f - [SLP][NFC]Cleanup getSameOpcode, return InstructionsState::invalid() for non-valid inputs
Alexey Bataev via llvm-commits
- [llvm] [libc][bazel] Remove -mllvm --tail-merge-threshold=0 from Bazel. (PR #115061)
Alexey Samsonov via llvm-commits
- [llvm] [libc][bazel] Mark socket functions weak (PR #115088)
Alexey Samsonov via llvm-commits
- [llvm] [libc][bazel] Mark socket functions weak (PR #115088)
Alexey Samsonov via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Alfie Richards via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Alfie Richards via llvm-commits
- [llvm] [GlobalISel] Check the correct register in sextload OneUse check. (PR #114763)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Amara Emerson via llvm-commits
- [llvm] [AArch64][SVE2] Add pattern for constructive EXT instruction. (PR #115047)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Remove references to rhs of shufflevector if rhs is undef (PR #115076)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Remove references to rhs of shufflevector if rhs is undef (PR #115076)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Remove references to rhs of shufflevector if rhs is undef (PR #115076)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Remove references to rhs of shufflevector if rhs is undef (PR #115076)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Remove references to rhs of shufflevector if rhs is undef (PR #115076)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Remove references to rhs of shufflevector if rhs is undef (PR #115076)
Amara Emerson via llvm-commits
- [llvm] [AArch64][SVE2] Add pattern for constructive EXT instruction. (PR #115047)
Amara Emerson via llvm-commits
- [llvm] [AArch64][SVE2] Add pattern for constructive EXT instruction. (PR #115047)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Amara Emerson via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Allow G_SEXT_INREG patterns to be imported. (PR #115576)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add G_STEP_VECTOR instruction (PR #115598)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add G_STEP_VECTOR instruction (PR #115598)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add G_STEP_VECTOR instruction (PR #115598)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add G_STEP_VECTOR instruction (PR #115598)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add G_STEP_VECTOR instruction (PR #115598)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add G_STEP_VECTOR instruction (PR #115598)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Do not create LIFETIME instructions in functions. (PR #115669)
Amara Emerson via llvm-commits
- [llvm] [BOLT] Set call to continuation count in pre-aggregated profile (PR #109486)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Set call to continuation count in pre-aggregated profile (PR #109486)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Set call to continuation count in pre-aggregated profile (PR #109486)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Set call to continuation count in pre-aggregated profile (PR #109486)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Set call to continuation count in pre-aggregated profile (PR #109486)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Set call to continuation count in pre-aggregated profile (PR #109486)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)
Amir Ayupov via llvm-commits
- [clang] [compiler-rt] [libc] [lld] [lldb] [llvm] [mlir] [BOLT] Match blocks with pseudo probes (PR #99891)
Amir Ayupov via llvm-commits
- [clang] [compiler-rt] [libc] [lld] [lldb] [llvm] [mlir] [BOLT] Match blocks with pseudo probes (PR #99891)
Amir Ayupov via llvm-commits
- [clang] [compiler-rt] [libc] [lld] [lldb] [llvm] [mlir] [BOLT] Match blocks with pseudo probes (PR #99891)
Amir Ayupov via llvm-commits
- [llvm] [PowerPC] Utilize getReservedRegs to find asm clobberable registers. (PR #107863)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
Amy Kwan via llvm-commits
- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
Amy Kwan via llvm-commits
- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
Amy Kwan via llvm-commits
- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Use setbc for values from vector compare conditions (PR #114858)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Use setbc for values from vector compare conditions (PR #114858)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Use setbc for values from vector compare conditions (PR #114858)
Amy Kwan via llvm-commits
- [llvm] [PowerPC] Use setbc for values from vector compare conditions (PR #114858)
Amy Kwan via llvm-commits
- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
Amy Kwan via llvm-commits
- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
Amy Kwan via llvm-commits
- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
Amy Kwan via llvm-commits
- [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #113214)
Amy Kwan via llvm-commits
- [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #113214)
Amy Kwan via llvm-commits
- [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #113214)
Amy Kwan via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Anatoly Trosinenko via llvm-commits
- [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)
Anchu Rajendran S via llvm-commits
- [llvm] llvm-mca: Disentangle `MemoryGroup` from `LSUnitBase` (PR #114159)
Andrea Di Biagio via llvm-commits
- [llvm] [NFC] Fix test for zext(shl(trunc)) fold (PR #113778)
Andreas Jonson via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Andrei Safronov via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Andrei Safronov via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Andrei Safronov via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Andrei Safronov via llvm-commits
- [llvm] [docs] Update docs on code-review process (PR #111735)
Andrzej Warzyński via llvm-commits
- [llvm] [docs] Update docs on code-review process (PR #111735)
Andrzej Warzyński via llvm-commits
- [llvm] [mlir] andrzej/extend vector to llvm test 9 (PR #115335)
Andrzej Warzyński via llvm-commits
- [llvm] [mlir] andrzej/disable flat transpose scalable (PR #115338)
Andrzej Warzyński via llvm-commits
- [llvm] [mlir] andrzej/disable flat transpose scalable (PR #115338)
Andrzej Warzyński via llvm-commits
- [llvm] [mlir] Fix nested codeowners for vector dialect (PR #115473)
Andrzej Warzyński via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Anshil Gandhi via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Anshil Gandhi via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Anshil Gandhi via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Anshil Gandhi via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Anshil Gandhi via llvm-commits
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- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
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- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
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- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
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- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
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- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
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- [clang] [llvm] [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (PR #112084)
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- [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)
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- [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)
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- [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)
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- [llvm] [RISCV] Change vector tuple type's TypeSize to scalable (PR #114329)
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- [llvm] [RISCV] Change vector tuple type's TypeSize to scalable (PR #114329)
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- [clang] [llvm] [RISCV] Support `svukte` extension (PR #115657)
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- [lld] draft: [lld] Add thunks for hexagon (PR #111217)
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- [lld] [lld] Add thunks for hexagon (PR #111217)
Brian Cain via llvm-commits
- [llvm] [AMDGPU][True16][MC] FLAT load/store supporting fake16 format (PR #114500)
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- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
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- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
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- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
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- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
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- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
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- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
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- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
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- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
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- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
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- [llvm] [AMDGPU][True16][MC] VOP2 update instructions with fake16 format (PR #114436)
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- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
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- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
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- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] FLAT load/store supporting true16 (PR #114500)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] update true16 flag on vinterp test (PR #115356)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] update true16 flag on vinterp test (PR #115356)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] update true16 flag on vinterp test (PR #115356)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] update true16 flag on vinterp test (PR #115356)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] update true16 flag on vinterp test (PR #115356)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Brox Chen via llvm-commits
- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
Bruno De Fraine via llvm-commits
- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
Bruno De Fraine via llvm-commits
- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
Bruno De Fraine via llvm-commits
- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
Bruno De Fraine via llvm-commits
- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
Bruno De Fraine via llvm-commits
- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
Bruno De Fraine via llvm-commits
- [lld] [lld][MachO] Respect dylibs linked with `-allowable_client` (PR #114638)
Carlo Cabrera via llvm-commits
- [llvm] [llvm][docs]: update links to `clang-format-diff.py` and `git-clang-format` (PR #114646)
Carlo Cabrera via llvm-commits
- [llvm] [llvm][docs]: update links to `clang-format-diff.py` and `git-clang-format` (PR #114646)
Carlo Cabrera via llvm-commits
- [lld] [lld][MachO] Respect dylibs linked with `-allowable_client` (PR #114638)
Carlo Cabrera via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Fix crash with thread local storage. (PR #113904)
Carlos Alberto Enciso via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Fix crash with thread local storage. (PR #113904)
Carlos Alberto Enciso via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Fix crash with thread local storage. (PR #113904)
Carlos Alberto Enciso via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Fix crash with thread local storage. (PR #113904)
Carlos Alberto Enciso via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Use "countMaxActiveBits() <= 5" to define uint5Bits (PR #115543)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Use "countMaxActiveBits() <= 5" to define uint5Bits (PR #115543)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Use "countMaxActiveBits() <= 5" to define uint5Bits (PR #115543)
Changpeng Fang via llvm-commits
- [llvm] [llvm-mca] Add optional identifier field to mca::Instruction (PR #97867)
Chinmay Deshpande via llvm-commits
- [llvm] [llvm-mca] Add optional identifier field to mca::Instruction (PR #97867)
Chinmay Deshpande via llvm-commits
- [compiler-rt] [rtsan] Added mmap and shm interceptors (PR #114862)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Added mmap and shm interceptors (PR #114862)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Added mmap and shm interceptors (PR #114862)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Added mmap and shm interceptors (PR #114862)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan][NFC] Remove some unneeded headers, make guards more obvious (PR #114911)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] NFC: Simplify 64 file offset naming in unit tests (PR #114908)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan][NFC] Remove some unneeded headers, make guards more obvious (PR #114911)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Add I/O multiplexing interceptors (PR #115227)
Chris Apple via llvm-commits
- [compiler-rt] [rtsan] Add I/O multiplexing interceptors (PR #115227)
Chris Apple via llvm-commits
- [llvm] [DirectX] Add @bogner as DX backend maintainer (PR #114872)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Chris B via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Chris B via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Chris B via llvm-commits
- [llvm] [SYCL][LLVM] Adding property set I/O library for SYCL (PR #110771)
Chris B via llvm-commits
- [clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)
Chris Copeland via llvm-commits
- [clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)
Chris Copeland via llvm-commits
- [clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)
Chris Copeland via llvm-commits
- [llvm] [AMDGPU] Improve isBasicBlockPrologue to only add necessary instructions (PR #113303)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU][NFC] Precommit tests representing agpr spills. (PR #115270)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU][NFC] Precommit tests representing agpr spills. (PR #115270)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU][NFC] Precommit tests representing agpr spills. (PR #115270)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Christudasan Devadasan via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Christudasan Devadasan via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Chuanqi Xu via llvm-commits
- [llvm] [Coroutines] Inline the `.noalloc` ramp function marked coro_safe_elide (PR #114004)
Chuanqi Xu via llvm-commits
- [llvm] [Coroutines] Respect noinline attributes when eliding heap allocation (PR #115384)
Chuanqi Xu via llvm-commits
- [llvm] [Baze] Add missing lldbDataFormatter.py back to BUILD.bazel. (PR #115519)
Connor Gray via llvm-commits
- [llvm] Set shader analysis flags EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Cooper Partin via llvm-commits
- [llvm] Set shader analysis flags EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Cooper Partin via llvm-commits
- [llvm] Set shader analysis flags EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Cooper Partin via llvm-commits
- [llvm] Set shader analysis flag EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Cooper Partin via llvm-commits
- [llvm] Set shader analysis flag EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Cooper Partin via llvm-commits
- [llvm] Set shader analysis flag EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Cooper Partin via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Corentin Ferry via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Remove unneeded assert from SelectionDAG::getSignedConstant. NFC (PR #114336)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Remove unneeded assert from SelectionDAG::getSignedConstant. NFC (PR #114336)
Craig Topper via llvm-commits
- [llvm] [RISCV] Allow undef elements in isDeinterleaveShuffle (PR #114585)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [RISCV] Lower fixed-length strided VP loads and stores for zvfhmin/zvfbfmin (PR #114750)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use integer VTypeInfo predicate for vmv_v_v_vl pattern (PR #114915)
Craig Topper via llvm-commits
- [llvm] [RISCV] Handle zvfhmin/zvfbfmin in lowerVECTOR_SHUFFLEAsVSlide1 (PR #114925)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)
Craig Topper via llvm-commits
- [llvm] [RISCV] Lower fixed-length bf16 vector bitcasts (PR #114938)
Craig Topper via llvm-commits
- [llvm] [SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (PR #114943)
Craig Topper via llvm-commits
- [llvm] [RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (PR #114945)
Craig Topper via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Craig Topper via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Craig Topper via llvm-commits
- [llvm] [SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (PR #114943)
Craig Topper via llvm-commits
- [llvm] [SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (PR #114943)
Craig Topper via llvm-commits
- [llvm] [RISCV] Update latency of MUL & CPOP in SiFive P600's scheduling model (PR #115042)
Craig Topper via llvm-commits
- [llvm] e566ae8 - [RISCV][GISel] Remove s32 support for G_ABS on RV64.
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use boolean predicated legalization action methods to simplify code. NFC (PR #115063)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add load/store clustering in post machine schedule (PR #111504)
Craig Topper via llvm-commits
- [llvm] db21dbd - [RISCV][GISel] Add constant_fold_cast_op to RISCVPostLegalizerCombiner.
Craig Topper via llvm-commits
- [llvm] [LegalizeVectorTypes] Allow non-undef vectors when widening insert_subvector op (PR #115110)
Craig Topper via llvm-commits
- [llvm] cbc7812 - [RISCV] Add Zdinx RUN line to rv64d-double-convert.ll. NFC
Craig Topper via llvm-commits
- [llvm] f427004 - [RISCV] Add Zfinx/Zdinx RUN lines to rv64d-double-convert-strict.ll and rv64f-float-convert-strict.ll. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Add test cases for RV64 i128<->half/float/double (PR #115124)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Implement zexti32/zexti16 ComplexPatterns. (PR #115097)
Craig Topper via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add test cases for RV64 i128<->half/float/double (PR #115124)
Craig Topper via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
Craig Topper via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
Craig Topper via llvm-commits
- [llvm] cff2199 - Revert "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add test cases for RV64 i128<->half/float/double (PR #115124)
Craig Topper via llvm-commits
- [llvm] b57cbbc - [RISCV][GISel] Improve fptos/ui and s/uitofp handling and testing.
Craig Topper via llvm-commits
- [llvm] [GISel][RISCV][AMDGPU] Add G_SHL, G_LSHR, G_ASHR to binop_left_to_zero. (PR #115089)
Craig Topper via llvm-commits
- [llvm] 21ded66 - [RISCV][GISel] Add zexti8 ComplexPattern.
Craig Topper via llvm-commits
- [llvm] [GISel][RISCV][AMDGPU] Add G_SHL, G_LSHR, G_ASHR to binop_left_to_zero. (PR #115089)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GISel][RISCV][AMDGPU] Add G_SHL, G_LSHR, G_ASHR to binop_left_to_zero. (PR #115089)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Craig Topper via llvm-commits
- [llvm] [RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal interleaved access (PR #115257)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Craig Topper via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (PR #115268)
Craig Topper via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Craig Topper via llvm-commits
- [llvm] [RISCV] Skip DAG combine for bitcast fabs/fneg (PR #115325)
Craig Topper via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Craig Topper via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Craig Topper via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Craig Topper via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Craig Topper via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Craig Topper via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Craig Topper via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Craig Topper via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (PR #115107)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (PR #115107)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (PR #115107)
Craig Topper via llvm-commits
- [llvm] 200afcf - [RISCV] Add combines_for_extload to RISCVPostLegalizerCombiner.
Craig Topper via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add fcopysign tests with mismatched types. (PR #115364)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add fcopysign tests with mismatched types. NFC (PR #115364)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Craig Topper via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Craig Topper via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (PR #115107)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (PR #115268)
Craig Topper via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (PR #115268)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add G_ZEXT to RISCVInstructionSelector::selectZExtBits. (PR #115391)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add fcopysign tests with mismatched types. NFC (PR #115364)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (PR #115268)
Craig Topper via llvm-commits
- [llvm] [RISCV] Only allow 5 bit shift amounts in disassembler for RV32. (PR #115432)
Craig Topper via llvm-commits
- [llvm] [RISCV] Only allow 5 bit shift amounts in disassembler for RV32. (PR #115432)
Craig Topper via llvm-commits
- [llvm] [RISCV] Only allow 5 bit shift amounts in disassembler for RV32. (PR #115432)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve vmsge and vmsgeu selection (PR #115435)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve vmsge and vmsgeu selection (PR #115435)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve vmsge and vmsgeu selection (PR #115435)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve vmsge and vmsgeu selection (PR #115435)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Craig Topper via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Craig Topper via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Craig Topper via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Craig Topper via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Craig Topper via llvm-commits
- [llvm] 17f3e00 - Recommit "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"
Craig Topper via llvm-commits
- [llvm] 5005f8d - [RISCV] Add sub_to_add to RISCVPostLegalizerCombiner.
Craig Topper via llvm-commits
- [llvm] [RISCV][DAG][TLI] Avoid scalarizing length decreasing shuffles (PR #115532)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Craig Topper via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
Craig Topper via llvm-commits
- [llvm] 62a7bb0 - [RISCV][GISel] Resolve CHECK prefix conflict and add a bunch of FIXMEs to bitmanip tests. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
Craig Topper via llvm-commits
- [llvm] ff98efa - [RISCV][GISel] Enable shift_immed_chain in RISCVPostLegalizerCombiner
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
Craig Topper via llvm-commits
- [llvm] [RISCV] RVA23S64 should include H extension (PR #115572)
Craig Topper via llvm-commits
- [llvm] [RISCV] RVA23S64 should include H extension (PR #115572)
Craig Topper via llvm-commits
- [llvm] 60ea60e - [RISCV] Fix some isel patterns that used a type where we normally put a regclass. NFC
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64] Allow G_SEXT_INREG patterns to be imported. (PR #115576)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Allow G_SEXT_INREG patterns to be imported. (PR #115576)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Allow G_SEXT_INREG patterns to be imported. (PR #115576)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Use the 'B' extension in RISC-V profile definitions (PR #113942)
Craig Topper via llvm-commits
- [llvm] 38b0e1c - [RISCV][GISel] Add legalizer-info-validation test. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use boolean predicated legalization action methods to remove a custom lambda. (PR #115628)
Craig Topper via llvm-commits
- [llvm] [RISCV] Change vector tuple type's TypeSize to scalable (PR #114329)
Craig Topper via llvm-commits
- [llvm] [RISCV] Change vector tuple type's TypeSize to scalable (PR #114329)
Craig Topper via llvm-commits
- [llvm] [RISCV] Change vector tuple type's TypeSize to scalable (PR #114329)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Use boolean predicated legalization action methods to remove a custom lambda. (PR #115628)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
Craig Topper via llvm-commits
- [llvm] [GlobalISel] Add G_STEP_VECTOR instruction (PR #115598)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Don't call markAllIdxsAsCovered from minScalarSameAs/maxScalarSameAs. (PR #115637)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Don't call markAllIdxsAsCovered from minScalarSameAs/maxScalarSameAs. (PR #115637)
Craig Topper via llvm-commits
- [llvm] Zext sext undef in sdag (PR #115451)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Don't call markAllIdxsAsCovered from minScalarSameAs/maxScalarSameAs. (PR #115637)
Craig Topper via llvm-commits
- [llvm] [Statepoint] Treat result of atomicrmw xchg as a base pointer (PR #97280)
Csanád Hajdú via llvm-commits
- [llvm] [Statepoint] Treat result of atomicrmw xchg as a base pointer (PR #97280)
Csanád Hajdú via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Cyndy Ishida via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
Damyan Pepper via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
Damyan Pepper via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
Damyan Pepper via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
Damyan Pepper via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
Damyan Pepper via llvm-commits
- [llvm] [HLSL] Update tests to use splat for vector constants (PR #115198)
Damyan Pepper via llvm-commits
- [llvm] add QuietMisdreavus to Clang/ExtractAPI code owners (PR #115206)
Daniel Grumberg via llvm-commits
- [lld] [PAC][lld] Test warning emitted for non-PAuth-marked files with `-z pac-plt` (PR #112958)
Daniel Kiss via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Daniel Kiss via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Daniel Kiss via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Daniel Kiss via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Daniel Kiss via llvm-commits
- [clang] [llvm] Add ifunc support for Windows on AArch64. (PR #111962)
Daniel Kiss via llvm-commits
- [clang] [llvm] Add ifunc support for Windows on AArch64. (PR #111962)
Daniel Kiss via llvm-commits
- [llvm] [llvm][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, _sptr, __uptr (PR #112793)
Daniel Paoliello via llvm-commits
- [llvm] [llvm][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, _sptr, __uptr (PR #112793)
Daniel Paoliello via llvm-commits
- [llvm] Fix Arm64EC name mangling algorithm (PR #115567)
Daniel Paoliello via llvm-commits
- [llvm] [llvm][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, _sptr, __uptr (PR #112793)
Daniel Paoliello via llvm-commits
- [llvm] [llvm][aarch64] Fix Arm64EC name mangling algorithm (PR #115567)
Daniel Paoliello via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
Daniel Thornburgh via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
Daniel Thornburgh via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
Daniel Thornburgh via llvm-commits
- [llvm] [X86] Recognize POP/ADD/SUB modifying rsp in getSPAdjust. (PR #114265)
Daniel Zabawa via llvm-commits
- [clang] [llvm] [PAC][ELF][AArch64] Support signed personality function pointer (PR #113148)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Test warning emitted for non-PAuth-marked files with `-z pac-plt` (PR #112958)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Test warning emitted for non-PAuth-marked files with `-z pac-plt` (PR #112958)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Test warning emitted for non-PAuth-marked files with `-z pac-plt` (PR #112958)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed GOT (PR #113815)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed GOT (PR #113815)
Daniil Kovalev via llvm-commits
- [llvm] [PAC][CodeGen][ELF][AArch64] Support signed GOT with tiny code model (PR #114525)
Daniil Kovalev via llvm-commits
- [llvm] [PAC][llvm-readobj][ELF][AArch64] Define static AUTH TLSDESC relocations (PR #113716)
Daniil Kovalev via llvm-commits
- [llvm] [PAC][llvm-readobj][ELF][AArch64] Define static AUTH TLSDESC relocations (PR #113716)
Daniil Kovalev via llvm-commits
- [llvm] [PAC][CodeGen][ELF][AArch64] Support signed TLSDESC (PR #113813)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed GOT (PR #113815)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Daniil Kovalev via llvm-commits
- [llvm] [AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (PR #110705)
Daniil Kovalev via llvm-commits
- [clang] [llvm] [Loads] Check context instruction for context-sensitive derefability (PR #109277)
Danila Malyutin via llvm-commits
- [clang] [llvm] [Loads] Check context instruction for context-sensitive derefability (PR #109277)
Danila Malyutin via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
David Blaikie via llvm-commits
- [llvm] Add clang::lifetimebound annotation to llvm::function_ref (PR #115019)
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- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
David Blaikie via llvm-commits
- [lldb] [llvm] [DebugInfo] Add explicit visibility macros to CodeView template functions (PR #113102)
David Blaikie via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
David Blaikie via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
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- [llvm] [DebugInfo] Add an specification_of attribute to LLVM DebugInfo (PR #115362)
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- [llvm] [DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (PR #110276)
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- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
David Blaikie via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
David Blaikie via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
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David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
David CARLIER via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
David Green via llvm-commits
- [llvm] 263775c - [AArch64] Extend and cleanup load.ll test. NFC
David Green via llvm-commits
- [llvm] [llvm][AsmPrinter] Add an option to print instruction latencies (PR #113243)
David Green via llvm-commits
- [llvm] [GlobalISel] Check the correct register in OneUse check. (PR #114763)
David Green via llvm-commits
- [llvm] [GlobalISel] Check the correct register in sextload OneUse check. (PR #114763)
David Green via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
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David Green via llvm-commits
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David Green via llvm-commits
- [llvm] [AArch64] Disconnect FeatureUseScalarIncVL from FeatureSVE2. (PR #114568)
David Green via llvm-commits
- [llvm] [AArch64] Disconnect FeatureUseScalarIncVL from FeatureSVE2. (PR #114568)
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- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
David Green via llvm-commits
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- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
David Green via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Green via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Green via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Green via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Green via llvm-commits
- [llvm] [GlobalISel] Check the correct register in sextload OneUse check. (PR #114763)
David Green via llvm-commits
- [llvm] 1e9d068 - [AArch64] Add extra fma+extract test cases. NFC
David Green via llvm-commits
- [llvm] [AArch64] Add tablegen patterns for fmla index with extract 0. (PR #114976)
David Green via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
David Green via llvm-commits
- [llvm] [ARM] Add early-clobber to MVE VCMLA.f32 (PR #114995)
David Green via llvm-commits
- [llvm] [AArch64] Improve mull generation (PR #114997)
David Green via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
David Green via llvm-commits
- [llvm] [AArch64] Disconnect FeatureUseScalarIncVL from FeatureSVE2. (PR #114568)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
David Green via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
David Green via llvm-commits
- [llvm] 3d4d033 - [AArch64][Arm] Add nested double reduction tests. NFC
David Green via llvm-commits
- [llvm] [AArch64] Add missing ASIMD FP convert instructions to scheduling model (PR #115146)
David Green via llvm-commits
- [llvm] [AArch64] Disconnect FeatureUseScalarIncVL from FeatureSVE2. (PR #114568)
David Green via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
David Green via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
David Green via llvm-commits
- [llvm] [DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (PR #115150)
David Green via llvm-commits
- [llvm] [LLVM][ARM] Latency mutations for cortex m55, m7 and m85 (PR #115153)
David Green via llvm-commits
- [llvm] [AArch64][SVE2] Lower read-after-write mask to whilerw (PR #114028)
David Green via llvm-commits
- [llvm] [AArch64][SVE2] Lower read-after-write mask to whilerw (PR #114028)
David Green via llvm-commits
- [llvm] [AArch64][SVE2] Lower read-after-write mask to whilerw (PR #114028)
David Green via llvm-commits
- [llvm] [IR][Attributes] Take "best" from Callbase/Call Function when getting attributes (PR #112985)
David Green via llvm-commits
- [llvm] [DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (PR #115150)
David Green via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
David Green via llvm-commits
- [llvm] [DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (PR #115150)
David Green via llvm-commits
- [llvm] [GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (PR #115377)
David Green via llvm-commits
- [llvm] [GlobalISel] Remove unused includes (NFC) (PR #115429)
David Green via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Green via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
David Green via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
David Green via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
David Green via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
David Green via llvm-commits
- [llvm] ab9178e - [ARM] Add a couple of new MVE reduction tests. NFC
David Green via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
David Green via llvm-commits
- [llvm] [SelectOpt] Support ADD and SUB with zext operands. (PR #115489)
David Green via llvm-commits
- [llvm] [SelectOpt] Support ADD and SUB with zext operands. (PR #115489)
David Green via llvm-commits
- [llvm] [GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (PR #115377)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
David Green via llvm-commits
- [llvm] [AArch64] Add tablegen patterns for fmla index with extract 0. (PR #114976)
David Green via llvm-commits
- [llvm] [AArch64] Add tablegen patterns for fmla index with extract 0. (PR #114976)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
David Green via llvm-commits
- [llvm] ccc9d7d - [GlobalISel][AArch64] Update and extend ptradd.ll test. NFC
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
David Green via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
David Green via llvm-commits
- [llvm] [AArch64/GISel] Remove unused includes (NFC) (PR #115636)
David Green via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Green via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Green via llvm-commits
- [llvm] [AArch64] Disconnect FeatureUseScalarIncVL from FeatureSVE2. (PR #114568)
David Green via llvm-commits
- [llvm] 1d6d073 - [AArch64] Remove FeatureUseScalarIncVL
David Green via llvm-commits
- [llvm] c8f3373 - [AArch64] Rewrite arm64-ext.ll test and cleanup. NFC
David Green via llvm-commits
- [llvm] 91a48e0 - [AArch64][GlobalISel] Implicitly truncate APInt in matchExt combine.
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Do not create LIFETIME instructions in functions. (PR #115669)
David Green via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
David Neto via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
David Peixotto via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
David Peixotto via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
David Peixotto via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
David Peixotto via llvm-commits
- [llvm] Extend LLVM Offloading API for binary fatbin Bundles (PR #114833)
David Salinas via llvm-commits
- [llvm] Extend llvm objdump fatbin (PR #114834)
David Salinas via llvm-commits
- [llvm] [VPlan] Refine the debug location passing for VPWidenIntrinsicRecipe (PR #113887)
David Sherwood via llvm-commits
- [llvm] [LV][NFC] Simplify initialization of MinProfitableTripCount (PR #113445)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
David Sherwood via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Sherwood via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Sherwood via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Sherwood via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Sherwood via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Sherwood via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
David Sherwood via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
David Sherwood via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
David Sherwood via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
David Sherwood via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
David Sherwood via llvm-commits
- [llvm] [LV] Ignore some costs when loop gets fully unrolled (PR #106699)
David Sherwood via llvm-commits
- [llvm] [LV] Ignore some costs when loop gets fully unrolled (PR #106699)
David Sherwood via llvm-commits
- [llvm] [LV] Ignore some costs when loop gets fully unrolled (PR #106699)
David Sherwood via llvm-commits
- [llvm] [LV] Ignore some costs when loop gets fully unrolled (PR #106699)
David Sherwood via llvm-commits
- [llvm] [LV] Ignore some costs when loop gets fully unrolled (PR #106699)
David Sherwood via llvm-commits
- [llvm] [LV] Ignore some costs when loop gets fully unrolled (PR #106699)
David Sherwood via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Add cost of generating tail-folding mask to the loop (PR #90191)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Add cost of generating tail-folding mask to the loop (PR #90191)
David Sherwood via llvm-commits
- [llvm] [DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (PR #115150)
David Sherwood via llvm-commits
- [llvm] [AArch64] Improve mull generation (PR #114997)
David Sherwood via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Add initial support to VPRegionBlock for multiple successors (PR #108563)
David Sherwood via llvm-commits
- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Sherwood via llvm-commits
- [llvm] [SelectionDAG] Add support for extending masked loads in computeKnownBits (PR #115450)
David Sherwood via llvm-commits
- [lldb] [llvm] [LLDB] Add a target.launch-working-dir setting (PR #113521)
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- [lldb] [llvm] [LLDB] Add a target.launch-working-dir setting (PR #113521)
David Spickett via llvm-commits
- [lldb] [llvm] [LLDB] Add a target.launch-working-dir setting (PR #113521)
David Spickett via llvm-commits
- [lldb] [llvm] [LLDB] Add a target.launch-working-dir setting (PR #113521)
David Spickett via llvm-commits
- [lldb] [llvm] [LLDB] Add a target.launch-working-dir setting (PR #113521)
David Spickett via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
David Spickett via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
David Spickett via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
David Spickett via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
David Spickett via llvm-commits
- [llvm] [llvm][llvm-lit] Hide --use-unique-output-file-name from --help (PR #114812)
David Spickett via llvm-commits
- [llvm] [llvm][llvm-lit] Hide --use-unique-output-file-name from --help (PR #114812)
David Spickett via llvm-commits
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David Spickett via llvm-commits
- [llvm] [ci] New script to generate test reports as Buildkite Annotations (PR #113447)
David Spickett via llvm-commits
- [llvm] [ci] New script to generate test reports as Buildkite Annotations (PR #113447)
David Spickett via llvm-commits
- [llvm] [ci] Write test results to unique file names (PR #113160)
David Spickett via llvm-commits
- [llvm] [ci] New script to generate test reports as Buildkite Annotations (PR #113447)
David Spickett via llvm-commits
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David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
- [llvm] [docs] Expand HowToAddABuilder with guidance on testing locally (PR #115024)
David Spickett via llvm-commits
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David Spickett via llvm-commits
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David Spickett via llvm-commits
- [llvm] [RuntimeDyld] Add LoongArch support (PR #114741)
David Spickett via llvm-commits
- [llvm] [RuntimeDyld] Add LoongArch support (PR #114741)
David Spickett via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
David Spickett via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
David Spickett via llvm-commits
- [llvm] [WebAssembly] Fix unwind mismatches in new EH (PR #114361)
Derek Schuff via llvm-commits
- [llvm] [WebAssembly] Fix rethrow's index calculation (PR #114693)
Derek Schuff via llvm-commits
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Derek Schuff via llvm-commits
- [llvm] [WebAssembly] Fix rethrow's index calculation (PR #114693)
Derek Schuff via llvm-commits
- [llvm] [WebAssembly] Fix rethrow's index calculation (PR #114693)
Derek Schuff via llvm-commits
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Derek Schuff via llvm-commits
- [llvm] [AMDGPU] Clarify amdgpu.cs.chain + init whole wave. NFC (PR #115452)
Diana Picus via llvm-commits
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- [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)
Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)
Durgadoss R via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)
Durgadoss R via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)
Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)
Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)
Durgadoss R via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor copy intrinsics (PR #96083)
Durgadoss R via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor prefetch intrinsics (PR #115527)
Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
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Durgadoss R via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor prefetch intrinsics (PR #115527)
Durgadoss R via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
Eli Friedman via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
Eli Friedman via llvm-commits
- [llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
Eli Friedman via llvm-commits
- [llvm] [ARM] Fix CMSE S->NS calls when CONTROL_S.SFPA==0 (CVE-2024-7883) (PR #114433)
Eli Friedman via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Eli Friedman via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Eli Friedman via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Eli Friedman via llvm-commits
- [llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
Eli Friedman via llvm-commits
- [llvm] [GlobalOpt] Handle operators separately when removing GV users (PR #84694)
Eli Friedman via llvm-commits
- [llvm] [SDAG] Only apply sincos/frexp stack slot folding to IR pointers (PR #115346)
Eli Friedman via llvm-commits
- [llvm] [SDAG] Only apply sincos/frexp stack slot folding to IR pointers (PR #115346)
Eli Friedman via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Eli Friedman via llvm-commits
- [llvm] [llvm][aarch64] Fix Arm64EC name mangling algorithm (PR #115567)
Eli Friedman via llvm-commits
- [llvm] [BranchFolding] Remove getBranchDebugLoc() (PR #114613)
Ellis Hoag via llvm-commits
- [llvm] [IfConversion] Preserve debug info when flipping a branch (PR #114614)
Ellis Hoag via llvm-commits
- [llvm] [IfConversion] Preserve debug info when flipping a branch (PR #114614)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Ellis Hoag via llvm-commits
- [llvm] [MachineSink] Sink into consistent blocks for optsize funcs (PR #115367)
Ellis Hoag via llvm-commits
- [llvm] [CodeLayout] Do not flip branch condition when using optsize (PR #114607)
Ellis Hoag via llvm-commits
- [llvm] [CodeLayout] Do not flip branch condition when using optsize (PR #114607)
Ellis Hoag via llvm-commits
- [clang] [llvm] Reland [clang][AArch64] Add getHostCPUFeatures to query for enabled f… (PR #115467)
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- [clang] [llvm] Reland [clang][AArch64] Add getHostCPUFeatures to query for enabled f… (PR #115467)
Elvina Yakubova via llvm-commits
- [llvm] [RISCV][TTI] Implement instruction cost for vp.reduce.* (PR #114184)
Elvis Wang via llvm-commits
- [llvm] [LV] Fix missing precomptueCosts() in emitInvalidCostRemarks(). (PR #114918)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [RISCV][TTI] Implement instruction cost for vp.reduce.* (PR #114184)
Elvis Wang via llvm-commits
- [llvm] [RISCV][TTI] Implement instruction cost for vp.reduce.* (PR #114184)
Elvis Wang via llvm-commits
- [llvm] [LV] Fix missing precomptueCosts() in emitInvalidCostRemarks(). (PR #114918)
Elvis Wang via llvm-commits
- [llvm] [RISCV][TTI] Add vp.fneg intrinsic cost with functionalOP (PR #114378)
Elvis Wang via llvm-commits
- [llvm] [RISCV][Test] Add test for vp float arithmetic ops. NFC (PR #114516)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] [LV] Fix missing precomptueCosts() in emitInvalidCostRemarks(). (PR #114918)
Elvis Wang via llvm-commits
- [llvm] [RISCV][TTI] Implement instruction cost for vp.reduce.* (PR #114184)
Elvis Wang via llvm-commits
- [llvm] [CMake] Enable CMP0156 if available (PR #115046)
Evan Wilde via llvm-commits
- [llvm] [CMake] Enable CMP0156 if available (PR #115046)
Evan Wilde via llvm-commits
- [llvm] [X86] Insert CALLSEQ when lowering GlobalTLSAddress for ELF targets (PR #113706)
Fabian Ritter via llvm-commits
- [llvm] [X86] Insert CALLSEQ when lowering GlobalTLSAddress for ELF targets (PR #113706)
Fabian Ritter via llvm-commits
- [llvm] [X86] Insert CALLSEQ when lowering GlobalTLSAddress for ELF targets (PR #113706)
Fabian Ritter via llvm-commits
- [llvm] [CodeGen] Compute call frame sizes instead of storing them in MachineBBs (PR #106964)
Fabian Ritter via llvm-commits
- [lld] [ELF] Add context-aware diagnostic functions (PR #112319)
Fangrui Song via llvm-commits
- [llvm] [MC] Remove dead code. (PR #114798)
Fangrui Song via llvm-commits
- [clang] [compiler-rt] [XRay][AArch64] Support -fxray-shared (PR #114431)
Fangrui Song via llvm-commits
- [llvm] [Analysis] Remove unused includes (NFC) (PR #114936)
Fangrui Song via llvm-commits
- [lld] [ELF] Add context-aware diagnostic functions (PR #112319)
Fangrui Song via llvm-commits
- [lld] 63c6fe4 - [ELF] Replace fatal(...) with Fatal or Err
Fangrui Song via llvm-commits
- [lld] 09c2c5e - [ELF] Replace error(...) with ErrAlways or Err
Fangrui Song via llvm-commits
- [lld] f8bae3a - [ELF] Replace warn(...) with Warn
Fangrui Song via llvm-commits
- [lld] 9b058bb - [ELF] Replace errorOrWarn(...) with Err
Fangrui Song via llvm-commits
- [lld] ed6c106 - [ELF] Replace errorCount with errCount(ctx)
Fangrui Song via llvm-commits
- [lld] c13258a - [ELF] Replace log with Log(ctx)
Fangrui Song via llvm-commits
- [lld] [lld] Add thunks for hexagon (PR #111217)
Fangrui Song via llvm-commits
- [lld] [lld] Add thunks for hexagon (PR #111217)
Fangrui Song via llvm-commits
- [lld] [lld] Add thunks for hexagon (PR #111217)
Fangrui Song via llvm-commits
- [lld] [lld] Add thunks for hexagon (PR #111217)
Fangrui Song via llvm-commits
- [lld] [lld] Add thunks for hexagon (PR #111217)
Fangrui Song via llvm-commits
- [lld] [lld] Add thunks for hexagon (PR #111217)
Fangrui Song via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
Fangrui Song via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
Fangrui Song via llvm-commits
- [clang] [compiler-rt] Reapply "[XRay][AArch64] Support -fxray-shared (#114431)" (PR #115300)
Fangrui Song via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Fangrui Song via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Fangrui Song via llvm-commits
- [llvm] [ObjectYAML][ELF] Allow verdaux entry offset to be user-defined (PR #115343)
Fangrui Song via llvm-commits
- [llvm] [RelocationResolver][Xtensa] Implement R_XTENSA_32 (PR #96311)
Fangrui Song via llvm-commits
- [llvm] [ADT] Mark reverse and concat as nodiscard (PR #115611)
Fangrui Song via llvm-commits
- [llvm] [Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (PR #115623)
Fangrui Song via llvm-commits
- [lld] [PAC][lld] Test warning emitted for non-PAuth-marked files with `-z pac-plt` (PR #112958)
Fangrui Song via llvm-commits
- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
Fangrui Song via llvm-commits
- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
Fangrui Song via llvm-commits
- [llvm] 7111d03 - [Xtensa] Fix Clang -Wundefined-bool-conversion after #113450
Fangrui Song via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Fangrui Song via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Fangrui Song via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Farzon Lotfi via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Farzon Lotfi via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Farzon Lotfi via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Farzon Lotfi via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [llvm] [Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (PR #113637)
Farzon Lotfi via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Farzon Lotfi via llvm-commits
- [clang] [compiler-rt] [XRay][AArch64] Support -fxray-shared (PR #114431)
Felipe de Azevedo Piovezan via llvm-commits
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Felipe de Azevedo Piovezan via llvm-commits
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Felipe de Azevedo Piovezan via llvm-commits
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Felipe de Azevedo Piovezan via llvm-commits
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Felipe de Azevedo Piovezan via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
Felipe de Azevedo Piovezan via llvm-commits
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- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Feng Zou via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Feng Zou via llvm-commits
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Feng Zou via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Feng Zou via llvm-commits
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Feng Zou via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Feng Zou via llvm-commits
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Feng Zou via llvm-commits
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Feng Zou via llvm-commits
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Feng Zou via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Feng Zou via llvm-commits
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Feng Zou via llvm-commits
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Feng Zou via llvm-commits
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Feng Zou via llvm-commits
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Feng Zou via llvm-commits
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Feng Zou via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Feng Zou via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Feng Zou via llvm-commits
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Feng Zou via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower WaveActiveCountBits intrinsic (PR #113382)
Finn Plummer via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower WaveActiveCountBits intrinsic (PR #113382)
Finn Plummer via llvm-commits
- [clang] [llvm] Inbelic/as double (PR #114847)
Finn Plummer via llvm-commits
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Finn Plummer via llvm-commits
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Finn Plummer via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][DXIL] Implement `asdouble` intrinsic (PR #114847)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][DXIL] Implement `asdouble` intrinsic (PR #114847)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][DXIL] Implement `asdouble` intrinsic (PR #114847)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][DXIL] Implement `asdouble` intrinsic (PR #114847)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][DXIL] Implement `asdouble` intrinsic (PR #114847)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [llvm] [NFC][Scalarizer][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (PR #114849)
Finn Plummer via llvm-commits
- [llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [llvm] [HLSL] Update tests to use splat for vector constants (PR #115198)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Finn Plummer via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
Finn Plummer via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (PR #113382)
Finn Plummer via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Finn Plummer via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (PR #113382)
Finn Plummer via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (PR #113382)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Use `Op[S|U]Dot` when possible for integer dot product (PR #115095)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Use `Op[S|U]Dot` when possible for integer dot product (PR #115095)
Finn Plummer via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (PR #113382)
Finn Plummer via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (PR #113382)
Finn Plummer via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (PR #113382)
Finn Plummer via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Finn Plummer via llvm-commits
- [llvm] [LV][NFC] Simplify initialization of MinProfitableTripCount (PR #113445)
Florian Hahn via llvm-commits
- [llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Refine the debug location passing for VPWidenIntrinsicRecipe (PR #113887)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Refine the debug location passing for VPWidenIntrinsicRecipe (PR #113887)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Suppress leak in test (PR #114624)
Florian Hahn via llvm-commits
- [llvm] [DebugInfo][LoopVectorizer] Avoid dropping !dbg in optimizeForVFAndUF (PR #114243)
Florian Hahn via llvm-commits
- [llvm] [DebugInfo][LoopVectorizer] Avoid dropping !dbg in optimizeForVFAndUF (PR #114243)
Florian Hahn via llvm-commits
- [llvm] [DebugInfo][LoopVectorizer] Avoid dropping !dbg in optimizeForVFAndUF (PR #114243)
Florian Hahn via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Florian Hahn via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Florian Hahn via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Florian Hahn via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Florian Hahn via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Florian Hahn via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Florian Hahn via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Florian Hahn via llvm-commits
- [llvm] [LV] Add initial support for vectorizing literal struct return values (PR #109833)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] 596fd10 - [VPlan] Share logic to connect predecessors in VPBB/VPIRBB execute (NFC)
Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
- [llvm] [LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (PR #113126)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)
Florian Hahn via llvm-commits
- [llvm] [LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (PR #113126)
Florian Hahn via llvm-commits
- [llvm] [LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (PR #113126)
Florian Hahn via llvm-commits
- [llvm] [LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (PR #113126)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [LV] Make having flags (FMFs etc) not require inheriting VPSingleDefRecipe (PR #114972)
Florian Hahn via llvm-commits
- [llvm] [LV] Make having flags (FMFs etc) not require inheriting VPSingleDefRecipe (PR #114972)
Florian Hahn via llvm-commits
- [llvm] [LV] Make having flags (FMFs etc) not require inheriting VPSingleDefRecipe (PR #114972)
Florian Hahn via llvm-commits
- [llvm] [LV] Make having flags (FMFs etc) not require inheriting VPSingleDefRecipe (PR #114972)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
Florian Hahn via llvm-commits
- [llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)
Florian Hahn via llvm-commits
- [llvm] [LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (PR #113126)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] 231e03b - [AArch64] Add select-opt test with select transformed to cast.
Florian Hahn via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Florian Hahn via llvm-commits
- [llvm] [SelectOpt] Support add and sub with zext operands. (PR #115489)
Florian Hahn via llvm-commits
- [llvm] [SelectOpt] Support ADD and SUB with zext operands. (PR #115489)
Florian Hahn via llvm-commits
- [llvm] [SelectOpt] Support ADD and SUB with zext operands. (PR #115489)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Florian Hahn via llvm-commits
- [llvm] 144bdf3 - [VPlan] Also check if plan for best legacy VF contains simplifications.
Florian Hahn via llvm-commits
- [llvm] [LV] Fix missing precomptueCosts() in emitInvalidCostRemarks(). (PR #114918)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
- [llvm] 8a7a7b5 - [VPlan] Remove unneeded code connecting blocks in VPBB:splitAt (NFC).
Florian Hahn via llvm-commits
- [llvm] 8833a44 - [VPlan] Connect scalar header to CFG in VPlan unit test.
Florian Hahn via llvm-commits
- [llvm] 1aff96b - [InstCombine] Add extra tests for preserving load metadata.
Florian Hahn via llvm-commits
- [llvm] 7ac62f3 - [InstCombine] Add load/select test with noundef/invariant.load.
Florian Hahn via llvm-commits
- [llvm] [InstCombine] Preserve metadata from orig load in select fold. (PR #115605)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] 95eeae1 - [VPlan] Add PredIdx and SuccIdx arguments to connectBlocks (NFC).
Florian Hahn via llvm-commits
- [llvm] ccb40b0 - [VPlan] Add insertOnEdge to VPBlockUtils (NFC).
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [Vectorize] Simplify code with DenseMap::operator[] (NFC) (PR #115635)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Introduce VPScalarPHIRecipe, use for can & EVL IV codegen (NFC). (PR #114305)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Introduce VPScalarPHIRecipe, use for can & EVL IV codegen (NFC). (PR #114305)
Florian Hahn via llvm-commits
- [llvm] a5a1612 - [VPlan] Consistently use DEBUG_TYPE loop-vectorize.
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Compute induction end values in VPlan. (PR #112145)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Delay adding canonical IV increment. (PR #82270)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Compute induction end values in VPlan. (PR #112145)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update scalar induction resume values in VPlan. (PR #110577)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Florian Hahn via llvm-commits
- [compiler-rt] [rtsan] Added mmap and shm interceptors (PR #114862)
Florian Mayer via llvm-commits
- [compiler-rt] [rtsan][NFC] Remove some unneeded headers, make guards more obvious (PR #114911)
Florian Mayer via llvm-commits
- [compiler-rt] [rtsan] NFC: Simplify 64 file offset naming in unit tests (PR #114908)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt] Include stdlib.h for exit() (PR #115025)
Florian Mayer via llvm-commits
- [compiler-rt] [nfc][tsan] Eliminate a few macros (PR #114931)
Florian Mayer via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt] Destroy pthread attrs after use in tests (PR #114923)
Florian Mayer via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
Florian Mayer via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
Florian Mayer via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
Florian Mayer via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
Florian Mayer via llvm-commits
- [clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)
Gang Chen via llvm-commits
- [clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)
Gang Chen via llvm-commits
- [llvm] [AMDGPU] fix build error unused-var (PR #115199)
Gang Chen via llvm-commits
- [llvm] [AMDGPU] fix build error unused-var (PR #115199)
Gang Chen via llvm-commits
- [llvm] [NVPTX][docs] Add isspacep.* to usage doc (PR #114839)
Gautam Chakrabarti via llvm-commits
- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
George Stagg via llvm-commits
- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
George Stagg via llvm-commits
- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
George Stagg via llvm-commits
- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
George Stagg via llvm-commits
- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
George Stagg via llvm-commits
- [llvm] [BOLT] Enable cross compilation of runtime libraries (PR #101180)
Gergely Bálint via llvm-commits
- [llvm] [RISCV] Correct fcopysign pattern for zdinx (PR #114954)
Gergely Futo via llvm-commits
- [llvm] [RISCV] Correct fcopysign pattern for zdinx (PR #114954)
Gergely Futo via llvm-commits
- [llvm] [RISCV] Correct fcopysign pattern for zdinx (PR #114954)
Gergely Futo via llvm-commits
- [llvm] [RISCV] Correct fcopysign pattern for zdinx (PR #114954)
Gergely Futo via llvm-commits
- [llvm] [RISCV] Skip DAG combine for bitcast fabs/fneg (PR #115325)
Gergely Futo via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Gil Rapaport via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
Graham Hunter via llvm-commits
- [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)
Graham Hunter via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Graham Hunter via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Graham Hunter via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
Greg Bedwell via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
Greg Bedwell via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [llvm] [DirectX] Eliminate resource global variables from module (PR #114105)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Greg Roth via llvm-commits
- [llvm] [polly] [llvm][ConstraintElimination]Insert ConditionFact into loop header in case of monotonic induction variables (PR #112080)
Grigory Pastukhov via llvm-commits
- [llvm] [polly] [llvm][ConstraintElimination]Insert ConditionFact into loop header in case of monotonic induction variables (PR #112080)
Grigory Pastukhov via llvm-commits
- [llvm] [polly] [llvm][ConstraintElimination]Insert ConditionFact into loop header in case of monotonic induction variables (PR #112080)
Grigory Pastukhov via llvm-commits
- [llvm] [libc][bazel] Remove -mllvm --tail-merge-threshold=0 from Bazel. (PR #115061)
Guillaume Chatelet via llvm-commits
- [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
Han Qi via llvm-commits
- [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
Han Qi via llvm-commits
- [clang] [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
Han Qi via llvm-commits
- [llvm] [SLP][REVEC] Remove assert because canConvertToMinOrMaxIntrinsic can support vector type. (PR #114946)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (PR #114965)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Remove assert because canConvertToMinOrMaxIntrinsic can support vector type. (PR #114946)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #114946)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (PR #114965)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #114946)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Use Value instead of template. (PR #115440)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
Han-Kuan Chen via llvm-commits
- [llvm] 546066e - Fix DIBuilder::createVariantPart after f6617d65e496
Hans Wennborg via llvm-commits
- [llvm] [llvm-exegesis][X86] Groups ports 2, 3, and 11 for Golden Cove (PR #115645)
Haohai Wen via llvm-commits
- [llvm] [llvm-exegesis][X86] Groups ports 2, 3, and 11 for Golden Cove (PR #115645)
Haohai Wen via llvm-commits
- [llvm] [llvm-exegesis][X86] Groups ports 2, 3, and 11 for Golden Cove (PR #115645)
Haohai Wen via llvm-commits
- [llvm] Fix a dangling reference in FunctionRefTest.cpp (PR #114949)
Haojian Wu via llvm-commits
- [llvm] Fix a dangling reference in FunctionRefTest.cpp (PR #114949)
Haojian Wu via llvm-commits
- [llvm] Add clang::lifetimebound annotation to llvm::function_ref (PR #115019)
Haojian Wu via llvm-commits
- [llvm] Add clang::lifetimebound annotation to llvm::function_ref (PR #115019)
Haojian Wu via llvm-commits
- [llvm] Add clang::lifetimebound annotation to llvm::function_ref (PR #115019)
Haojian Wu via llvm-commits
- [llvm] [symbolizer] Change the ErrorHandler from llvm::function_ref to std::function. (PR #115477)
Haojian Wu via llvm-commits
- [llvm] [symbolizer] Change the ErrorHandler from llvm::function_ref to std::function. (PR #115477)
Haojian Wu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [FunctionAttrs] Add the "initializes" attribute inference (PR #97373)
Haopeng Liu via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
Harald van Dijk via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
Harald van Dijk via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
Harald van Dijk via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
Harald van Dijk via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
Harald van Dijk via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
Harald van Dijk via llvm-commits
- [llvm] [Inliner] Prevent adding pointer attributes to non-pointer arguments (PR #115569)
Harald van Dijk via llvm-commits
- [llvm] [Inliner] Prevent adding pointer attributes to non-pointer arguments (PR #115569)
Harald van Dijk via llvm-commits
- [llvm] [Inliner] Prevent adding pointer attributes to non-pointer arguments (PR #115569)
Harald van Dijk via llvm-commits
- [llvm] [Inliner] Prevent adding pointer attributes to non-pointer arguments (PR #115569)
Harald van Dijk via llvm-commits
- [llvm] [Inliner] Prevent adding pointer attributes to non-pointer arguments (PR #115569)
Harald van Dijk via llvm-commits
- [llvm] [FuncSpec] Handle ssa_copy intrinsic calls in InstCostVisitor (PR #114247)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Improve handling of Comparison Instructions (PR #114073)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Improve handling of BinaryOperator instructions (PR #114534)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Hari Limaye via llvm-commits
- [llvm] [LV]: Teach LV to recursively (de)interleave. (PR #89018)
Hassnaa Hamdi via llvm-commits
- [llvm] [LV]: Teach LV to recursively (de)interleave. (PR #89018)
Hassnaa Hamdi via llvm-commits
- [llvm] [LV]: Teach LV to recursively (de)interleave. (PR #89018)
Hassnaa Hamdi via llvm-commits
- [llvm] [WebAssembly] Fix unwind mismatches in new EH (PR #114361)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Fix unwind mismatches in new EH (PR #114361)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Fix rethrow's index calculation (PR #114693)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Fix rethrow's index calculation (PR #114693)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Fix rethrow's index calculation (PR #114693)
Heejin Ahn via llvm-commits
- [llvm] [DirectX] Update DXIL op codes for annotateHandle and createHandleFromBinding to match the spec and DXC (PR #114473)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Helena Kotas via llvm-commits
- [llvm] [Offload] Add MPI Proxy Plugin (PR #114574)
Hervé Yviquel via llvm-commits
- [libcxxabi] [llvm] Enable demangling of `cp` expression production (PR #114882)
Hubert Tong via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Hubert Tong via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Hubert Tong via llvm-commits
- [libcxxabi] [llvm] Enable demangling of `cp` expression production (PR #114882)
Hubert Tong via llvm-commits
- [libcxxabi] [llvm] Enable demangling of `cp` expression production (PR #114882)
Hubert Tong via llvm-commits
- [clang] [llvm] [clang] Implement pragma clang section on COFF targets (PR #112714)
Hubert Tong via llvm-commits
- [clang] [llvm] [clang] Implement pragma clang section on COFF targets (PR #112714)
Hubert Tong via llvm-commits
- [clang] [llvm] [clang] Implement pragma clang section on COFF targets (PR #112714)
Hubert Tong via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Hubert Tong via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Hubert Tong via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Hubert Tong via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Hubert Tong via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Hubert Tong via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Hubert Tong via llvm-commits
- [llvm] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Hugh Delaney via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Hugh Delaney via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Ian Anderson via llvm-commits
- [clang] [llvm] [clang-format] Add CI check confirming ClangFormatStyleOptions.rst is up-to-date. (PR #111513)
Iuri Chaer via llvm-commits
- [clang] [llvm] [clang-format] Add CI check confirming ClangFormatStyleOptions.rst is up-to-date. (PR #111513)
Iuri Chaer via llvm-commits
- [clang] [llvm] [clang-format] Add CI check confirming ClangFormatStyleOptions.rst is up-to-date. (PR #111513)
Iuri Chaer via llvm-commits
- [clang] [llvm] [clang-format] Add CI check confirming ClangFormatStyleOptions.rst is up-to-date. (PR #111513)
Iuri Chaer via llvm-commits
- [clang] [llvm] [clang-format] Add new cmake target, `clang-format-style-options`, for updating ClangFormatStyleOptions.rst. (PR #111513)
Iuri Chaer via llvm-commits
- [clang] [llvm] [clang-format] Add new cmake target, `clang-format-style-options`, for updating ClangFormatStyleOptions.rst. (PR #111513)
Iuri Chaer via llvm-commits
- [llvm] [MC] Remove dead code. (PR #114798)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Ivan Kosarev via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Fix crash with thread local storage. (PR #113904)
J. Ryan Stinnett via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Fix crash with thread local storage. (PR #113904)
J. Ryan Stinnett via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
J. Ryan Stinnett via llvm-commits
- [lld] [LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (PR #114466)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (PR #114466)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (PR #114466)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (PR #114466)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add support for locally imported EC symbols (PR #114985)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add support for locally imported EC symbols (PR #114985)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add support for locally imported EC symbols (PR #114985)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Append a terminator entry to redirection metadata (PR #115202)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Append a terminator entry to redirection metadata (PR #115202)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Append a terminator entry to redirection metadata (PR #115202)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Append a terminator entry to redirection metadata (PR #115202)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use correct machine types in PDB records on ARM64EC (PR #115309)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use correct machine types in PDB records on ARM64EC (PR #115309)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use correct machine types in PDB records on ARM64EC (PR #115309)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use correct machine types in PDB records on ARM64EC (PR #115309)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (PR #115474)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (PR #115474)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (PR #115474)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (PR #115474)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (PR #115474)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (PR #115474)
Jacek Caban via llvm-commits
- [llvm] [llvm][aarch64] Fix Arm64EC name mangling algorithm (PR #115567)
Jacek Caban via llvm-commits
- [llvm] [BOLT] Ignore AArch64 markers outside their sections. (PR #74106)
Jacob Bramley via llvm-commits
- [llvm] [BOLT] Ignore AArch64 markers outside their sections. (PR #74106)
Jacob Bramley via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Jake Egan via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Jake Egan via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Jake Egan via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Jake Egan via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Jake Egan via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Jake Egan via llvm-commits
- [llvm] [PowerPC] Add error for incorrect use of memory operands (PR #114277)
Jake Egan via llvm-commits
- [llvm] Fix a dangling reference in FunctionRefTest.cpp (PR #114949)
Jakub Kuderski via llvm-commits
- [llvm] Revert "Add clang::lifetimebound annotation to llvm::function_ref (#1… (PR #115376)
Jakub Kuderski via llvm-commits
- [llvm] [mlir] Fix nested codeowners for vector dialect (PR #115473)
Jakub Kuderski via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Jakub Kuderski via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Jakub Kuderski via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Jakub Kuderski via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Jakub Kuderski via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Jakub Kuderski via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Mark reverse and concat as nodiscard (PR #115611)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Mark reverse and concat as nodiscard (PR #115611)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Mark reverse and concat as nodiscard (PR #115611)
Jakub Kuderski via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115681)
Jakub Kuderski via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add codegen support for partial reduction lowering to wide add instructions (PR #114406)
James Chesterman via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
James Henderson via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
James Henderson via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
James Henderson via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
James Henderson via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
James Henderson via llvm-commits
- [llvm] [llvm-symbolizer] Improve error messages for filter symbolization failure (PR #114649)
James Henderson via llvm-commits
- [llvm] [llvm][llvm-lit] Hide --use-unique-output-file-name from --help (PR #114812)
James Henderson via llvm-commits
- [llvm] [llvm][llvm-lit] Hide --use-unique-output-file-name from --help (PR #114812)
James Henderson via llvm-commits
- [llvm] [llvm-readobj] Use heterogenous lookups with std::map (NFC) (PR #114929)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
James Henderson via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
James Henderson via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
James Henderson via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
James Henderson via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
James Henderson via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
James Henderson via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
James Henderson via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
James Henderson via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
James Henderson via llvm-commits
- [llvm] [symbolizer] Change the ErrorHandler from llvm::function_ref to std::function. (PR #115477)
James Henderson via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
Jan Patrick Lehr via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
Jan Patrick Lehr via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
Jan Patrick Lehr via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
Jan Patrick Lehr via llvm-commits
- [llvm] [github] Document the process for requesting the CI/CD role (PR #115321)
Jan Patrick Lehr via llvm-commits
- [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #112403)
Jan Patrick Lehr via llvm-commits
- [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #112403)
Jan Patrick Lehr via llvm-commits
- [llvm] [AMDGPU] Change scope of resource usage info symbols (PR #114810)
Janek van Oirschot via llvm-commits
- [llvm] [AMDGPU] Fix resource usage information for unnamed functions (PR #115320)
Janek van Oirschot via llvm-commits
- [llvm] [AMDGPU] Change scope of resource usage info symbols (PR #114810)
Janek van Oirschot via llvm-commits
- [llvm] [AMDGPU] Fix resource usage information for unnamed functions (PR #115320)
Janek van Oirschot via llvm-commits
- [llvm] Reapply [AMDGPU] Avoid resource propagation for recursion through multiple functions (PR #112251)
Janek van Oirschot via llvm-commits
- [llvm] Reapply [AMDGPU] Avoid resource propagation for recursion through multiple functions (PR #112251)
Janek van Oirschot via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Janis Heims via llvm-commits
- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
Janis Heims via llvm-commits
- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
Janis Heims via llvm-commits
- [llvm] [M68k] allow 16-bit registers for MOVE to/from CCR (PR #107591)
Janis Heims via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Jay Foad via llvm-commits
- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
Jay Foad via llvm-commits
- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
Jay Foad via llvm-commits
- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
Jay Foad via llvm-commits
- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)
Jay Foad via llvm-commits
- [llvm] [CodeGen] Compute call frame sizes instead of storing them in MachineBBs (PR #106964)
Jay Foad via llvm-commits
- [llvm] [TableGen] Fix concatenation of subreg and artificial subregs (PR #114391)
Jay Foad via llvm-commits
- [llvm] [TableGen] Fix concatenation of subreg and artificial subregs (PR #114391)
Jay Foad via llvm-commits
- [clang] [lld] [llvm] [mlir] [llvm-project] Fix typo "propogate" (PR #114795)
Jay Foad via llvm-commits
- [llvm] [IR] Disallow recursive types (PR #114799)
Jay Foad via llvm-commits
- [llvm] [IR] Disallow recursive types (PR #114799)
Jay Foad via llvm-commits
- [clang] [lld] [llvm] [mlir] [llvm-project] Fix typo "propogate" (PR #114795)
Jay Foad via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Jay Foad via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
Jay Foad via llvm-commits
- [llvm] KnownBits: generalize high-bits of mul to overflows (PR #114211)
Jay Foad via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
Jay Foad via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Jay Foad via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Jay Foad via llvm-commits
- [llvm] [LLVM] Change Intrinsic::ID to encode target and intrinsic index (PR #113576)
Jay Foad via llvm-commits
- [llvm] [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (PR #114992)
Jay Foad via llvm-commits
- [llvm] bce08d8 - [OCaml] Fix typo "moethd"
Jay Foad via llvm-commits
- [llvm] [IR][Attributes] Take "best" from Callbase/Call Function when getting attributes (PR #112985)
Jay Foad via llvm-commits
- [llvm] [IR] Remove variadic overload of StructType::setBody. NFC. (PR #114421)
Jay Foad via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Jay Foad via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Jay Foad via llvm-commits
- [llvm] [GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (PR #115377)
Jay Foad via llvm-commits
- [llvm] [StructurizeCFG] Introduce struct PredInfo. NFC. (PR #115457)
Jay Foad via llvm-commits
- [llvm] [IR] Remove variadic overload of StructType::setBody. NFC. (PR #114421)
Jay Foad via llvm-commits
- [llvm] [StructurizeCFG] Remove one SSAUpdater::AddAvailableValue. NFCI. (PR #115472)
Jay Foad via llvm-commits
- [llvm] [StructurizeCFG] Remove one SSAUpdater::AddAvailableValue. NFCI. (PR #115472)
Jay Foad via llvm-commits
- [llvm] [StructurizeCFG] Refactor insertConditions. NFC. (PR #115476)
Jay Foad via llvm-commits
- [llvm] [StructurizeCFG] Introduce struct PredInfo. NFC. (PR #115457)
Jay Foad via llvm-commits
- [llvm] [StructurizeCFG] Remove one SSAUpdater::AddAvailableValue. NFCI. (PR #115472)
Jay Foad via llvm-commits
- [llvm] [StructurizeCFG] Refactor insertConditions. NFC. (PR #115476)
Jay Foad via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Use correct DWord for v_dot4 S0 operand (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Use correct DWord for v_dot4 S0 operand (PR #115224)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Jeffrey Byrnes via llvm-commits
- [llvm] [IfConversion] Preserve debug info when flipping a branch (PR #114614)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)
Jeremy Morse via llvm-commits
- [llvm] [BranchFolding] Remove getBranchDebugLoc() (PR #114613)
Jeremy Morse via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
Jeremy Morse via llvm-commits
- [llvm] Remove `br i1 undef` from regression tests (PR #115130)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (PR #110276)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
Jeremy Morse via llvm-commits
- [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)
Jeremy Morse via llvm-commits
- [llvm] [RISCV] Separate HW/SW shadow stack on RISC-V (PR #112478)
Jesse Huang via llvm-commits
- [llvm] [RISCV] Separate HW/SW shadow stack on RISC-V (PR #112478)
Jesse Huang via llvm-commits
- [llvm] [RISCV] Separate HW/SW shadow stack on RISC-V (PR #112478)
Jesse Huang via llvm-commits
- [llvm] [RISCV] Remove forced-sw-shadow-stack in RISCVFeatures.td (PR #115447)
Jesse Huang via llvm-commits
- [llvm] [RISCV] Remove forced-sw-shadow-stack in RISCVFeatures.td (PR #115447)
Jesse Huang via llvm-commits
- [llvm] [RISCV] fix SP recovery in varargs functions (PR #114316)
Jessica Clarke via llvm-commits
- [llvm] [Offload] Add MPI Proxy Plugin (PR #114574)
Jhonatan Cléto via llvm-commits
- [llvm] [Offload] Add MPI Proxy Plugin (PR #114574)
Jhonatan Cléto via llvm-commits
- [llvm] [Offload] Add MPI Proxy Plugin (PR #114574)
Jhonatan Cléto via llvm-commits
- [llvm] [Offload] Add MPI Proxy Plugin (PR #114574)
Jhonatan Cléto via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] VOP2 update instructions with fake16 format (PR #114436)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] update true16 flag on vinterp test (PR #115356)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][MC][True16] VOP3dot instruction update for true16/fake16 (PR #113474)
Joe Nash via llvm-commits
- [llvm] [MC][AMDGPU] Support .reloc BFD_RELOC_{NONE, 32, 64} (PR #114617)
Johannes Doerfert via llvm-commits
- [llvm] [MC][AMDGPU] Support .reloc BFD_RELOC_{NONE, 32, 64} (PR #114617)
Johannes Doerfert via llvm-commits
- [llvm] [InstCombine] Eliminate fptrunc/fpext if fast math flags allow it (PR #115027)
John Brawn via llvm-commits
- [llvm] [InstCombine] Eliminate fptrunc/fpext if fast math flags allow it (PR #115027)
John Brawn via llvm-commits
- [llvm] M68k ccr mov (PR #114714)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
John Paul Adrian Glaubitz via llvm-commits
- [llvm] Remove `br i1 undef` from regression tests (PR #115130)
John Regehr via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Jon Chesterfield via llvm-commits
- [llvm] [AMDGPU] Re-enable closed-world assumption as an opt-out feature (PR #115371)
Jon Chesterfield via llvm-commits
- [llvm] [CMake] Enable CMP0156 if available (PR #115046)
Jon Roelofs via llvm-commits
- [llvm] [llvm] Improve TLI for Darwin libsystem_m functions (PR #109479)
Jon Roelofs via llvm-commits
- [clang] [llvm] Add ifunc support for Windows on AArch64. (PR #111962)
Jon Roelofs via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Jon Roelofs via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV] Remove feature dgh. (PR #115363)
Jon Roelofs via llvm-commits
- [llvm] [MISched] Add a hook to override PostRA scheduling policy (PR #115455)
Jon Roelofs via llvm-commits
- [llvm] [dsymutil] Add missing newlines in error messages. (PR #115191)
Jonas Devlieghere via llvm-commits
- [llvm] [dsymutil] Add missing newlines in error messages. (PR #115191)
Jonas Devlieghere via llvm-commits
- [llvm] [ORC] Add signext on @sum() arguments in test. (PR #113308)
Jonas Paulsson via llvm-commits
- [llvm] [MachineVerifier] Allow KILL MI with dangling MMO in MachineVerifier. (PR #114407)
Jonas Paulsson via llvm-commits
- [llvm] [MachineVerifier] Allow KILL MI with dangling MMO in MachineVerifier. (PR #114407)
Jonas Paulsson via llvm-commits
- [llvm] [MachineVerifier] Allow KILL MI with dangling MMO in MachineVerifier. (PR #114407)
Jonas Paulsson via llvm-commits
- [llvm] [LiveRangeEdit] Remove any MemoryOperand on MI when converting it to KILL. (PR #114407)
Jonas Paulsson via llvm-commits
- [llvm] [LiveRangeEdit] Remove any MemoryOperand on MI when converting it to KILL. (PR #114407)
Jonas Paulsson via llvm-commits
- [llvm] [LiveRangeEdit] Remove any MemoryOperand on MI when converting it to KILL. (PR #114407)
Jonas Paulsson via llvm-commits
- [llvm] [LiveRangeEdit] Remove any MemoryOperand on MI when converting it to KILL. (PR #114407)
Jonas Paulsson via llvm-commits
- [clang] [llvm] [Clang] Fix argument extensions in CGBlocks.cpp (PR #111740)
Jonas Paulsson via llvm-commits
- [clang] [llvm] [Clang] Fix argument extensions in CGBlocks.cpp (PR #111740)
Jonas Paulsson via llvm-commits
- [clang] [compiler-rt] [llvm] [SystemZ] Add support for half (fp16) (PR #109164)
Jonas Paulsson via llvm-commits
- [clang] [compiler-rt] [llvm] [SystemZ] Add support for half (fp16) (PR #109164)
Jonas Paulsson via llvm-commits
- [llvm] [OpenMP] Add missing SExt attributes on __kmpc_omp_taskwait_deps_51 args. (PR #115242)
Jonas Paulsson via llvm-commits
- [llvm] [OpenMP] Add missing SExt attributes on __kmpc_omp_taskwait_deps_51 args. (PR #115242)
Jonas Paulsson via llvm-commits
- [llvm] [SystemZ] Fix bitwidth problem in FindReplicatedImm() (NFC). (PR #115383)
Jonas Paulsson via llvm-commits
- [llvm] [SystemZ] SLP reductions: cost functions of reductions and scalarization (PR #112491)
Jonas Paulsson via llvm-commits
- [llvm] [SystemZ] SLP reductions: cost functions of reductions and scalarization (PR #112491)
Jonas Paulsson via llvm-commits
- [llvm] [SystemZ] SLP reductions: cost functions of reductions and scalarization (PR #112491)
Jonas Paulsson via llvm-commits
- [clang] [llvm] [AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (PR #115296)
Jonathan Thackray via llvm-commits
- [llvm] [AArch64] Allow SVE_AES instructions in streaming mode with SSVE_AES (PR #115526)
Jonathan Thackray via llvm-commits
- [llvm] [bazel] Add :support to ast target (PR #115014)
Jordan Rupprecht via llvm-commits
- [llvm] [bazel] Unbreak bazel bot (PR #115016)
Jordan Rupprecht via llvm-commits
- [llvm] [bazel] Unbreak bazel bot (PR #115016)
Jordan Rupprecht via llvm-commits
- [llvm] [bazel] Clean up unused exported files (PR #114620)
Jordan Rupprecht via llvm-commits
- [llvm] [Baze] Add missing lldbDataFormatter.py back to BUILD.bazel. (PR #115519)
Jordan Rupprecht via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Generate vector instructions (PR #115087)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Generate vector instructions (PR #115087)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Generate vector instructions (PR #115087)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Generate vector instructions (PR #115087)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Generate vector instructions (PR #115087)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Generate vector instructions (PR #115087)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec] Notify scheduler about new instructions (PR #115102)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec] Notify scheduler about new instructions (PR #115102)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxIR] Remove incorrect assertion. (PR #115553)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxIR] Remove incorrect assertion. (PR #115553)
Jorge Gorbe Moya via llvm-commits
- [llvm] [SandboxIR] Preserve the order of switch cases after revert. (PR #115577)
Jorge Gorbe Moya via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Joseph Huber via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Joseph Huber via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Joseph Huber via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Joseph Huber via llvm-commits
- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
Joseph Huber via llvm-commits
- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
Joseph Huber via llvm-commits
- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
Joseph Huber via llvm-commits
- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
Joseph Huber via llvm-commits
- [llvm] [AMDGPU] Change scope of resource usage info symbols (PR #114810)
Joseph Huber via llvm-commits
- [libc] [llvm] [libc] Support multilib with runtimes build (PR #115357)
Joseph Huber via llvm-commits
- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
Joseph Huber via llvm-commits
- [llvm] [AMDGPU] Re-enable closed-world assumption as an opt-out feature (PR #115371)
Joseph Huber via llvm-commits
- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
Joseph Huber via llvm-commits
- [llvm] [AMDGPU] Re-enable closed-world assumption as an opt-out feature (PR #115371)
Joseph Huber via llvm-commits
- [llvm] [AMDGPU] Re-enable closed-world assumption as an opt-out feature (PR #115371)
Joseph Huber via llvm-commits
- [llvm] [InstCombine] Eliminate fptrunc/fpext if fast math flags allow it (PR #115027)
Joshua Cranmer via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Joshua Cranmer via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [StructurizeCFG] Introduce struct PredInfo. NFC. (PR #115457)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [StructurizeCFG] Refactor insertConditions. NFC. (PR #115476)
Juan Manuel Martinez Caamaño via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Juergen Ributzka via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Juergen Ributzka via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
Juergen Ributzka via llvm-commits
- [compiler-rt] [tsan] Clang format a few files (PR #114725)
Julian Nagele via llvm-commits
- [clang] [compiler-rt] [XRay][AArch64] Support -fxray-shared (PR #114431)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Allow null where 128b or larger dst reg is expected (PR #115200)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)
Jun Wang via llvm-commits
- [llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)
Jun Wang via llvm-commits
- [llvm] [SPIRV] Fix assert in `getOrCreateBaseRegister` for `i32 -1` (PR #114630)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Fix broken dxil-dis tests after #106146 (PR #114629)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Justin Bogner via llvm-commits
- [llvm] [HLSL] Update tests to use splat for vector constants (PR #115198)
Justin Bogner via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
Justin Bogner via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
Justin Bogner via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
Justin Bogner via llvm-commits
- [clang] [llvm] [HLSL][SPIRV] Added clamp intrinsic (PR #113394)
Justin Bogner via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
Justin Bogner via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Justin Fargnoli via llvm-commits
- [llvm] [NFC][NVPTX] Remove use of MachineInstr prior to ISel (PR #114913)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Emit prmt selection value in hex (PR #115049)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Emit prmt selection value in hex (PR #115049)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Emit prmt selection value in hex (PR #115049)
Justin Fargnoli via llvm-commits
- [llvm] Revert "[NVPTX] Emit prmt selection value in hex" (PR #115204)
Justin Fargnoli via llvm-commits
- [llvm] Revert "[NVPTX] Emit prmt selection value in hex" (PR #115204)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Justin Fargnoli via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Justin Holewinski via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Justin Holewinski via llvm-commits
- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
Jérôme Duval via llvm-commits
- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
Jérôme Duval via llvm-commits
- [llvm] [SystemZ][XRay] Implement XRay instrumentation for SystemZ (PR #113253)
Kai Nacke via llvm-commits
- [llvm] [SystemZ][XRay] Implement XRay instrumentation for SystemZ (PR #113253)
Kai Nacke via llvm-commits
- [llvm] [SystemZ][XRay] Implement XRay instrumentation for SystemZ (PR #113253)
Kai Nacke via llvm-commits
- [compiler-rt] [SystemZ][XRay] XRay runtime support for SystemZ (PR #113252)
Kai Nacke via llvm-commits
- [llvm] [SystemZ] Make lit test more specific (PR #115050)
Kai Nacke via llvm-commits
- [llvm] [SystemZ] Make lit test more specific (PR #115050)
Kai Nacke via llvm-commits
- [compiler-rt] [SystemZ][XRay] XRay runtime support for SystemZ (PR #113252)
Kai Nacke via llvm-commits
- [compiler-rt] [SystemZ][XRay] XRay runtime support for SystemZ (PR #113252)
Kai Nacke via llvm-commits
- [llvm] [SystemZ][XRay] Implement XRay instrumentation for SystemZ (PR #113253)
Kai Nacke via llvm-commits
- [llvm] [SystemZ][XRay] Implement XRay instrumentation for SystemZ (PR #113253)
Kai Nacke via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (PR #113662)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [mlir] [flang][OpenMP] Add MLIR lowering for `loop ... bind` (PR #114219)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [mlir] [flang][OpenMP] Add basic support to lower `loop` directive to MLIR (PR #114199)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [mlir] [flang][OpenMP][MLIR] Add MLIR op for loop directive (PR #113911)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (PR #113662)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (PR #113662)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (PR #113662)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (PR #113662)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (PR #113662)
Kareem Ergawy via llvm-commits
- [llvm] [mlir] [flang][OpenMP][MLIR] Add MLIR op for loop directive (PR #113911)
Kareem Ergawy via llvm-commits
- [llvm] [mlir] [flang][OpenMP][MLIR] Add MLIR op for loop directive (PR #113911)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [mlir] [flang][OpenMP] Add basic support to lower `loop` directive to MLIR (PR #114199)
Kareem Ergawy via llvm-commits
- [llvm] [mlir] [flang][OpenMP][MLIR] Add MLIR op for loop directive (PR #113911)
Kareem Ergawy via llvm-commits
- [flang] [llvm] [mlir] [flang][OpenMP] WIP: Rewrite `omp.loop` to semantically equivalent ops (PR #115443)
Kareem Ergawy via llvm-commits
- [llvm] [mlir] [flang][OpenMP][MLIR] Add MLIR op for loop directive (PR #113911)
Kareem Ergawy via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Karthika Devi C via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Karthika Devi C via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Karthika Devi C via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Karthika Devi C via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Karthika Devi C via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Karthika Devi C via llvm-commits
- [llvm] [Utils] Remove unused includes (NFC) (PR #114748)
Kazu Hirata via llvm-commits
- [llvm] [sancov] Use heterogeneous lookups with std::map (NFC) (PR #113406)
Kazu Hirata via llvm-commits
- [llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #113414)
Kazu Hirata via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parsing support for iterator modifiers in FROM and TO (PR #114593)
Kazu Hirata via llvm-commits
- [llvm] [sancov] Use heterogeneous lookups with std::map (NFC) (PR #113406)
Kazu Hirata via llvm-commits
- [llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #113414)
Kazu Hirata via llvm-commits
- [llvm] [Utils] Remove unused includes (NFC) (PR #114748)
Kazu Hirata via llvm-commits
- [llvm] [SampleProf] Templatize longestCommonSequence (NFC) (PR #114633)
Kazu Hirata via llvm-commits
- [llvm] [Utils] Remove unused includes (NFC) (PR #114748)
Kazu Hirata via llvm-commits
- [llvm] [Analysis] Remove unused includes (NFC) (PR #114936)
Kazu Hirata via llvm-commits
- [llvm] [llvm-readobj] Use heterogenous lookups with std::map (NFC) (PR #114929)
Kazu Hirata via llvm-commits
- [llvm] [llvm-readobj] Use heterogenous lookups with std::map (NFC) (PR #114929)
Kazu Hirata via llvm-commits
- [llvm] [llvm-readobj] Use heterogenous lookups with std::map (NFC) (PR #114929)
Kazu Hirata via llvm-commits
- [llvm] [WebAssembly] Use heterogenous lookups with std::set (NFC) (PR #114930)
Kazu Hirata via llvm-commits
- [llvm] [Utils] Simplify code with DenseMap::operator[] (NFC) (PR #114932)
Kazu Hirata via llvm-commits
- [llvm] [Analysis] Remove unused includes (NFC) (PR #114936)
Kazu Hirata via llvm-commits
- [llvm] [Analysis] Remove unused includes (NFC) (PR #114936)
Kazu Hirata via llvm-commits
- [llvm] [ExecutionEngine] Simplify code with DenseMap::operator[] (NFC) (PR #115115)
Kazu Hirata via llvm-commits
- [llvm] [Instrumentation] Remove unused includes (NFC) (PR #115117)
Kazu Hirata via llvm-commits
- [llvm] [ExecutionEngine] Simplify code with DenseMap::operator[] (NFC) (PR #115115)
Kazu Hirata via llvm-commits
- [llvm] [ExecutionEngine] Simplify code with DenseMap::operator[] (NFC) (PR #115115)
Kazu Hirata via llvm-commits
- [llvm] [Instrumentation] Remove unused includes (NFC) (PR #115117)
Kazu Hirata via llvm-commits
- [llvm] ccf5d62 - [AMDGPU] Fix a warning
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] 84745da - [Analysis] Fix a warning (NFC)
Kazu Hirata via llvm-commits
- [llvm] [ExecutionEngine] Simplify code with DenseMap::operator[] (NFC) (PR #115115)
Kazu Hirata via llvm-commits
- [llvm] [IPO] Simplify code with DenseMap::operator[] (NFC) (PR #115261)
Kazu Hirata via llvm-commits
- [llvm] [Utils] Avoid repeated hash lookups (NFC) (PR #115262)
Kazu Hirata via llvm-commits
- [llvm] [Transforms] Remove unused includes (NFC) (PR #115263)
Kazu Hirata via llvm-commits
- [llvm] [Transforms] Remove unused includes (NFC) (PR #115263)
Kazu Hirata via llvm-commits
- [llvm] [Transforms] Remove unused includes (NFC) (PR #115263)
Kazu Hirata via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #114946)
Kazu Hirata via llvm-commits
- [llvm] [IPO] Simplify code with DenseMap::operator[] (NFC) (PR #115261)
Kazu Hirata via llvm-commits
- [llvm] [Utils] Avoid repeated hash lookups (NFC) (PR #115262)
Kazu Hirata via llvm-commits
- [llvm] [Transforms] Remove unused includes (NFC) (PR #115263)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Kazu Hirata via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
Kazu Hirata via llvm-commits
- [llvm] [SPIRV] Use heterogenous lookups with std::map (NFC) (PR #115425)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Kazu Hirata via llvm-commits
- [llvm] [SLP] Avoid repeated hash lookups (NFC) (PR #115428)
Kazu Hirata via llvm-commits
- [llvm] [GlobalISel] Remove unused includes (NFC) (PR #115429)
Kazu Hirata via llvm-commits
- [llvm] [SPIRV] Use heterogenous lookups with std::map (NFC) (PR #115425)
Kazu Hirata via llvm-commits
- [llvm] [SLP] Avoid repeated hash lookups (NFC) (PR #115428)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Kazu Hirata via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Kazu Hirata via llvm-commits
- [llvm] [GlobalISel] Remove unused includes (NFC) (PR #115429)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Kazu Hirata via llvm-commits
- [llvm] [GlobalISel] Remove unused includes (NFC) (PR #115429)
Kazu Hirata via llvm-commits
- [llvm] [DebugInfo] Simplify code with std::map::operator[] (NFC) (PR #115591)
Kazu Hirata via llvm-commits
- [llvm] [Vectorize] Simplify code with MapVector::operator[] (NFC) (PR #115592)
Kazu Hirata via llvm-commits
- [llvm] [X86] Remove unused includes (NFC) (PR #115593)
Kazu Hirata via llvm-commits
- [llvm] [Vectorize] Simplify code with MapVector::operator[] (NFC) (PR #115592)
Kazu Hirata via llvm-commits
- [llvm] [DebugInfo] Simplify code with std::map::operator[] (NFC) (PR #115591)
Kazu Hirata via llvm-commits
- [llvm] [X86] Remove unused includes (NFC) (PR #115593)
Kazu Hirata via llvm-commits
- [llvm] [ADT] Mark reverse and concat as nodiscard (PR #115611)
Kazu Hirata via llvm-commits
- [llvm] [Vectorize] Simplify code with MapVector::operator[] (NFC) (PR #115592)
Kazu Hirata via llvm-commits
- [llvm] [Vectorize] Simplify code with MapVector::operator[] (NFC) (PR #115592)
Kazu Hirata via llvm-commits
- [llvm] [Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (PR #115623)
Kazu Hirata via llvm-commits
- [llvm] [Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (PR #115623)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
Kazu Hirata via llvm-commits
- [llvm] [Vectorize] Simplify code with DenseMap::operator[] (NFC) (PR #115635)
Kazu Hirata via llvm-commits
- [llvm] [AArch64/GISel] Remove unused includes (NFC) (PR #115636)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
Kazu Hirata via llvm-commits
- [llvm] [Vectorize] Simplify code with DenseMap::operator[] (NFC) (PR #115635)
Kazu Hirata via llvm-commits
- [llvm] [AArch64/GISel] Remove unused includes (NFC) (PR #115636)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115681)
Kazu Hirata via llvm-commits
- [llvm] [AArch64] Remove unused includes (NFC) (PR #115685)
Kazu Hirata via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115681)
Kazu Hirata via llvm-commits
- [compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)
Keith Packard via llvm-commits
- [compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)
Keith Packard via llvm-commits
- [llvm] [TLI Checker] Extend the targets for Linux, macOS and Windows. (PR #114556)
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LLVM Continuous Integration via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
LLVM Continuous Integration via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
LLVM Continuous Integration via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
LLVM Continuous Integration via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
LLVM Continuous Integration via llvm-commits
- [llvm] [SROA] Fix NumPromoted statistic for SROA pass. (PR #115586)
LLVM Continuous Integration via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
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- [llvm] [Instrumentation] Fix test failure in #115471 (PR #115596)
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- [lld] [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (PR #112959)
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- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
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- [llvm] [LangRef] Fix evl type on float VP reduction intrinsics (PR #115421)
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- [llvm] [RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (PR #115272)
LLVM Continuous Integration via llvm-commits
- [llvm] [LangRef] Fix evl type on float VP reduction intrinsics (PR #115421)
LLVM Continuous Integration via llvm-commits
- [llvm] [LangRef] Fix evl type on float VP reduction intrinsics (PR #115421)
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- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
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- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
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- [llvm] 81613dd - [ORC] Move some typedefs from Core.h to a new header, CoreContainers.h. NFC.
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- [llvm] 3d2849b - [ORC] Move MaterializationUnit from Core.h into its own header. NFC.
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- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
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- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
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- [llvm] [SampleProf] Templatize longestCommonSequence (NFC) (PR #114633)
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- [llvm] [SampleFDO] Support enabling sample loader pass in O0 mode (PR #113985)
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- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (PR #114447)
Lei Wang via llvm-commits
- [llvm] [SampleFDO] Support enabling sample loader pass in O0 mode (PR #113985)
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- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (PR #114447)
Lei Wang via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (PR #114447)
Lei Wang via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (PR #114447)
Lei Wang via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (PR #114447)
Lei Wang via llvm-commits
- [llvm] [SampleFDO] Support enabling sample loader pass in O0 mode (PR #113985)
Lei Wang via llvm-commits
- [llvm] [SampleFDO] Support enabling sample loader pass in O0 mode (PR #113985)
Lei Wang via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (PR #114447)
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- [clang] [compiler-rt] [libc] [lld] [lldb] [llvm] [mlir] [BOLT] Match blocks with pseudo probes (PR #99891)
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- [clang] [compiler-rt] [libc] [lld] [lldb] [llvm] [mlir] [BOLT] Match blocks with pseudo probes (PR #99891)
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- [clang] [compiler-rt] [libc] [lld] [lldb] [llvm] [mlir] [BOLT] Match blocks with pseudo probes (PR #99891)
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- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (PR #114447)
Lei Wang via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (PR #114447)
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- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
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- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
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- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
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- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [llvm] Enable .ptr .global .align attributes for kernel attributes for CUDA (PR #114874)
Lewis Crawford via llvm-commits
- [clang] [lld] [llvm] [mlir] [llvm-project] Fix typo "propogate" (PR #114795)
Longsheng Mou via llvm-commits
- [llvm] [runtimes] Remove an old CMake TODO around checking --unwindlib=none (PR #114710)
Louis Dionne via llvm-commits
- [llvm] [runtimes] Remove an old CMake TODO around checking --unwindlib=none (PR #114710)
Louis Dionne via llvm-commits
- [llvm] [llvm][llvm-lit] Hide --use-unique-output-file-name from --help (PR #114812)
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- [clang] [compiler-rt] [libcxx] [llvm] [libc++] Replace LIBCXX_ENABLE_STATIC_ABI_LIBRARY & friends by a new LIBCXX_CXX_ABI choice (PR #112978)
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- [llvm] Allow specifying libcxx builder image. (PR #110303)
Louis Dionne via llvm-commits
- [libcxxabi] [llvm] [demangler] Enhance demangling in llvm-cxxfilt for fixed-point types. (PR #114257)
Louis Dionne via llvm-commits
- [clang] [compiler-rt] [libcxx] [llvm] [libc++] Replace LIBCXX_ENABLE_STATIC_ABI_LIBRARY & friends by a new LIBCXX_CXX_ABI choice (PR #112978)
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- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Louis Dionne via llvm-commits
- [compiler-rt] [libunwind] [llvm] [cmake] Remove obsolete files, docs and CMake variables related to the standalone build (PR #112741)
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- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
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- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
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- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
Louis Dionne via llvm-commits
- [clang] [compiler-rt] [libcxx] [llvm] [libc++] Replace LIBCXX_ENABLE_STATIC_ABI_LIBRARY & friends by a new LIBCXX_CXX_ABI choice (PR #112978)
Louis Dionne via llvm-commits
- [clang] [compiler-rt] [libcxx] [llvm] [libc++] Replace LIBCXX_ENABLE_STATIC_ABI_LIBRARY & friends by a new LIBCXX_CXX_ABI choice (PR #112978)
Louis Dionne via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Louis Dionne via llvm-commits
- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
Louis Dionne via llvm-commits
- [llvm] [ci] Write test results to unique file names (PR #113160)
Louis Dionne via llvm-commits
- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
Louis Dionne via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Louis Dionne via llvm-commits
- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
Louis Dionne via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Louis Dionne via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Louis Dionne via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Louis Dionne via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Louis Dionne via llvm-commits
- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
Louis Dionne via llvm-commits
- [llvm] [github] Document the process for requesting the CI/CD role (PR #115321)
Louis Dionne via llvm-commits
- [llvm] [github] Document the process for requesting the CI/CD role (PR #115321)
Louis Dionne via llvm-commits
- [llvm] [LoongArch] Support llvm.lround intrinsics with i32 return type. (PR #114733)
Lu Weining via llvm-commits
- [llvm] [LoongArch] Support llvm.lround intrinsics with i32 return type. (PR #114733)
Lu Weining via llvm-commits
- [llvm] [LoongArch] Support llvm.lround intrinsics with i32 return type. (PR #114733)
Lu Weining via llvm-commits
- [llvm] [LoongArch] Support llvm.lround intrinsics with i32 return type. (PR #114733)
Lu Weining via llvm-commits
- [llvm] [LoongArch] Support llvm.lround intrinsics with i32 return type. (PR #114733)
Lu Weining via llvm-commits
- [llvm] [LoongArch] Add test for scalar FP rounding (PR #114968)
Lu Weining via llvm-commits
- [llvm] [LoongArch] Add test for scalar FP rounding (PR #114968)
Lu Weining via llvm-commits
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Lu Weining via llvm-commits
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Lu Weining via llvm-commits
- [llvm] [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (PR #114922)
Lu Weining via llvm-commits
- [llvm] [RuntimeDyld] Add LoongArch support (PR #114741)
Lu Weining via llvm-commits
- [llvm] [LoongArch] Precommit test for avoid indirect branch jumps through ra. NFC (PR #115423)
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- [clang] [llvm] [AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (PR #115296)
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- [llvm] [AMDGPU][TTI] Threshold bonus to loops whose unrolling makes nested loops unrollable (PR #114579)
Lucas Ramirez via llvm-commits
- [llvm] [RISCV] Lower vector_shuffle for bf16 (PR #114731)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length strided VP loads and stores for zvfhmin/zvfbfmin (PR #114750)
Luke Lau via llvm-commits
- [llvm] [RISCV] Handle zvfhmin/zvfbfmin in lowerVECTOR_SHUFFLEAsVSlide1 (PR #114925)
Luke Lau via llvm-commits
- [llvm] [RISCV] Use integer VTypeInfo predicate for vmv_v_v_vl pattern (PR #114915)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length {insert,extract}_vector_elt on zvfhmin/zvfbfmin (PR #114927)
Luke Lau via llvm-commits
- [llvm] [RISCV] Handle zvfhmin/zvfbfmin in lowerVECTOR_SHUFFLEAsVSlide1 (PR #114925)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length {insert,extract}_vector_elt on zvfhmin/zvfbfmin (PR #114927)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length bf16 vector bitcasts (PR #114938)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length bf16 vector bitcasts (PR #114938)
Luke Lau via llvm-commits
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Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (PR #114945)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (PR #114945)
Luke Lau via llvm-commits
- [llvm] e9a4f2c - [RISCV] Convert test to opaque pointers. NFC
Luke Lau via llvm-commits
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Luke Lau via llvm-commits
- [llvm] [LegalizeVectorTypes] Allow non-undef vectors when widening insert_subvector op (PR #115110)
Luke Lau via llvm-commits
- [llvm] [LegalizeVectorTypes] Allow non-undef vectors when widening insert_subvector op (PR #115110)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add +unaligned-scalar-mem to spacemit-x60 (PR #115125)
Luke Lau via llvm-commits
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Luke Lau via llvm-commits
- [llvm] [RISCV][TTI] Implement instruction cost for vp.reduce.* (PR #114184)
Luke Lau via llvm-commits
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Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
Luke Lau via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Luke Lau via llvm-commits
- [llvm] 7cb6677 - [RISCV] Rework fixed-length masked load/store tests. NFC
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
Luke Lau via llvm-commits
- [llvm] 70bc12e - [RISCV] Remove unnecessary scalar extensions from test. NFC
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length vp_{gather,scatter} for zvfhmin/zvfbfmin (PR #115253)
Luke Lau via llvm-commits
- [llvm] [RISCV] Match single source deinterleave shuffles for vnsrl (PR #114878)
Luke Lau via llvm-commits
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Luke Lau via llvm-commits
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Luke Lau via llvm-commits
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Luke Lau via llvm-commits
- [llvm] [RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal strided access (PR #115264)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower fixed-length vp_{gather,scatter} for zvfhmin/zvfbfmin (PR #115253)
Luke Lau via llvm-commits
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Luke Lau via llvm-commits
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Luke Lau via llvm-commits
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- [llvm] [RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (PR #115272)
Luke Lau via llvm-commits
- [llvm] [LangRef] Fix evl type on float VP reduction intrinsics (PR #115421)
Luke Lau via llvm-commits
- [llvm] [RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (PR #115272)
Luke Lau via llvm-commits
- [clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Maciej Gabka via llvm-commits
- [clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Maciej Gabka via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
Maciej Gabka via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
Madhur Amilkanthwar via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
Madhur Amilkanthwar via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
Madhur Amilkanthwar via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
Madhur Amilkanthwar via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115127)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115127)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115128)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115128)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115128)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115128)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Madhur Amilkanthwar via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Madhur Amilkanthwar via llvm-commits
- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
Maksim Levental via llvm-commits
- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
Maksim Levental via llvm-commits
- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
Maksim Levental via llvm-commits
- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
Maksim Levental via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT] Set call to continuation count in pre-aggregated profile (PR #109486)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT] Set call to continuation count in pre-aggregated profile (PR #109486)
Maksim Panchenko via llvm-commits
- [llvm] [Bolt] Fix address translation for KASLR kernel (PR #114261)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT] Fix mustSkip when symbol's name changed by BOLT (PR #99463)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][AArch64] Add support for compact code model (PR #112110)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][AArch64] Add support for compact code model (PR #112110)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][merge-fdata]Fix support for fdata files starting with no_lbr on ARM platform (PR #112328)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)
Maksim Panchenko via llvm-commits
- [llvm] [Bolt] Fix address translation for KASLR kernel (PR #114261)
Maksim Panchenko via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Malay Sanghi via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Malay Sanghi via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Marius Brehler via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Marius Brehler via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Marius Brehler via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Marius Brehler via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Marius Brehler via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Marius Brehler via llvm-commits
- [llvm] [InstSimplify] Fix Inconsistent PHI Simplification (PR #113037)
Marius Kamp via llvm-commits
- [llvm] [InstSimplify] Fix Inconsistent PHI Simplification (PR #113037)
Marius Kamp via llvm-commits
- [llvm] [InstSimplify] Fix Inconsistent PHI Simplification (PR #113037)
Marius Kamp via llvm-commits
- [llvm] [InstSimplify] Fix Inconsistent PHI Simplification (PR #113037)
Marius Kamp via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Mark Goncharov via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Mark Goncharov via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Mark Goncharov via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Mark Goncharov via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mark Goncharov via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Mark Goncharov via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Mark Goncharov via llvm-commits
- [llvm] [RISCV] Add +unaligned-scalar-mem to spacemit-x60 (PR #115125)
Mark Zhuang via llvm-commits
- [lld] [LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (PR #114466)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (PR #114466)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (PR #114466)
Martin Storsjö via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Add support for locally imported EC symbols (PR #114985)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Martin Storsjö via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Martin Storsjö via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Martin Storsjö via llvm-commits
- [compiler-rt] Fix libFuzzer not building with pthreads on Windows (PR #109525)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Append a terminator entry to redirection metadata (PR #115202)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Append a terminator entry to redirection metadata (PR #115202)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Append a terminator entry to redirection metadata (PR #115202)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
Martin Storsjö via llvm-commits
- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Martin Storsjö via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Martin Storsjö via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Use correct machine types in PDB records on ARM64EC (PR #115309)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (PR #115474)
Martin Storsjö via llvm-commits
- [flang] [llvm] [Flang][OMP]Add support for DECLARE MAPPER parsing and semantics (PR #115160)
Mats Petersson via llvm-commits
- [flang] [llvm] [Flang][OMP]Add support for DECLARE MAPPER parsing and semantics (PR #115160)
Mats Petersson via llvm-commits
- [llvm] Use `std::move` to avoid copy (PR #113055)
Matt Arsenault via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Change scope of resource usage info symbols (PR #114810)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Matt Arsenault via llvm-commits
- [llvm] StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (PR #114836)
Matt Arsenault via llvm-commits
- [llvm] StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (PR #114836)
Matt Arsenault via llvm-commits
- [llvm] StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (PR #114836)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Custom expand flat cmpxchg which may access private (PR #109410)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Custom expand flat cmpxchg which may access private (PR #109410)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Matt Arsenault via llvm-commits
- [llvm] [IfConversion] Preserve debug info when flipping a branch (PR #114614)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix broken frame index expansion for v_add_co_u32_e64 (PR #114634)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix broken frame index expansion for v_add_co_u32_e64 (PR #114634)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][True16][MC] VOPC profile fake16 pseudo update (PR #113175)
Matt Arsenault via llvm-commits
- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
Matt Arsenault via llvm-commits
- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
Matt Arsenault via llvm-commits
- [llvm] [IfConversion] Preserve debug info when flipping a branch (PR #114614)
Matt Arsenault via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Matt Arsenault via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Matt Arsenault via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Matt Arsenault via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Matt Arsenault via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Matt Arsenault via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Matt Arsenault via llvm-commits
- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
Matt Arsenault via llvm-commits
- [llvm] [SDAG] Merge multiple-result libcall expansion into DAG.expandMultipleResultFPLibCall() (PR #114792)
Matt Arsenault via llvm-commits
- [llvm] StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (PR #114836)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Add basic constant folding for `llvm.sincos` (PR #114527)
Matt Arsenault via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_EXTRACT_SUBVECTOR for SVE (PR #114519)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Matt Arsenault via llvm-commits
- [llvm] SafeStack: Respect alloca addrspace (PR #112536)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Handle natively unsupported types in addrspace(7) lowering (PR #110572)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Handle natively unsupported types in addrspace(7) lowering (PR #110572)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Handle natively unsupported types in addrspace(7) lowering (PR #110572)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Handle natively unsupported types in addrspace(7) lowering (PR #110572)
Matt Arsenault via llvm-commits
- [clang] [llvm] [LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (PR #112548)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix clobbering temp reg for large frame indexes in VOP3 users (PR #114924)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU specific tryCandidate() (PR #114957)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU specific tryCandidate() (PR #114957)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][GISel] Support neon.abs intrinsic for vector types (PR #107226)
Matt Arsenault via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Matt Arsenault via llvm-commits
- [clang] [llvm] AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (PR #113751)
Matt Arsenault via llvm-commits
- [llvm] [SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (PR #114943)
Matt Arsenault via llvm-commits
- [llvm] [SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (PR #114943)
Matt Arsenault via llvm-commits
- [llvm] [MachineVerifier] Allow KILL MI with dangling MMO in MachineVerifier. (PR #114407)
Matt Arsenault via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Ensure Safe Handling of Flags in foldFNegIntoConstant (PR #94148)
Matt Arsenault via llvm-commits
- [llvm] [LiveRangeEdit] Remove any MemoryOperand on MI when converting it to KILL. (PR #114407)
Matt Arsenault via llvm-commits
- [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Matt Arsenault via llvm-commits
- [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Matt Arsenault via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Matt Arsenault via llvm-commits
- [llvm] [SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (PR #114943)
Matt Arsenault via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Support `nuw` and `nusw` in buffer fat pointer lowering (PR #115039)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Matt Arsenault via llvm-commits
- [llvm] [MC][AMDGPU] Support .reloc BFD_RELOC_{NONE, 32, 64} (PR #114617)
Matt Arsenault via llvm-commits
- [llvm] ce067c5 - AMDGPU: Rename test file
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
Matt Arsenault via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
Matt Arsenault via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
Matt Arsenault via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] [AMDGPU] Attempt DAGCombine for fmul with select to ldexp (PR #111109)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] [AMDGPU] Attempt DAGCombine for fmul with select to ldexp (PR #111109)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
Matt Arsenault via llvm-commits
- [llvm] [LLVM][AsmParser] Add support for C style comments (PR #111554)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
Matt Arsenault via llvm-commits
- [clang] [llvm] AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (PR #113751)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (PR #113751)
Matt Arsenault via llvm-commits
- [llvm] Local: Handle noalias_addrspace in combineMetadata (PR #103938)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Use boolean predicated legalization action methods to simplify code. NFC (PR #115063)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (PR #113751)
Matt Arsenault via llvm-commits
- [clang] [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] Local: Handle noalias_addrspace in combineMetadata (PR #103938)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Matt Arsenault via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Allow getUnderlyingObject to look at vectors (PR #114311)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Implement zexti32/zexti16 ComplexPatterns. (PR #115097)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Allow getUnderlyingObject to look at vectors (PR #114311)
Matt Arsenault via llvm-commits
- [llvm] [InstSimplify] Fix Inconsistent PHI Simplification (PR #113037)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold more scalar operations on frame index to VALU (PR #115059)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold more scalar operations on frame index to VALU (PR #115059)
Matt Arsenault via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Matt Arsenault via llvm-commits
- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
Matt Arsenault via llvm-commits
- [llvm] [TableGen][GISel] Extract helper function for constraining operands (PR #115148)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] fix build error unused-var (PR #115199)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Guard FP8 related instructions properly (PR #115211)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Guard FP8 related instructions properly (PR #115211)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AtomicExpand: Preserve metadata when bitcasting fp atomicrmw xchg (PR #115240)
Matt Arsenault via llvm-commits
- [llvm] AtomicExpand: Preserve metadata when bitcasting fp atomicrmw xchg (PR #115240)
Matt Arsenault via llvm-commits
- [llvm] AtomicExpand: Preserve metadata when bitcasting fp atomicrmw xchg (PR #115240)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Allow getUnderlyingObject to look at vectors (PR #114311)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Allow getUnderlyingObject to look at vectors (PR #114311)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Do not return nullptr from getUnderlyingObject (PR #115258)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Do not return nullptr from getUnderlyingObject (PR #115258)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Do not return nullptr from getUnderlyingObject (PR #115258)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Allow getUnderlyingObject to look at vectors (PR #114311)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
Matt Arsenault via llvm-commits
- [llvm] ValueTracking: Do not return nullptr from getUnderlyingObject (PR #115258)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix resource usage information for unnamed functions (PR #115320)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
Matt Arsenault via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
Matt Arsenault via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
Matt Arsenault via llvm-commits
- [llvm] [TableGen][SelectionDAG] Remove the `implicit` DAG node (PR #115295)
Matt Arsenault via llvm-commits
- [llvm] [TableGen][SelectionDAG] Remove the `implicit` DAG node (PR #115295)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Change scope of resource usage info symbols (PR #114810)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Change scope of resource usage info symbols (PR #114810)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Guard FP8 related instructions properly (PR #115211)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_EXTRACT_VECTOR_ELT for SVE (PR #115161)
Matt Arsenault via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|f16x2|bf16|bf16x2} (PR #114977)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [SDAG] Only apply sincos/frexp stack slot folding to IR pointers (PR #115346)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Add fcopysign tests with mismatched types. NFC (PR #115364)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Add G_ZEXT to RISCVInstructionSelector::selectZExtBits. (PR #115391)
Matt Arsenault via llvm-commits
- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
Matt Arsenault via llvm-commits
- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
Matt Arsenault via llvm-commits
- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold more scalar operations on frame index to VALU (PR #115059)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fold more scalar operations on frame index to VALU (PR #115059)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Default to selecting frame indexes to SGPRs (PR #115060)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Default to selecting frame indexes to SGPRs (PR #115060)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Matt Arsenault via llvm-commits
- [llvm] [llvm-reduce] Reduce samesign flag from icmp (PR #115492)
Matt Arsenault via llvm-commits
- [llvm] [StructurizeCFG] Refactor insertConditions. NFC. (PR #115476)
Matt Arsenault via llvm-commits
- [llvm] [StructurizeCFG] Remove one SSAUpdater::AddAvailableValue. NFCI. (PR #115472)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
Matt Arsenault via llvm-commits
- [llvm] [LegalizeTypes] Support softening FMINIMUM/FMAXIMUM (PR #115463)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Matt Arsenault via llvm-commits
- [llvm] Zext sext undef in sdag (PR #115451)
Matt Arsenault via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
Matt Arsenault via llvm-commits
- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
Matt Arsenault via llvm-commits
- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Default to selecting frame indexes to SGPRs (PR #115060)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU/GlobalISel: Remove getVRegDef null checks in selector (PR #115530)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU/GlobalISel: Remove getVRegDef null checks in selector (PR #115530)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU/GlobalISel: Remove getVRegDef null checks in selector (PR #115530)
Matt Arsenault via llvm-commits
- [llvm] CodeGen: Don't assert when printing null GlobalAddress operands (PR #115531)
Matt Arsenault via llvm-commits
- [llvm] CodeGen: Don't assert when printing null GlobalAddress operands (PR #115531)
Matt Arsenault via llvm-commits
- [llvm] CodeGen: Don't assert when printing null GlobalAddress operands (PR #115531)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (PR #115377)
Matt Arsenault via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
Matt Arsenault via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
Matt Arsenault via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
Matt Arsenault via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
Matt Arsenault via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #112403)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
Matt Arsenault via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Matt Arsenault via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Matt Arsenault via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Matt Arsenault via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Matt Arsenault via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Use "countMaxActiveBits() <= 5" to define uint5Bits (PR #115543)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Default to selecting frame indexes to SGPRs (PR #115060)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Default to selecting frame indexes to SGPRs (PR #115060)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Allow G_SEXT_INREG patterns to be imported. (PR #115576)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISel] Use boolean predicated legalization action methods to remove a custom lambda. (PR #115628)
Matt Arsenault via llvm-commits
- [llvm] [IPSCCP] Push constant struct params into callees (PR #111805)
Matthew Devereau via llvm-commits
- [llvm] [polly] [llvm][ConstraintElimination]Insert ConditionFact into loop header in case of monotonic induction variables (PR #112080)
Matthias Braun via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Matthias Braun via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Matthias Braun via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Matthias Braun via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Matthias Braun via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Matthias Braun via llvm-commits
- [llvm] [CodeLayout] Do not flip branch condition when using optsize (PR #114607)
Matthias Braun via llvm-commits
- [llvm] [CodeLayout] Do not flip branch condition when using optsize (PR #114607)
Matthias Braun via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Matthias Braun via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Matthias Braun via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Matthias Braun via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Matthias Gehre via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][NFC] Simplify initialization of MinProfitableTripCount (PR #113445)
Mel Chen via llvm-commits
- [llvm] [LV][NFC] Simplify initialization of MinProfitableTripCount (PR #113445)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV] Make having flags (FMFs etc) not require inheriting VPSingleDefRecipe (PR #114972)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Mel Chen via llvm-commits
- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
Mel Chen via llvm-commits
- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
Mel Chen via llvm-commits
- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
Mel Chen via llvm-commits
- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
Mel Chen via llvm-commits
- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
Mel Chen via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Mel Chen via llvm-commits
- [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)
Mel Chen via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Mel Chen via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Mel Chen via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
Mel Chen via llvm-commits
- [clang] [lldb] [llvm] [WIP][lldb][Expression] More reliable function call resolution (PR #114529)
Michael Buch via llvm-commits
- [clang] [lldb] [llvm] [WIP][lldb][Expression] More reliable function call resolution (PR #114529)
Michael Buch via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Michael Buch via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Michael Buch via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Michael Buch via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Michael Buch via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Michael Buch via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Michael Buch via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Michael Buch via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Michael Buch via llvm-commits
- [clang] [libcxxabi] [lldb] [llvm] [WIP (PR #115245)
Michael Buch via llvm-commits
- [clang] [libcxxabi] [lldb] [llvm] [WIP][lldb] Alternative implementation of more reliable function call infrastructure (PR #115245)
Michael Buch via llvm-commits
- [clang] [libcxxabi] [lldb] [llvm] [WIP][lldb] Alternative implementation of more reliable function call infrastructure (PR #115245)
Michael Buch via llvm-commits
- [llvm] [DebugInfo] Add num_extra_inhabitants to debug info (PR #112590)
Michael Buch via llvm-commits
- [llvm] [llvm-objdump] Add preliminary support for decoding binary files (PR #115667)
Michael Clark via llvm-commits
- [llvm] [libc][bazel] Mark socket functions weak (PR #115088)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Support multilib with runtimes build (PR #115357)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Support multilib with runtimes build (PR #115357)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Support multilib with runtimes build (PR #115357)
Michael Jones via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (PR #113662)
Michael Klemm via llvm-commits
- [flang] [llvm] [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (PR #113662)
Michael Klemm via llvm-commits
- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
Michael Klemm via llvm-commits
- [llvm] [mlir] [llvm][OpenMP] Add implicit cast to omp.atomic.read (PR #114659)
Michael Kruse via llvm-commits
- [llvm] [mlir] [llvm][OpenMP] Add implicit cast to omp.atomic.read (PR #114659)
Michael Kruse via llvm-commits
- [llvm] [mlir] [llvm][OpenMP] Add implicit cast to omp.atomic.read (PR #114659)
Michael Kruse via llvm-commits
- [llvm] [mlir] [llvm][OpenMP] Add implicit cast to omp.atomic.read (PR #114659)
Michael Kruse via llvm-commits
- [llvm] [llvm-(min-)tblgen] Avoid redundant source compilation (PR #114494)
Michael Kruse via llvm-commits
- [llvm] [llvm-(min-)tblgen] Avoid redundant source compilation (PR #114494)
Michael Kruse via llvm-commits
- [llvm] [llvm-(min-)tblgen] Avoid redundant source compilation (PR #114494)
Michael Kruse via llvm-commits
- [llvm] [llvm-(min-)tblgen] Avoid redundant source compilation (PR #114494)
Michael Kruse via llvm-commits
- [llvm] [llvm-(min-)tblgen] Avoid redundant source compilation (PR #114494)
Michael Kruse via llvm-commits
- [llvm] [llvm-(min-)tblgen] Avoid redundant source compilation (PR #114494)
Michael Kruse via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Michael Kruse via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Michael Kruse via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Michael Kruse via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Michael Kruse via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Michael Kruse via llvm-commits
- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Michael Kruse via llvm-commits
- [llvm] [mlir] [llvm][OpenMP] Add implicit cast to omp.atomic.read (PR #114659)
Michael Kruse via llvm-commits
- [clang] [llvm] Add emitAtomicCompareExchangeBuiltin helper function (PR #101966)
Michael Kruse via llvm-commits
- [clang] [flang] [llvm] Add emitAtomicCompareExchangeBuiltin helper function (PR #101966)
Michael Kruse via llvm-commits
- [llvm] [mlir] [llvm][OpenMP] Add implicit cast to omp.atomic.read (PR #114659)
Michael Kruse via llvm-commits
- [llvm] [CodeExtractor][NFC] Refactor-out applyFirstDebugLoc. (PR #115358)
Michael Kruse via llvm-commits
- [llvm] [CodeExtractor][NFC] Refactor-out applyFirstDebugLoc. (PR #115358)
Michael Kruse via llvm-commits
- [llvm] [CodeExtractor][NFC] Refactor-out applyFirstDebugLoc. (PR #115358)
Michael Kruse via llvm-commits
- [llvm] [CodeExtractor][NFC] Refactor-out applyFirstDebugLoc. (PR #115358)
Michael Kruse via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] [CodeGen][MISched] Set DumpDirection after initPolicy (PR #115112)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [llvm] [MIRLexer][RISCV] Eat a space after the Machine comment (PR #115365)
Michael Maitland via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #107493)
Michael Toguchi via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #107493)
Michael Toguchi via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #107493)
Michael Toguchi via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
Michal Paszkowski via llvm-commits
- [llvm] [Analysis] Remove global state from `PluginInline{Advisor,Order}Analysis`. (PR #114615)
Michele Scandale via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Miguel A. Arroyo via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Miguel A. Arroyo via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Miguel A. Arroyo via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Miguel A. Arroyo via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Miguel A. Arroyo via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Miguel A. Arroyo via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Miguel A. Arroyo via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
Miguel A. Arroyo via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Mikael Holmén via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)
Mikhail R. Gadelha via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Mikołaj Piróg via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
Min-Yih Hsu via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Support Zfa in SiFive P600's scheduling model (PR #115036)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Refine division latencies in SiFive P600's scheduling model (PR #115038)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Support Zfa in SiFive P600's scheduling model (PR #115036)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Update latency of MUL & CPOP in SiFive P600's scheduling model (PR #115042)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Refine vector division latencies in SiFive P600's scheduling model (PR #115038)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Refine vector division latencies in SiFive P600's scheduling model (PR #115038)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Implemented strategy for load operation (PR #113458)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Implemented strategy for load operation (PR #113458)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Implemented strategy for load operation (PR #113458)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Implemented strategy for load operation (PR #113458)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Implemented strategy for load operation (PR #113458)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Refine vector division latencies in SiFive P600's scheduling model (PR #115038)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Update SiFive P600's scheduling model on RVV instructions (PR #115243)
Min-Yih Hsu via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Min-Yih Hsu via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Min-Yih Hsu via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Min-Yih Hsu via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Min-Yih Hsu via llvm-commits
- [llvm] [CodeGen][MISched] Set DumpDirection after initPolicy (PR #115112)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 support for G_CTPOP/CTLZ/CTTZ on RV64. (PR #115101)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (PR #115107)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (PR #115107)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (PR #115107)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (PR #115268)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Min-Yih Hsu via llvm-commits
- [llvm] [MISched] Add a hook to override PostRA scheduling policy (PR #115455)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] allow 16-bit registers for MOVE to/from CCR (PR #107591)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Update SiFive P600's scheduling model on RVV instructions (PR #115243)
Min-Yih Hsu via llvm-commits
- [llvm] [Support] Fix UB in decodeULEB128 and decodeSLEB128 (NFC) (PR #114986)
Mingming Liu via llvm-commits
- [llvm] [WPD]Regard unreachable function as a possible devirtualizable target (PR #115668)
Mingming Liu via llvm-commits
- [llvm] [NFC] Correct imprecise file location in the comment. (PR #115630)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [NFC] Correct imprecise file location in the comment. (PR #115630)
Mircea Trofin via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Mirko Brkušanin via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Mirko Brkušanin via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Mirko Brkušanin via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Mirko Brkušanin via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Mirko Brkušanin via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Mirko Brkušanin via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Mirko Brkušanin via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (PR #114609)
Mirko Brkušanin via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly for FMOP4A (widening, 2-way, FP8 to FP16) instructions (PR #113348)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly for FMOP4A (widening, 2-way, FP8 to FP16) instructions (PR #113348)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly for FMOP4A (widening, 2-way, FP8 to FP16) instructions (PR #113348)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Generate zeroing forms of certain SVE2.2 instructions (1/n) (PR #115535)
Momchil Velikov via llvm-commits
- [llvm] [X86] Prefer `lock or` over mfence (PR #106555)
Mosè Giordano via llvm-commits
- [llvm] d6e65a6 - Fix a warning. [-Wunused-but-set-variable]
NAKAMURA Takumi via llvm-commits
- [llvm] Use `std::move` to avoid copy (PR #113080)
Nashe Mncube via llvm-commits
- [llvm] Use `std::move` to avoid copy (PR #113080)
Nashe Mncube via llvm-commits
- [llvm] Use `std::move` to avoid copy (PR #113080)
Nashe Mncube via llvm-commits
- [llvm] [LLVM][ARM] Latency mutations for cortex m55, m7 and m85 (PR #115153)
Nashe Mncube via llvm-commits
- [llvm] [LLVM][ARM] Latency mutations for cortex m55, m7 and m85 (PR #115153)
Nashe Mncube via llvm-commits
- [llvm] [LLVM][ARM] Latency mutations for cortex m55, m7 and m85 (PR #115153)
Nashe Mncube via llvm-commits
- [llvm] [LLVM][ARM] Latency mutations for cortex m55, m7 and m85 (PR #115153)
Nashe Mncube via llvm-commits
- [llvm] [CodeGen] Use first EHLabel as a stop gate for live range shrinking (PR #114195)
Nathan Chancellor via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
Nathan Chancellor via llvm-commits
- [llvm] [SPIR-V] Fix OpDecorate emission after vreg def. (PR #114426)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Fix OpDecorate emission after vreg def. (PR #114426)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Fix OpDecorate emission after vreg def. (PR #114426)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Fix OpDecorate emission after vreg def. (PR #114426)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Fix OpDecorate emission after vreg def. (PR #114426)
Nathan Gauër via llvm-commits
- [llvm] [MachineVerifier] Query TargetInstrInfo for PHI nodes. (PR #110507)
Nathan Gauër via llvm-commits
- [llvm] [MachineVerifier] Query TargetInstrInfo for PHI nodes. (PR #110507)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Fix OpDecorate emission after vreg def. (PR #114426)
Nathan Gauër via llvm-commits
- [llvm] [MachineVerifier] Query TargetInstrInfo for PHI nodes. (PR #110507)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] No OpBitcast is generated for a bitcast between identical types (PR #114877)
Nathan Gauër via llvm-commits
- [clang] [llvm] [SPIR-V] DRAFT: ext_builtin_input/ext_builtin_output (PR #115187)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [clang] [llvm] [SPIR-V] DRAFT: ext_builtin_input/ext_builtin_output (PR #115187)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Nathan Gauër via llvm-commits
- [llvm] [libc][bazel] Mark socket functions weak (PR #115088)
Nick Desaulniers via llvm-commits
- [clang] [libunwind] [llvm] Replace documentation mentions of IRC with Discord (PR #114276)
Nick Desaulniers via llvm-commits
- [clang] [lld] [llvm] Reapply "Deprecate the `-fbasic-block-sections=labels` option." (PR #110039)
Nick Desaulniers via llvm-commits
- [compiler-rt] [compiler-rt] Include stdlib.h for exit() (PR #115025)
Nico Weber via llvm-commits
- [compiler-rt] [compiler-rt] Include stdlib.h for exit() (PR #115025)
Nico Weber via llvm-commits
- [llvm] [gn build] Enable hwasan for aarch64 Android (PR #115219)
Nico Weber via llvm-commits
- [llvm] c3e9f48 - [gn] port 4d4024e1edf3
Nico Weber via llvm-commits
- [llvm] 7aa02f9 - [gn] port c6f3b7bcd0596d3 (libc++ __config_site HAS_NO -> HAS)
Nico Weber via llvm-commits
- [llvm] [LLVM] Add `LLVMIntrinsicCopyName` to LLVM C API (PR #112197)
Nicolai Hähnle via llvm-commits
- [llvm] [Utils] Remove unused includes (NFC) (PR #114748)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] add control for SimplifyDemandedVectorElts depth limit (PR #113717)
Nikita Popov via llvm-commits
- [llvm] Revert "TLS loads opimization (hoist)" (PR #114740)
Nikita Popov via llvm-commits
- [llvm] Revert "TLS loads opimization (hoist)" (PR #114740)
Nikita Popov via llvm-commits
- [llvm] Reapply [APInt] Enable APInt ctor assertion by default (PR #114539)
Nikita Popov via llvm-commits
- [llvm] 8851ea6 - [ConstantHoist] Fix APInt ctor assertion
Nikita Popov via llvm-commits
- [llvm] Reapply [APInt] Enable APInt ctor assertion by default (PR #114539)
Nikita Popov via llvm-commits
- [llvm] [Analysis] Remove global state from `PluginInline{Advisor,Order}Analysis`. (PR #114615)
Nikita Popov via llvm-commits
- [clang] [compiler-rt] [libcxx] [llvm] [libc++] Replace LIBCXX_ENABLE_STATIC_ABI_LIBRARY & friends by a new LIBCXX_CXX_ABI choice (PR #112978)
Nikita Popov via llvm-commits
- [clang] [llvm] [llvm] Deprecate Type::getPointerTo() (PR #113331)
Nikita Popov via llvm-commits
- [clang] [llvm] [llvm] Deprecate Type::getPointerTo() (PR #113331)
Nikita Popov via llvm-commits
- [clang] [llvm] [llvm] Deprecate Type::getPointerTo() (PR #113331)
Nikita Popov via llvm-commits
- [llvm] IR: introduce CmpInst::isEquivalence (PR #111979)
Nikita Popov via llvm-commits
- [llvm] IR: introduce CmpInst::isEquivalence (PR #111979)
Nikita Popov via llvm-commits
- [llvm] IR: introduce CmpInst::isEquivalence (PR #111979)
Nikita Popov via llvm-commits
- [llvm] Revert "TLS loads opimization (hoist)" (PR #114740)
Nikita Popov via llvm-commits
- [llvm] EarlyCSE: create casts on type-mismatch (PR #113339)
Nikita Popov via llvm-commits
- [llvm] EarlyCSE: create casts on type-mismatch (PR #113339)
Nikita Popov via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
Nikita Popov via llvm-commits
- [llvm] BasicAA: return more PartialAlias when scalable (PR #110519)
Nikita Popov via llvm-commits
- [llvm] [IR] Disallow recursive types (PR #114799)
Nikita Popov via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Nikita Popov via llvm-commits
- [clang] [compiler-rt] [libcxx] [llvm] [libc++] Replace LIBCXX_ENABLE_STATIC_ABI_LIBRARY & friends by a new LIBCXX_CXX_ABI choice (PR #112978)
Nikita Popov via llvm-commits
- [clang] [llvm] [Loads] Check context instruction for context-sensitive derefability (PR #109277)
Nikita Popov via llvm-commits
- [llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #113414)
Nikita Popov via llvm-commits
- [llvm] [sancov] Use heterogeneous lookups with std::map (NFC) (PR #113406)
Nikita Popov via llvm-commits
- [llvm] [INSTR COMBINE] implement combine select into cast (PR #114612)
Nikita Popov via llvm-commits
- [llvm] [SelectionDAG] Remove unneeded assert from SelectionDAG::getSignedConstant. NFC (PR #114336)
Nikita Popov via llvm-commits
- [clang] [llvm] [Loads] Check context instruction for context-sensitive derefability (PR #109277)
Nikita Popov via llvm-commits
- [llvm] [llvm][docs]: update links to `clang-format-diff.py` and `git-clang-format` (PR #114646)
Nikita Popov via llvm-commits
- [llvm] [LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (PR #113126)
Nikita Popov via llvm-commits
- [llvm] [polly] [llvm][ConstraintElimination]Insert ConditionFact into loop header in case of monotonic induction variables (PR #112080)
Nikita Popov via llvm-commits
- [llvm] 46ccefb - [CVP] Fix APInt ctor assertion with i1 urem
Nikita Popov via llvm-commits
- [llvm] Reapply [APInt] Enable APInt ctor assertion by default (PR #114539)
Nikita Popov via llvm-commits
- [llvm] [Inliner] Add support for preserving `nocapture` param attr (PR #113418)
Nikita Popov via llvm-commits
- [llvm] [llvm][docs]: update links to `clang-format-diff.py` and `git-clang-format` (PR #114646)
Nikita Popov via llvm-commits
- [llvm] [llvm][docs] Fix links to clang-format-diff.py and git-clang-format. (PR #110731)
Nikita Popov via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Nikita Popov via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Nikita Popov via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Nikita Popov via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
Nikita Popov via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Nikita Popov via llvm-commits
- [llvm] ValueTracking/test: cover recur limit in non-equal PHIs (PR #113205)
Nikita Popov via llvm-commits
- [llvm] ValueTracking/test: cover recur limit in non-equal PHIs (PR #113205)
Nikita Popov via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Nikita Popov via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Nikita Popov via llvm-commits
- [llvm] EarlyCSE: refactor getOrCreateResult (NFC) (PR #113339)
Nikita Popov via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Nikita Popov via llvm-commits
- [llvm] [NFC] Fix test for zext(shl(trunc)) fold (PR #113778)
Nikita Popov via llvm-commits
- [llvm] [StructuralHash] Refactor (PR #112621)
Nikita Popov via llvm-commits
- [llvm] [LLVM] Fix typo in branch-weights.ll test CEHCK->CHECK (PR #113574)
Nikita Popov via llvm-commits
- [llvm] [LoopVectorize] Fix typo in branch-weights.ll test CEHCK->CHECK (NFC) (PR #113574)
Nikita Popov via llvm-commits
- [llvm] [LoopVectorize] Fix typo in branch-weights.ll test CEHCK->CHECK (NFC) (PR #113574)
Nikita Popov via llvm-commits
- [llvm] [LLVM] Change Intrinsic::ID to encode target and intrinsic index (PR #113576)
Nikita Popov via llvm-commits
- [llvm] [MIPS] Use softPromoteHalf legalization for fp16 rather than PromoteFloat (PR #110199)
Nikita Popov via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Nikita Popov via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
Nikita Popov via llvm-commits
- [llvm] [Analysis] Avoid running transform passes that have just been run (PR #112092)
Nikita Popov via llvm-commits
- [llvm] [Analysis] Avoid running transform passes that have just been run (PR #112092)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Don't special case depth for phi of select (PR #114996)
Nikita Popov via llvm-commits
- [clang] [llvm] Remove leftover uses of llvm::Type::getPointerTo() (PR #114993)
Nikita Popov via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Nikita Popov via llvm-commits
- [llvm] InstCombine: support floating-point equivalences (PR #114975)
Nikita Popov via llvm-commits
- [llvm] [DAGCombiner] Add basic support for `trunc nsw/nuw` (PR #113808)
Nikita Popov via llvm-commits
- [llvm] [DAGCombiner] Add basic support for `trunc nsw/nuw` (PR #113808)
Nikita Popov via llvm-commits
- [llvm] [DAGCombiner] Add basic support for `trunc nsw/nuw` (PR #113808)
Nikita Popov via llvm-commits
- [llvm] [AMDGPU] Support `nuw` and `nusw` in buffer fat pointer lowering (PR #115039)
Nikita Popov via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Nikita Popov via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Nikita Popov via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Nikita Popov via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Nikita Popov via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Nikita Popov via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Nikita Popov via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Nikita Popov via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Nikita Popov via llvm-commits
- [llvm] [SCEV] Disallow simplifying phi(undef, X) to X (PR #115109)
Nikita Popov via llvm-commits
- [llvm] [SCEV] Disallow simplifying phi(undef, X) to X (PR #115109)
Nikita Popov via llvm-commits
- [llvm] [SCEV] Disallow simplifying phi(undef, X) to X (PR #115109)
Nikita Popov via llvm-commits
- [llvm] [SCEVExpander] Don't try to reuse SCEVUnknown values (PR #115141)
Nikita Popov via llvm-commits
- [llvm] [SCEVExpander] Don't try to reuse SCEVUnknown values (PR #115141)
Nikita Popov via llvm-commits
- [llvm] [SCEVExpander] Don't try to reuse SCEVUnknown values (PR #115141)
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- [clang] [llvm] [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (PR #112084)
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- [clang] [llvm] [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (PR #112084)
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- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
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- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
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- [llvm] Revert "TLS loads opimization (hoist)" (PR #114740)
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- [llvm] Revert "TLS loads opimization (hoist)" (PR #114740)
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- [llvm] [ValueTracking] Don't special case depth for phi of select (PR #114996)
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- [llvm] ValueTracking: Do not return nullptr from getUnderlyingObject (PR #115258)
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- [llvm] [Transforms] Remove unused includes (NFC) (PR #115263)
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- [llvm] [SCEVExpander] Don't try to reuse SCEVUnknown values (PR #115141)
Nikita Popov via llvm-commits
- [llvm] [SLP]Support reordered buildvector nodes for better clustering (PR #114284)
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- [llvm] 4fa1e8f - [gold] Fix test after pipeline change
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- [llvm] f43ef53 - [Mem2Reg] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] [InstSimplify] Fix incorrect poison propagation when folding phi (PR #96631)
Nikita Popov via llvm-commits
- [llvm] [InstSimplify] Fix incorrect poison propagation when folding phi (PR #96631)
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- [llvm] [LVI] Remove support for SPF selects (PR #115305)
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- [llvm] [LVI] Remove support for SPF selects (PR #115305)
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- [llvm] [InstSimplify] Fix incorrect poison propagation when folding phi (PR #96631)
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- [llvm] [InstCombine] Eliminate fptrunc/fpext if fast math flags allow it (PR #115027)
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- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
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- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
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- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
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- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
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- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
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- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
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- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
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- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
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- [llvm] [GVN][NewGVN] Take call attributes into account in expressions (PR #114545)
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- [llvm] [InstCombine] Drop nsw in negation of select (PR #112893)
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- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
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- [llvm] [IR] Remove variadic overload of StructType::setBody. NFC. (PR #114421)
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- [llvm] [InstCombine] fold `sub(zext(ptrtoint), zext(ptrtoint))` (PR #115369)
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- [llvm] [SLP]Support reordered buildvector nodes for better clustering (PR #114284)
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- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
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- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
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- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
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- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
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- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
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- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
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- [llvm] [InstCombine] Fix poison safety of folding shufflevector into select (PR #115483)
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- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
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- [llvm] [llvm-reduce] Reduce samesign flag from icmp (PR #115492)
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- [llvm] [SROA] Fix NumPromoted statistic for SROA pass. (PR #115586)
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- [llvm] [SROA] Fix NumPromoted statistic for SROA pass. (PR #115586)
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- [llvm] [Vectorize] Simplify code with MapVector::operator[] (NFC) (PR #115592)
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- [llvm] [DebugInfo] Simplify code with std::map::operator[] (NFC) (PR #115591)
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- [llvm] [InstCombine] add control for SimplifyDemandedVectorElts depth limit (PR #113717)
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- [llvm] [InstCombine] add control for SimplifyDemandedVectorElts depth limit (PR #113717)
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- [llvm] [Inliner] Prevent adding pointer attributes to non-pointer arguments (PR #115569)
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- [llvm] [InstCombine] Preserve metadata from orig load in select fold. (PR #115605)
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- [llvm] [InstCombine] Preserve metadata from orig load in select fold. (PR #115605)
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- [llvm] [InstCombine] Preserve metadata from orig load in select fold. (PR #115605)
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- [llvm] [InstCombine] Preserve metadata from orig load in select fold. (PR #115605)
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- [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
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- [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
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- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
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- [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
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- [llvm] [LangRef] Fix examples for float to int saturating intrinsics (PR #115629)
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- [llvm] [LangRef] Fix examples for float to int saturating intrinsics (PR #115629)
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- [clang] [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
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- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
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- [libcxx] [llvm] [libc++] Refactor the configuration macros to being always defined (PR #112094)
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- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
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- [llvm] [InstCombine] fold `sub(zext(ptrtoint), zext(ptrtoint))` (PR #115369)
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- [llvm] [InstCombine] fold `sub(zext(ptrtoint), zext(ptrtoint))` (PR #115369)
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- [llvm] [InstCombine] fold `sub(zext(ptrtoint), zext(ptrtoint))` (PR #115369)
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- [llvm] [InstCombine] fold `sub(zext(ptrtoint), zext(ptrtoint))` (PR #115369)
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- [llvm] 50850bc - [LV] Add test for preserving flags when widening casts; NFC
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- [llvm] 8af5ae0 - [VPlan] Preserve IR flags when widening casts
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- [llvm] 928460a - [ArgPromotion] Use poison instead of undef as placeholder in deleted metadata [NFC]
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- [llvm] 6070aeb - [Coro] Use poison instead of undef as placeholder [NFC]
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- [llvm] Remove `br i1 undef` from regression tests (PR #115130)
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- [llvm] Remove `br i1 undef` from regression tests (PR #115130)
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- [llvm] Remove `br i1 undef` from regression tests (PR #115130)
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- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
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- [llvm] [ARM] Add early-clobber to MVE VCMLA.f32 (PR #114995)
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- [llvm] 2d56de9 - Revert "[ARM] Add extra tests for CVE-2024-7883 with undef/poison"
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- [llvm] [ARM] Fix CMSE S->NS calls when CONTROL_S.SFPA==0 (CVE-2024-7883) (PR #114433)
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- [llvm] [ARM] Add early-clobber to MVE VCMLA.f32 (PR #114995)
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- [llvm] [ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (PR #115174)
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- [llvm] [ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (PR #115174)
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- [llvm] [ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (PR #115174)
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- [clang] [llvm] [AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (PR #115296)
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- [clang] [llvm] [clang-format] Add CI check confirming ClangFormatStyleOptions.rst is up-to-date. (PR #111513)
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- [llvm] [BOLT][AArch64] Check Last Element Instead of Returning `nullptr` in `lookupStubFromGroup` (PR #114015)
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- [llvm] [BOLT][AArch64] Add support for compact code model (PR #112110)
Paschalis Mpeis via llvm-commits
- [llvm] [BOLT] Fix heatmaps on large BOLTEd binaries. (PR #92815)
Paschalis Mpeis via llvm-commits
- [llvm] [BOLT] DataAggregator support for binaries with multiple text segments (PR #92815)
Paschalis Mpeis via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
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- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
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- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Paschalis Mpeis via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
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- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Paschalis Mpeis via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Paschalis Mpeis via llvm-commits
- [llvm] [BOLT] DataAggregator support for binaries with multiple text segments (PR #92815)
Paschalis Mpeis via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Paschalis Mpeis via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
Patrick Zhang via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
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- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Paul Kirth via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Paul Kirth via llvm-commits
- [llvm] [bolt] Introduce binary analysis tool based on BOLT. (PR #115330)
Paul Kirth via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
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- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
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- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
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- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
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- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
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- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan and ninf flags on par with the nsz flag (PR #114271)
Paul Osmialowski via llvm-commits
- [llvm] [TLI Checker] Extend the targets for Linux, macOS and Windows. (PR #114556)
Paul T Robinson via llvm-commits
- [llvm] [DebugInfo] Add an specification_of attribute to LLVM DebugInfo (PR #115362)
Paul T Robinson via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Paul Walker via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Paul Walker via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Paul Walker via llvm-commits
- [clang] [llvm] [LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (PR #112548)
Paul Walker via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
Paul Walker via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
Paul Walker via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
Paul Walker via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [clang] [llvm] [LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (PR #112548)
Paul Walker via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
Paul Walker via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
Paul Walker via llvm-commits
- [clang] [llvm] [LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (PR #112548)
Paul Walker via llvm-commits
- [clang] [llvm] [LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (PR #112548)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover all combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] Vector masked extract last active element intrinsic (PR #113587)
Paul Walker via llvm-commits
- [llvm] Vector masked extract last active element intrinsic (PR #113587)
Paul Walker via llvm-commits
- [llvm] Vector masked extract last active element intrinsic (PR #113587)
Paul Walker via llvm-commits
- [llvm] Vector masked extract last active element intrinsic (PR #113587)
Paul Walker via llvm-commits
- [llvm] Vector masked extract last active element intrinsic (PR #113587)
Paul Walker via llvm-commits
- [llvm] Vector masked extract last active element intrinsic (PR #113587)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover all combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] Vector masked extract last active element intrinsic (PR #113587)
Paul Walker via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
Paul Walker via llvm-commits
- [clang] [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan and ninf flags on par with the nsz flag (PR #114271)
Paul Walker via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover all combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Paul Walker via llvm-commits
- [llvm] [SelectionDAG] Add support for extending masked loads in computeKnownBits (PR #115450)
Paul Walker via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Pavel Iliin via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Pavel Iliin via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (PR #114387)
Pavel Iliin via llvm-commits
- [lldb] [llvm] [lldb-dap] Support column breakpoints (PR #113787)
Pavel Labath via llvm-commits
- [lldb] [llvm] [lldb-dap] Support column breakpoints (PR #113787)
Pavel Labath via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Pavel Labath via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
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- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
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- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
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- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Pavel Labath via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Pavel Labath via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
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- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
Peilin Ye via llvm-commits
- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
Peilin Ye via llvm-commits
- [llvm] [RISCV] Lower vector_shuffle for bf16 (PR #114731)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Lower fixed-length strided VP loads and stores for zvfhmin/zvfbfmin (PR #114750)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add load/store clustering in post machine schedule (PR #111504)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Refine vector division latencies in SiFive P600's scheduling model (PR #115038)
Pengcheng Wang via llvm-commits
- [llvm] [CodeGen][MISched] Set DumpDirection after initPolicy (PR #115112)
Pengcheng Wang via llvm-commits
- [llvm] [CodeGen][MISched] Set DumpDirection after initPolicy (PR #115112)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add tests for memcmp expansion (PR #107824)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add +unaligned-scalar-mem to spacemit-x60 (PR #115125)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add test cases for RV64 i128<->half/float/double (PR #115124)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add load/store clustering in post machine schedule (PR #111504)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add load/store clustering in post machine schedule (PR #111504)
Pengcheng Wang via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal strided access (PR #115264)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (PR #115272)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add vcpop.m/vfirst.m to RISCVMaskedPseudosTable (PR #115162)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Add vcpop.m/vfirst.m to RISCVMaskedPseudosTable (PR #115162)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV][AsmParser] Allow parsing vset{i}vli omitting LMUL parameter (PR #115277)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Only allow 5 bit shift amounts in disassembler for RV32. (PR #115432)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Pengcheng Wang via llvm-commits
- [llvm] [MISched] Add a hook to override PostRA scheduling policy (PR #115455)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Pengcheng Wang via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Pengcheng Wang via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Pengcheng Wang via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Update SiFive P600's scheduling model on RVV instructions (PR #115243)
Pengcheng Wang via llvm-commits
- [llvm] [MISched] Add a hook to override PostRA scheduling policy (PR #115455)
Pengcheng Wang via llvm-commits
- [llvm] [MISched] Add a hook to override PostRA scheduling policy (PR #115455)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Pengcheng Wang via llvm-commits
- [llvm] Revert "AMDGPU/GlobalISel: Add stub custom regbankselect pass" (PR #113913)
Petar Avramovic via llvm-commits
- [llvm] Revert "AMDGPU/GlobalISel: Add stub custom regbankselect pass" (PR #113913)
Petar Avramovic via llvm-commits
- [lld] [ELF] Add context-aware diagnostic functions (PR #112319)
Peter Smith via llvm-commits
- [lld] [ELF] Add context-aware diagnostic functions (PR #112319)
Peter Smith via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Peter Smith via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Peter Smith via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Peter Smith via llvm-commits
- [llvm] [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (PR #113408)
Peter Smith via llvm-commits
- [compiler-rt] [libunwind] [llvm] [cmake] Remove obsolete files, docs and CMake variables related to the standalone build (PR #112741)
Petr Hosek via llvm-commits
- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
Petr Hosek via llvm-commits
- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
Petr Hosek via llvm-commits
- [clang] [compiler-rt] [libcxx] [llvm] [libc++] Replace LIBCXX_ENABLE_STATIC_ABI_LIBRARY & friends by a new LIBCXX_CXX_ABI choice (PR #112978)
Petr Hosek via llvm-commits
- [clang] [compiler-rt] [libcxx] [llvm] [libc++] Replace LIBCXX_ENABLE_STATIC_ABI_LIBRARY & friends by a new LIBCXX_CXX_ABI choice (PR #112978)
Petr Hosek via llvm-commits
- [libc] [llvm] [libc] Support multilib with runtimes build (PR #115357)
Petr Hosek via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [llvm] [RISCV] RVA23S64 should include H extension (PR #115572)
Petr Penzin via llvm-commits
- [llvm] [RISCV] RVA23S64 should include H extension (PR #115572)
Petr Penzin via llvm-commits
- [llvm] [RISCV] RVA23S64 should include H extension (PR #115572)
Petr Penzin via llvm-commits
- [llvm] [RISCV] RVA23S64 should include H extension (PR #115572)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [clang] [llvm] [RISCV] Add TT-Ascalon-d8 processor (PR #115100)
Petr Penzin via llvm-commits
- [llvm] ValueTracking: clarify isNotCrossLaneOperation (NFC) (PR #112375)
Philip Reames via llvm-commits
- [llvm] [RISCV] Allow undef elements in isDeinterleaveShuffle (PR #114585)
Philip Reames via llvm-commits
- [llvm] [RISCV] Allow undef elements in isDeinterleaveShuffle (PR #114585)
Philip Reames via llvm-commits
- [llvm] 176d653 - [RISCV] Add tests for single source interleave shuffles
Philip Reames via llvm-commits
- [llvm] 2c95fb9 - [test] Autogen a test to reflect a name change
Philip Reames via llvm-commits
- [llvm] [RISCV] Allow vslidedown.vx in isExtractSubvectorCheap for half VT case (PR #114886)
Philip Reames via llvm-commits
- [llvm] [RISCV] Allow vslidedown.vx in isExtractSubvectorCheap for half VT case (PR #114886)
Philip Reames via llvm-commits
- [llvm] d0bbe4f - [RISCV] Improve interleave load coverage (NF7, NF8, and one hot)
Philip Reames via llvm-commits
- [llvm] [RISCV][TTI] Implement instruction cost for vp.reduce.* (PR #114184)
Philip Reames via llvm-commits
- [llvm] [RISCV] Prefer strided load for interleave load with only one lane active (PR #115069)
Philip Reames via llvm-commits
- [llvm] [RISCV] Match single source deinterleave shuffles for vnsrl (PR #114878)
Philip Reames via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
Philip Reames via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
Philip Reames via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
Philip Reames via llvm-commits
- [llvm] [RISCV] Lower fixed-length vp_{gather,scatter} for zvfhmin/zvfbfmin (PR #115253)
Philip Reames via llvm-commits
- [llvm] [BasicTTI] When costing a scalarized cast, use distinct src and dest types (PR #109325)
Philip Reames via llvm-commits
- [llvm] [BasicTTI] When costing a scalarized cast, use distinct src and dest types (PR #109325)
Philip Reames via llvm-commits
- [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)
Philip Reames via llvm-commits
- [llvm] [RISCV][TTI] Fix a costing mistake for truncate/fp_round with LMUL>m1 (PR #101051)
Philip Reames via llvm-commits
- [llvm] [indvars] Prove non-negative for widening IVs in count down loops (PR #71214)
Philip Reames via llvm-commits
- [llvm] [indvars] Prove non-negative for widening IVs in count down loops (PR #71214)
Philip Reames via llvm-commits
- [llvm] [indvars] Allow widenWithVariantUse to succeed without extend users (PR #71557)
Philip Reames via llvm-commits
- [llvm] [indvars] Allow widenWithVariantUse to succeed without extend users (PR #71557)
Philip Reames via llvm-commits
- [llvm] c02da38 - [RISCV] Add tests for deinterleave(2-8) shuffles
Philip Reames via llvm-commits
- [llvm] [RISCV] Match single source deinterleave shuffles for vnsrl (PR #114878)
Philip Reames via llvm-commits
- [llvm] [RISCV] Match single source deinterleave shuffles for vnsrl (PR #114878)
Philip Reames via llvm-commits
- [llvm] [RISCV] When using global merging, don't enable merging of external globals by default (PR #115484)
Philip Reames via llvm-commits
- [llvm] [RISCV] Enable global merging by default (PR #115495)
Philip Reames via llvm-commits
- [llvm] [IR] Initial introduction of memset_pattern (PR #97583)
Philip Reames via llvm-commits
- [llvm] [RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (PR #115272)
Philip Reames via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Philip Reames via llvm-commits
- [llvm] [MISched] Add a hook to override PostRA scheduling policy (PR #115455)
Philip Reames via llvm-commits
- [llvm] [RISCV] Add a feature to indicate the whole register move won't trap on vill (PR #114942)
Philip Reames via llvm-commits
- [llvm] [RISCV] Set a barrier between mask producer and user of V0 (PR #114012)
Philip Reames via llvm-commits
- [llvm] [RISCV] Set a barrier between mask producer and user of V0 (PR #114012)
Philip Reames via llvm-commits
- [llvm] [RISCV] Set a barrier between mask producer and user of V0 (PR #114012)
Philip Reames via llvm-commits
- [llvm] [RegAlloc][RISCV] Increase the spill weight by target factor (PR #113675)
Philip Reames via llvm-commits
- [llvm] [Statepoint] Treat result of atomicrmw xchg as a base pointer (PR #97280)
Philip Reames via llvm-commits
- [llvm] [Statepoint] Treat result of atomicrmw xchg as a base pointer (PR #97280)
Philip Reames via llvm-commits
- [llvm] [Statepoint] Treat result of atomicrmw xchg as a base pointer (PR #97280)
Philip Reames via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
Philip Reames via llvm-commits
- [llvm] [RISCV][DAG][TLI] Avoid scalarizing length decreasing shuffles (PR #115532)
Philip Reames via llvm-commits
- [llvm] [RISCV] Always combine scalarized shufflevectors back to vector_shuffle (PR #88147)
Philip Reames via llvm-commits
- [llvm] [RISCV][DAG][TLI] Avoid scalarizing length decreasing shuffles (PR #115532)
Philip Reames via llvm-commits
- [llvm] [RISCV][DAG][TLI] Avoid scalarizing length decreasing shuffles (PR #115532)
Philip Reames via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
Phoebe Wang via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
Phoebe Wang via llvm-commits
- [llvm] [X86][AMX] Reserve all pair registers when AMXTRANSPOSE is not ready (PR #114706)
Phoebe Wang via llvm-commits
- [llvm] [X86][AMX] Reserve all pair registers when AMXTRANSPOSE is not ready (PR #114706)
Phoebe Wang via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
Phoebe Wang via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
Phoebe Wang via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [llvm] Test added for x86-instr-mapping (PR #115170)
Phoebe Wang via llvm-commits
- [llvm] Revert "TLS loads opimization (hoist)" (PR #114740)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [llvm] Test added for x86-instr-mapping (PR #115170)
Phoebe Wang via llvm-commits
- [llvm] [X86] visitSelect - widen select(cond,extract_subvector(shuffle(vec0)),vec1) if it will create a mask instruction (PR #115223)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [llvm] [X86] Recognize POP/ADD/SUB modifying rsp in getSPAdjust. (PR #114265)
Phoebe Wang via llvm-commits
- [llvm] [X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X, C1), C2) --> kshiftr(X, C1+C2) (PR #115528)
Phoebe Wang via llvm-commits
- [llvm] [X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X, C1), C2) --> kshiftr(X, C1+C2) (PR #115528)
Phoebe Wang via llvm-commits
- [clang] [llvm] Reland "[X86][AMX] Support AMX-AVX512" (PR #115581)
Phoebe Wang via llvm-commits
- [clang] [llvm] Reland "[X86][AMX] Support AMX-AVX512" (PR #115581)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Phoebe Wang via llvm-commits
- [llvm] Fix mistake in #113532 (PR #115631)
Phoebe Wang via llvm-commits
- [llvm] Fix mistake in #113532 (PR #115631)
Phoebe Wang via llvm-commits
- [llvm] Fix mistake in #113532 (PR #115631)
Phoebe Wang via llvm-commits
- [llvm] Fix mistakes in #113532 (PR #115631)
Phoebe Wang via llvm-commits
- [llvm] Fix mistakes in #113532 (PR #115631)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
Phoebe Wang via llvm-commits
- [llvm] Fix mistakes in #113532 (PR #115631)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TRANSPOSE, part 2 (PR #115660)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
Phoebe Wang via llvm-commits
- [llvm] AMDGPU: Fix clobbering temp reg for large frame indexes in VOP3 users (PR #114924)
Pierre van Houtryve via llvm-commits
- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
Pierre van Houtryve via llvm-commits
- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
Pierre van Houtryve via llvm-commits
- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Piotr Sobczak via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Piotr Sobczak via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Piotr Sobczak via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Piotr Sobczak via llvm-commits
- [llvm] [bazel] Clean up unused exported files (PR #114620)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add :support to ast target (PR #115014)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add :support to ast target (PR #115014)
Pranav Kant via llvm-commits
- [llvm] [bazel] Unbreak bazel bot (PR #115016)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add :support to ast target (PR #115014)
Pranav Kant via llvm-commits
- [llvm] [bazel] Unbreak bazel bot (PR #115016)
Pranav Kant via llvm-commits
- [llvm] [bazel] Unbreak bazel bot (PR #115016)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add dep on Analysis to fix build break (PR #115033)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add dep on Analysis to fix build break (PR #115033)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add dep on Analysis to fix build break (PR #115033)
Pranav Kant via llvm-commits
- [llvm] [bazel] Clean up unused exported files (PR #114620)
Pranav Kant via llvm-commits
- [llvm] [bazel] Fix mlir:VectorToSPIRV (PR #115188)
Pranav Kant via llvm-commits
- [llvm] [bazel] Fix mlir:VectorToSPIRV (PR #115188)
Pranav Kant via llvm-commits
- [llvm] [bazel] Fix mlir:VectorToSPIRV (PR #115188)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add dep to BuiltinDialectTdFiles (PR #115217)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add dep to BuiltinDialectTdFiles (PR #115217)
Pranav Kant via llvm-commits
- [llvm] [bazel] Add dep to BuiltinDialectTdFiles (PR #115217)
Pranav Kant via llvm-commits
- [llvm] [bazel] Fix AMXDialect (PR #115221)
Pranav Kant via llvm-commits
- [llvm] [bazel] Fix AMXDialect (PR #115221)
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- [llvm] [bazel] Fix AMXDialect (PR #115221)
Pranav Kant via llvm-commits
- [llvm] Revert "Add clang::lifetimebound annotation to llvm::function_ref (#1… (PR #115376)
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- [llvm] [bazel] Remove mlir-spirv-cpu-runner after 0e39b1348e5fcadb129a6f113e… (PR #115533)
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- [llvm] [bazel][libc] Add exp10m1f (PR #115565)
Pranav Kant via llvm-commits
- [llvm] [bazel][libc] Add exp10m1f (PR #115565)
Pranav Kant via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
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- [clang] [llvm] Revert "[X86][AMX] Support AMX-AVX512" (PR #115570)
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- [clang] [lld] [llvm] [mlir] [llvm-project] Fix typo "propogate" (PR #114795)
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- [llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)
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- [llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
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- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Marking super-reg as implicit-def in first spill instruction (PR #114773)
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- [llvm] [AMDGPU][NFC] Precommit tests representing spills. (PR #115270)
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- [llvm] [AMDGPU][NFC] Precommit tests representing spills. (PR #115270)
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- [llvm] [AMDGPU][NFC] Precommit tests representing agpr spills. (PR #115270)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU][NFC] Precommit tests representing agpr spills. (PR #115270)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU][NFC] Precommit tests representing agpr spills. (PR #115270)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Pravin Jagtap via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Pravin Jagtap via llvm-commits
- [llvm] [InstCombine] add control for SimplifyDemandedVectorElts depth limit (PR #113717)
Princeton Ferro via llvm-commits
- [llvm] [Timer] initialize timer options before group (PR #113719)
Princeton Ferro via llvm-commits
- [llvm] [InstCombine] add control for SimplifyDemandedVectorElts depth limit (PR #113717)
Princeton Ferro via llvm-commits
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Princeton Ferro via llvm-commits
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Princeton Ferro via llvm-commits
- [llvm] [Instructions] cache computed shufflevector properties (PR #115536)
Princeton Ferro via llvm-commits
- [llvm] [Instructions] cache computed shufflevector properties (PR #115536)
Princeton Ferro via llvm-commits
- [llvm] [CalcSpillWeights] Simplify copy hint register collection. NFC. (PR #114236)
Quentin Colombet via llvm-commits
- [llvm] CodeGen: Don't assert when printing null GlobalAddress operands (PR #115531)
Quentin Colombet via llvm-commits
- [llvm] [MergeFunctions] Add support to run the pass over a set of function pointers (PR #111045)
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- [llvm] [MergeFunctions] Add support to run the pass over a set of function pointers (PR #111045)
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- [llvm] [MergeFunctions] Add support to run the pass over a set of function pointers (PR #111045)
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- [llvm] [MergeFunctions] Add support to run the pass over a set of function pointers (PR #111045)
Rafael Eckstein via llvm-commits
- [llvm] [MergeFunctions] Add support to run the pass over a set of function pointers (PR #111045)
Rafael Eckstein via llvm-commits
- [llvm] [LLVM] Add `LLVMIntrinsicCopyName` to LLVM C API (PR #112197)
Rahul Joshi via llvm-commits
- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
Rahul Joshi via llvm-commits
- [llvm] [LLVM] Change `LLVMIntrinsicCopyOverloadedName` API return type (PR #114334)
Rahul Joshi via llvm-commits
- [llvm] StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (PR #114836)
Rahul Joshi via llvm-commits
- [llvm] [LLVM][AsmParser] Add support for C style comments (PR #111554)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Rahul Joshi via llvm-commits
- [llvm] [NFC] Eliminate use of `lookupLLVMIntrinsicByName` in Coroutines (PR #114851)
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- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
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- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
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- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
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- [llvm] [NFC] Eliminate use of `lookupLLVMIntrinsicByName` in Coroutines (PR #114851)
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- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
Rahul Joshi via llvm-commits
- [llvm] [LLVM] Change Intrinsic::ID to encode target and intrinsic index (PR #113576)
Rahul Joshi via llvm-commits
- [llvm] [LLVM] Add `LLVMIntrinsicCopyName` to LLVM C API (PR #112197)
Rahul Joshi via llvm-commits
- [llvm] [LLVM] Change Intrinsic::ID to encode target and intrinsic index (PR #113576)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)
Rahul Joshi via llvm-commits
- [llvm] [LLVM][AsmParser] Add support for C style comments (PR #111554)
Rahul Joshi via llvm-commits
- [llvm] [LLVM][AsmParser] Add support for C style comments (PR #111554)
Rahul Joshi via llvm-commits
- [llvm] [NFC] Eliminate use of `lookupLLVMIntrinsicByName` in Coroutines (PR #114851)
Rahul Joshi via llvm-commits
- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
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- [compiler-rt] [ASan][test] Enable ASan tests on SPARC (PR #107405)
Rainer Orth via llvm-commits
- [compiler-rt] [ASan][test] Enable ASan tests on SPARC (PR #107405)
Rainer Orth via llvm-commits
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
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- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
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- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
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- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
Rakshit Patel via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
Rakshit Patel via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
Rakshit Patel via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
Rakshit Patel via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
Rakshit Patel via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
Rakshit Patel via llvm-commits
- [llvm] CodeGen/test: improve a test, regen with UTC (PR #113338)
Ramkumar Ramachandra via llvm-commits
- [llvm] CodeGen/test: improve a test, regen with UTC (PR #113338)
Ramkumar Ramachandra via llvm-commits
- [llvm] IR: introduce CmpInst::isEquivalence (PR #111979)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: clarify isNotCrossLaneOperation (NFC) (PR #112375)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] CodeGen/NVPTX: regen a test, fixing build (PR #114779)
Ramkumar Ramachandra via llvm-commits
- [llvm] CodeGen/NVPTX: regen a test, fixing build (PR #114779)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: create casts on type-mismatch (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: create casts on type-mismatch (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] IR: introduce CmpInst::isEquivalence (PR #111979)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: create casts on type-mismatch (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] BasicAA: return more PartialAlias when scalable (PR #110519)
Ramkumar Ramachandra via llvm-commits
- [llvm] BasicAA: return more PartialAlias when scalable (PR #110519)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: create casts on type-mismatch (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: create bitcast on type-mismatch (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: create bitcast on type-mismatch (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: clarify isNotCrossLaneOperation (NFC) (PR #112375)
Ramkumar Ramachandra via llvm-commits
- [llvm] IR: introduce CmpInst::isEquivalence (PR #111979)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking/test: cover recur limit in non-equal PHIs (PR #113205)
Ramkumar Ramachandra via llvm-commits
- [llvm] GVN: strip bad TODO, FIXME (NFC) (PR #111416)
Ramkumar Ramachandra via llvm-commits
- [llvm] CodeGen/test: improve a test, regen with UTC (PR #113338)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking/test: cover recur limit in non-equal PHIs (PR #113205)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking/test: cover recur limit in non-equal PHIs (PR #113205)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstCombine: support floating-point equivalences (PR #114975)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking/test: cover recur limit in non-equal PHIs (PR #113205)
Ramkumar Ramachandra via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: create bitcast on type-mismatch (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: refactor getOrCreateResult (NFC) (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: refactor getOrCreateResult (NFC) (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: refactor getOrCreateResult (NFC) (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Ramkumar Ramachandra via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Ramkumar Ramachandra via llvm-commits
- [llvm] KnownBits: generalize high-bits of mul to overflows (PR #114211)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: refactor getOrCreateResult (NFC) (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstCombine: support floating-point equivalences (PR #114975)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: refactor getOrCreateResult (NFC) (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] EarlyCSE: refactor getOrCreateResult (NFC) (PR #113339)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: pre-commit udiv/urem recurrence tests (PR #109198)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
Ramkumar Ramachandra via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Ramkumar Ramachandra via llvm-commits
- [llvm] KnownBits: refine high-bits of mul in signed case (PR #113051)
Ramkumar Ramachandra via llvm-commits
- [llvm] KnownBits: generalize high-bits of mul to overflows (PR #114211)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking/test: cover known bits of mul (PR #113050)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: pre-commit udiv/urem recurrence tests (PR #109198)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
Ramkumar Ramachandra via llvm-commits
- [clang] [llvm] Introduce a new WebKit checker for a unchecked call arguments (#113708) (PR #114522)
Rashmi Mudduluru via llvm-commits
- [clang] [llvm] Introduce a new WebKit checker for a unchecked call arguments (#113708) (PR #114522)
Rashmi Mudduluru via llvm-commits
- [clang] [llvm] Introduce a new WebKit checker for a unchecked call arguments (#113708) (PR #114522)
Rashmi Mudduluru via llvm-commits
- [clang] [llvm] Introduce a new WebKit checker for a unchecked call arguments (#113708) (PR #114522)
Rashmi Mudduluru via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
Reid Kleckner via llvm-commits
- [compiler-rt] [win/asan] Search both higher and lower in AllocateTrampolineRegion (PR #114212)
Reid Kleckner via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
Reid Kleckner via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
Reid Kleckner via llvm-commits
- [llvm] [WebAssembly] Fix rethrow's index calculation (PR #114693)
Reid Kleckner via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
Reid Kleckner via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Ricardo Jesus via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover all combinations. (PR #115189)
Ricardo Jesus via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover all combinations. (PR #115189)
Ricardo Jesus via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover all combinations. (PR #115189)
Ricardo Jesus via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Ricardo Jesus via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Ricardo Jesus via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Ricardo Jesus via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover more combinations. (PR #115189)
Ricardo Jesus via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Ricardo Jesus via llvm-commits
- [llvm] [AArch64] Add missing ASIMD FP convert instructions to scheduling model (PR #115146)
Rin Dobrescu via llvm-commits
- [llvm] [AArch64] Add missing ASIMD FP convert instructions to scheduling model (PR #115146)
Rin Dobrescu via llvm-commits
- [llvm] [AArch64] Add missing ASIMD FP convert instructions to scheduling model (PR #115146)
Rin Dobrescu via llvm-commits
- [llvm] [AArch64] Define high bits of FPR and GPR registers (take 2) (PR #114827)
Rin Dobrescu via llvm-commits
- [llvm] [AArch64] Define high bits of FPR and GPR registers (take 2) (PR #114827)
Rin Dobrescu via llvm-commits
- [llvm] [llvm][docs] Fix links to clang-format-diff.py and git-clang-format. (PR #110731)
Ryan Mansfield via llvm-commits
- [llvm] [dsymutil] Add missing newlines in error messages. (PR #115191)
Ryan Mansfield via llvm-commits
- [clang] [llvm] Introduce a new WebKit checker for a unchecked call arguments (#113708) (PR #114522)
Ryosuke Niwa via llvm-commits
- [clang] [llvm] Introduce a new WebKit checker for a unchecked call arguments (#113708) (PR #114522)
Ryosuke Niwa via llvm-commits
- [clang] [llvm] Introduce a new WebKit checker for a unchecked call arguments (#113708) (PR #114522)
Ryosuke Niwa via llvm-commits
- [clang] [llvm] Introduce a new WebKit checker for a unchecked call arguments (#113708) (PR #114522)
Ryosuke Niwa via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
Sagar Shelke via llvm-commits
- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
Sagar Shelke via llvm-commits
- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
Sagar Shelke via llvm-commits
- [llvm] [CMake] Enable CMP0156 if available (PR #115046)
Saleem Abdulrasool via llvm-commits
- [llvm] [X86] Switch to the new symbol visibility macros (PR #109982)
Saleem Abdulrasool via llvm-commits
- [llvm] [X86] Switch to the new symbol visibility macros (PR #109982)
Saleem Abdulrasool via llvm-commits
- [llvm] [llvm] Add explicit visibility macros to YAMLTraits classes (PR #111484)
Saleem Abdulrasool via llvm-commits
- [llvm] [llvm] Add explicit visibility macros to YAMLTraits classes (PR #111484)
Saleem Abdulrasool via llvm-commits
- [lld] [lld][WebAssemlby] Implement --thinlto-object-suffix-replace/--thinlto-prefix-replace (PR #114625)
Sam Clegg via llvm-commits
- [lld] [lld][WebAssemlby] Implement --thinlto-object-suffix-replace/--thinlto-prefix-replace (PR #114625)
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- [lld] [lld][WebAssemlby] Implement --thinlto-object-suffix-replace/--thinlto-prefix-replace (PR #114625)
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- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
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- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
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- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
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- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
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- [llvm] [WebAssembly] Support multiple `.init_array` fragments when writing Wasm objects (PR #111008)
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- [clang] [llvm] [RISCV] Inline Assembly Support for GPR Pairs ('Pr') (PR #112983)
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- [llvm] Add support for single reductions in ComplexDeinterleavingPass (PR #112875)
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- [llvm] [TableGen] Fix concatenation of subreg and artificial subregs (PR #114391)
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- [llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
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- [llvm] [TableGen] Fix concatenation of subreg and artificial subregs (PR #114391)
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- [llvm] [TableGen] Fix concatenation of subreg and artificial subregs (PR #114391)
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- [llvm] [TableGen] Fix concatenation of subreg and artificial subregs (PR #114391)
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- [llvm] [TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (PR #114392)
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- [llvm] [AArch64] Define high bits of FPR and GPR registers (take 2) (PR #114827)
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- [llvm] [SDAG] Merge multiple-result libcall expansion into DAG.expandMultipleResultFPLibCall() (PR #114792)
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- [clang] [llvm] [HLSL] implement elementwise firstbithigh hlsl builtin (PR #111082)
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- [clang] [llvm] [HLSL] implement elementwise firstbithigh hlsl builtin (PR #111082)
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- [clang] [llvm] [HLSL] implement elementwise firstbithigh hlsl builtin (PR #111082)
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- [clang] [llvm] [HLSL] implement elementwise firstbithigh hlsl builtin (PR #111082)
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- [clang] [llvm] [HLSL] implement elementwise firstbithigh hlsl builtin (PR #111082)
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- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
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- [clang] [llvm] [HLSL][DXIL] Implement `asdouble` intrinsic (PR #114847)
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- [clang] [compiler-rt] [XRay][AArch64] Support -fxray-shared (PR #114431)
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- [clang] [compiler-rt] [XRay][AArch64] Support -fxray-shared (PR #114431)
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- [clang] [compiler-rt] [XRay][AArch64] Support -fxray-shared (PR #114431)
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- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
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- [llvm] [TableGen][GISel] Extract helper function for constraining operands (PR #115148)
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- [llvm] [TableGen][SelectionDAG] Remove the `implicit` DAG node (PR #115295)
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- [llvm] [TableGen][SelectionDAG] Remove the `implicit` DAG node (PR #115295)
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- [llvm] [Xtensa] Implement support for the BranchRelaxation. (PR #113450)
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- [llvm] [PowerPC] Add `SDNPMemOperand` to some nodes (PR #115580)
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- [llvm] [AMDGPU] Remove unused AMDGPUISD enum members (NFC) (PR #115582)
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- [llvm] [X86] Delete unused X86setcc_commute node (PR #115650)
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- [llvm] [TableGen] Don't instantiate CodeGenDAGPatterns where unnecessary (PR #115689)
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- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
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- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
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- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
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- [clang] [llvm] [opt][AMDGPU] Add pass to handle AMDGCN pseudo-intrinsics, start with `llvm.amdgcn.wavefrontsize` (PR #114481)
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- [clang] [lld] [llvm] [mlir] [llvm-project] Fix typo "propogate" (PR #114795)
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- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
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- [llvm] AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (PR #114144)
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- [llvm] [AMDGPU][Attributor] Make `AAAMDFlatWorkGroupSize` honor existing attribute (PR #114357)
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- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
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- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
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- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
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- [llvm] [NFC][AMDGPU] Guard FP8 related instructions properly (PR #115211)
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- [llvm] [NFC][AMDGPU] Guard FP8 related instructions properly (PR #115211)
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- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
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- [llvm] AMDGPU: Propagate amdgpu-max-num-workgroups attribute (PR #113018)
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- [llvm] [OpenMP] Add missing SExt attributes on __kmpc_omp_taskwait_deps_51 args. (PR #115242)
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- [llvm] [AMDGPU] Introduce a "new" target feature `xf32-insts` (PR #115214)
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- [llvm] [AMDGPU] Re-enable closed-world assumption as an opt-out feature (PR #115371)
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- [llvm] bfa3ffb - [FIX] Add missing component introduced in #115218
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- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #112403)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #112403)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #112403)
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- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
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- [llvm] fef4c8a - [AMDGPU] Disable verifier in `call-args-inreg-no-sgpr-for-csrspill-xfail.ll`
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- [llvm] Reapply [AMDGPU] Avoid resource propagation for recursion through multiple functions (PR #112251)
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- [llvm] c93e001 - [FIX][AMDGPU] Fix test case failures that caused by reapply of #112403
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- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
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- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Shilei Tian via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Shilei Tian via llvm-commits
- [llvm] [Code Coverage] Add a tool to check test coverage of a patch (PR #71841)
Shivam Gupta via llvm-commits
- [llvm] [Code Coverage] Add a tool to check test coverage of a patch (PR #71841)
Shivam Gupta via llvm-commits
- [llvm] [Code Coverage] Add a tool to check test coverage of a patch (PR #71841)
Shivam Gupta via llvm-commits
- [llvm] [Code Coverage] Add a tool to check test coverage of a patch (PR #71841)
Shivam Gupta via llvm-commits
- [llvm] [Code Coverage] Add a tool to check test coverage of a patch (PR #71841)
Shivam Gupta via llvm-commits
- [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] [NFC] Move DroppedVariableStats to its own file. (PR #115563)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Add a pass to collect dropped var stats for MIR. (PR #115566)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Add a pass to collect dropped var stats for MIR. (PR #115566)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Add a pass to collect dropped var stats for MIR. (PR #115566)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Add a pass to collect dropped var stats for MIR. (PR #115566)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] [NFC] Move DroppedVariableStats to its own file. (PR #115563)
Shubham Sandeep Rastogi via llvm-commits
- [lld] [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #77884)
Simon Cook via llvm-commits
- [lld] [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #77884)
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- [lld] [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #77884)
Simon Cook via llvm-commits
- [llvm] [CostModel][X86] Add initial costs for non-lane-crossing one/two input shuffles (PR #114680)
Simon Pilgrim via llvm-commits
- [llvm] [CostModel][X86] Add initial costs for non-lane-crossing one/two input shuffles (PR #114680)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - ignore SRL node if we're just demanding known sign bits (PR #114805)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Simon Pilgrim via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Simon Pilgrim via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Simon Pilgrim via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Simon Pilgrim via llvm-commits
- [llvm] [llvm-exegesis] Use older instructions to load lower vregs (PR #114768)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - ignore SRL node if we're just demanding known sign bits (PR #114805)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Support reordered buildvector nodes for better clustering (PR #114284)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
Simon Pilgrim via llvm-commits
- [llvm] a88be11 - [VectorCombine] Add test coverage for #114901
Simon Pilgrim via llvm-commits
- [llvm] 05e838f - [VectorCombine] foldExtractedCmps - disable fold on non-commutative binops
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (PR #114992)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
Simon Pilgrim via llvm-commits
- [llvm] 5df3872 - [DAG] visitAND - refactor "and (sub 0, ext(bool X)), 1 --> zext(bool X)" to use SDPatternMatch.
Simon Pilgrim via llvm-commits
- [llvm] [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (PR #114992)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (PR #114992)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Simon Pilgrim via llvm-commits
- [llvm] 7f5a13d - [X86] vector-idiv-udiv-512.ll - regenerate test checks with vpternlog comments
Simon Pilgrim via llvm-commits
- [llvm] 560517f - [X86] vector-fshl-*- regenerate test checks with vpternlog comments
Simon Pilgrim via llvm-commits
- [llvm] 1715549 - [X86] vector-fshr-*- regenerate test checks with vpternlog comments
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Simon Pilgrim via llvm-commits
- [llvm] 02e5c25 - [X86] SimplifyDemandedBitsForTargetNode - cleanup SSE shift-by-immediate handlers. NFC.
Simon Pilgrim via llvm-commits
- [llvm] 61d5add - [X86] SimplifyDemandedBitsForTargetNode - call SimplifyMultipleUseDemandedBits on SSE shift-by-immediate nodes.
Simon Pilgrim via llvm-commits
- [llvm] c753533 - [X86] combineConcatVectorOps - add 256-bit concat(shuffle(),shuffle()) handling
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (PR #115150)
Simon Pilgrim via llvm-commits
- [llvm] e3a0775 - [VectorCombine] foldExtractedCmps - (re-)enable fold on non-commutative binops
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] 6ccbf1d - [X86] combineSelect - use SelectableOp helper to match the zero operand as well as the target shuffle
Simon Pilgrim via llvm-commits
- [llvm] [X86] visitSelect - widen select(cond,extract_subvector(shuffle(vec0)),vec1) if it will create a mask instruction (PR #115223)
Simon Pilgrim via llvm-commits
- [llvm] 490e58a - Fix MSVC "not all control paths return a value" warning. NFC
Simon Pilgrim via llvm-commits
- [llvm] [AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (PR #115292)
Simon Pilgrim via llvm-commits
- [llvm] [X86] visitSelect - widen select(cond,extract_subvector(shuffle(vec0)),vec1) if it will create a mask instruction (PR #115223)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (PR #115292)
Simon Pilgrim via llvm-commits
- [llvm] [AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (PR #115292)
Simon Pilgrim via llvm-commits
- [llvm] [AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (PR #115292)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (PR #115292)
Simon Pilgrim via llvm-commits
- [llvm] [X86] visitSelect - widen select(cond,extract_subvector(shuffle(vec0)),vec1) if it will create a mask instruction (PR #115223)
Simon Pilgrim via llvm-commits
- [llvm] [AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (PR #115292)
Simon Pilgrim via llvm-commits
- [llvm] 4f24d03 - [VectorCombine] Use explicit ExtractElementInst getVectorOperand/getIndexOperand accessors. NFC.
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [X86] LowerBITREVERSE - use AND+CMPEQ+MOVMSK trick to lower scalar types (PR #92236)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
Simon Pilgrim via llvm-commits
- [clang] [llvm] [X86] LowerBITREVERSE - use AND+CMPEQ+MOVMSK trick to lower scalar types (PR #92236)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [clang] [llvm] [X86] LowerBITREVERSE - use AND+CMPEQ+MOVMSK trick to lower scalar types (PR #92236)
Simon Pilgrim via llvm-commits
- [llvm] [SelectionDAG] Add support for extending masked loads in computeKnownBits (PR #115450)
Simon Pilgrim via llvm-commits
- [llvm] Zext sext undef in sdag (PR #115451)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] isExtractExtractCheap - specify the extract/insert shuffle mask to improve shuffle costs (PR #114780)
Simon Pilgrim via llvm-commits
- [llvm] 51e8f82 - [X86] pr62014.ll - regenerate test checks with vpternlog comments
Simon Pilgrim via llvm-commits
- [llvm] 19f657d - [X86] combineToExtendBoolVectorInReg - use broadcast on AVX2+ targets
Simon Pilgrim via llvm-commits
- [llvm] 79c7b7e - [X86] combineToExtendBoolVectorInReg - use SelectionDAG::getSplat helper instead of shuffle(scalar_to_vector(x))
Simon Pilgrim via llvm-commits
- [llvm] [X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X, C1), C2) --> kshiftr(X, C1+C2) (PR #115528)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Make use of `null_frag` (NFC) (PR #115601)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Remove unused includes (NFC) (PR #115593)
Simon Pilgrim via llvm-commits
- [llvm] 6fb2a60 - [VectorCombine] Add test coverage for #115575
Simon Pilgrim via llvm-commits
- [llvm] 958e37c - [VectorCombine] scalarizeBinopOrCmp - check for out of bounds element indices
Simon Pilgrim via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
Simon Pilgrim via llvm-commits
- [llvm] [X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X, C1), C2) --> kshiftr(X, C1+C2) (PR #115528)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Delete unused X86setcc_commute node (NFC) (PR #115650)
Simon Pilgrim via llvm-commits
- [llvm] [llvm-exegesis] Add explicit support for setting DF in X86 (PR #115644)
Simon Pilgrim via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Simon Tatham via llvm-commits
- [llvm] [ARM][ConstantIslands] Correct MinNoSplitDisp calculation (PR #114590)
Simon Tatham via llvm-commits
- [llvm] [ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (PR #115174)
Simon Tatham via llvm-commits
- [llvm] [ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (PR #115174)
Simon Tatham via llvm-commits
- [llvm] [ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (PR #115174)
Simon Tatham via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Simon Tatham via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Simon Tatham via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Simon Tatham via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Simon Tatham via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Simon Tatham via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
Simon Tatham via llvm-commits
- [llvm] Make functions always renamable (PR #115226)
Simone Campanoni via llvm-commits
- [llvm] Make functions always renamable (PR #115226)
Simone Campanoni via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
Sjoerd Meijer via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Sjoerd Meijer via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
Sjoerd Meijer via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Sjoerd Meijer via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Sjoerd Meijer via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Sjoerd Meijer via llvm-commits
- [llvm] [SampleProf] Templatize longestCommonSequence (NFC) (PR #114633)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Snehasish Kumar via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Snehasish Kumar via llvm-commits
- [llvm] [SelectOpt] Support ADD and SUB with zext operands. (PR #115489)
Sotiris Apostolakis via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Clean up dead instructions (PR #115267)
Sriraman Tallam via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Fix broken frame index expansion for v_add_co_u32_e64 (PR #114634)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Extend type support for update_dpp intrinsic (PR #114597)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow lane-op lowering for illegal types (PR #114887)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow lane-op lowering for illegal types (PR #114887)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow lane-op lowering for illegal types (PR #114887)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow lane-op lowering for illegal types (PR #114887)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow lane-op lowering for illegal types (PR #114887)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU/GlobalISel: Remove getVRegDef null checks in selector (PR #115530)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [ORC] Switch to new visibility macros for JIT debug symbols (PR #113848)
Stefan Gränitz via llvm-commits
- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
Stefan Pintilie via llvm-commits
- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
Stefan Pintilie via llvm-commits
- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
Stefan Pintilie via llvm-commits
- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
Stefan Pintilie via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopVectorizer] Avoid dropping !dbg in optimizeForVFAndUF (PR #114243)
Stephen Tozer via llvm-commits
- [clang] [llvm] Remove remaining uses of Instruction-constructors that insert before another Instruction (PR #85981)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)
Stephen Tozer via llvm-commits
- [llvm] [CodeGen] Correctly handle non-standard cases in RemoveLoadsIntoFakeUses (PR #111551)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)
Stephen Tozer via llvm-commits
- [llvm] [MergeFunctions] Add support to run the pass over a set of function pointers (PR #111045)
Stephen Tozer via llvm-commits
- [llvm] [MergeFunctions] Add support to run the pass over a set of function pointers (PR #111045)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (PR #110276)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (PR #114225)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][Reassociate] Preserve DebugLocs when reassociating subs (PR #114226)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][GVN] Propagate DebugLoc from load-of-select to select (PR #114233)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][SimplifyCFG] Fully propagate merged invoke DILocations (PR #114235)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopVectorizer] Avoid dropping !dbg in optimizeForVFAndUF (PR #114243)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (PR #114225)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (PR #110276)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][Reassociate] Preserve DebugLocs when reassociating subs (PR #114226)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (PR #110276)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][InstCombine] When replacing bswap idiom, add DebugLoc to new insts (PR #114231)
Stephen Tozer via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [clang] [compiler-rt] [lldb] [llvm] [mlir] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [clang] [compiler-rt] [lldb] [llvm] [mlir] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [clang] [llvm] [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (PR #113382)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL][SPIRV] Added clamp intrinsic (PR #113394)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Steven Perron via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
Steven Perron via llvm-commits
- [llvm] Make functions always renamable (PR #115226)
Steven Wu via llvm-commits
- [llvm] Add symbol visibility macros to abi-breaking.h.cmake (PR #110898)
Steven Wu via llvm-commits
- [llvm] Add symbol visibility macros to abi-breaking.h.cmake (PR #110898)
Steven Wu via llvm-commits
- [llvm] [ORC] skip reoptimization tests on i386 (PR #114351)
Sunho Kim via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [AArch64][NFC] Add test as a representative of scalarizing a vector i… (PR #114107)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
Sushant Gokhale via llvm-commits
- [compiler-rt] 6d719d9 - Revert "[SystemZ][XRay] XRay runtime support for SystemZ (#113252)"
Sylvestre Ledru via llvm-commits
- [compiler-rt] [SystemZ][XRay] XRay runtime support for SystemZ (PR #113252)
Sylvestre Ledru via llvm-commits
- [llvm] Make functions always renamable (PR #115226)
Teresa Johnson via llvm-commits
- [llvm] Make functions always renamable (PR #115226)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Print full context hash when reporting hinted bytes (PR #114465)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
Teresa Johnson via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Teresa Johnson via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
Teresa Johnson via llvm-commits
- [llvm] [DirectX] Update DXIL op codes for annotateHandle and createHandleFromBinding to match the spec and DXC (PR #114473)
Tex Riddell via llvm-commits
- [llvm] [HLSL] Update tests to use splat for vector constants (PR #115198)
Tex Riddell via llvm-commits
- [llvm] [HLSL] Update tests to use splat for vector constants (PR #115198)
Tex Riddell via llvm-commits
- [llvm] Set shader analysis flag EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Tex Riddell via llvm-commits
- [llvm] Set shader analysis flag EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Tex Riddell via llvm-commits
- [llvm] Set shader analysis flag EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Tex Riddell via llvm-commits
- [llvm] Set shader analysis flag EnableRawAndStructuredBuffers for RawBuffer and StructuredBuffer resource types (PR #114449)
Tex Riddell via llvm-commits
- [llvm] [Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (PR #113637)
Tex Riddell via llvm-commits
- [llvm] [Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (PR #113637)
Tex Riddell via llvm-commits
- [llvm] [Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (PR #113637)
Tex Riddell via llvm-commits
- [llvm] [Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (PR #113637)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [clang] [llvm] [HLSL] Add `Increment`/`DecrementCounter` methods to structured buffers (PR #114148)
Tex Riddell via llvm-commits
- [llvm] [Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (PR #113637)
Tex Riddell via llvm-commits
- [llvm] [Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (PR #113637)
Tex Riddell via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
Thirumalai Shaktivel via llvm-commits
- [llvm] [ORC] Switch to new visibility macros for JIT debug symbols (PR #113848)
Thomas Fransham via llvm-commits
- [llvm] [llvm] Add explicit visibility macros to YAMLTraits classes (PR #111484)
Thomas Fransham via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
- [llvm] [GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (PR #115377)
Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
- [llvm] Reland "[LTO] Run Argument Promotion before IPSCCP" (PR #111853)
Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
- [llvm] 4a6d13b - Remove unused variable to fix '[AMDGPU] modify named barrier builtins and intrinsics (#114550)'
Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
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Tobias Hieta via llvm-commits
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Tobias Hieta via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
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Tom Eccles via llvm-commits
- [clang] [llvm] [Clang] Match MSVC handling of duplicate header search paths in Microsoft compatibility modes. (PR #105738)
Tom Honermann via llvm-commits
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Tom Honermann via llvm-commits
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Tom Honermann via llvm-commits
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Tom Honermann via llvm-commits
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Tom Honermann via llvm-commits
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Tom Honermann via llvm-commits
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Tom Honermann via llvm-commits
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Tom Honermann via llvm-commits
- [lld] [LLD][MachO] Enable plugin support for LTO (PR #115690)
Tom Lin via llvm-commits
- [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)
Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Tomer Solomon via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Tomer Solomon via llvm-commits
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Tomer Solomon via llvm-commits
- [llvm] [SystemZ][XRay] Implement XRay instrumentation for SystemZ (PR #113253)
Ulrich Weigand via llvm-commits
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Ulrich Weigand via llvm-commits
- [clang] [llvm] [clang] Introduce [[clang::lifetime_capture_by(X)]] (PR #111499)
Utkarsh Saxena via llvm-commits
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Valery Mironov via llvm-commits
- [llvm] [CalcSpillWeights] Simplify copy hint register collection. NFC. (PR #114236)
Valery Pykhtin via llvm-commits
- [llvm] 11b768a - [SandboxVec][BottomUpVec] Fix bug in invalidation of analyses
Vasileios Porpodas via llvm-commits
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Vassil Vassilev via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
Vassil Vassilev via llvm-commits
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Vassil Vassilev via llvm-commits
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Vassil Vassilev via llvm-commits
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Vassil Vassilev via llvm-commits
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Vassil Vassilev via llvm-commits
- [llvm] [ORC] Switch to new visibility macros for JIT debug symbols (PR #113848)
Vassil Vassilev via llvm-commits
- [llvm] [X86] Switch to the new symbol visibility macros (PR #109982)
Vassil Vassilev via llvm-commits
- [llvm] [lineeditor] Add `setHistorySize()` method for adjusting history size (PR #110092)
Vassil Vassilev via llvm-commits
- [llvm] [X86] Switch to the new symbol visibility macros (PR #109982)
Vassil Vassilev via llvm-commits
- [llvm] Add symbol visibility macros to abi-breaking.h.cmake (PR #110898)
Vassil Vassilev via llvm-commits
- [llvm] [llvm] Add explicit visibility macros to YAMLTraits classes (PR #111484)
Vassil Vassilev via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
Vassil Vassilev via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
Vassil Vassilev via llvm-commits
- [llvm] [CodeGen] [AMDGPU] Attempt DAGCombine for fmul with select to ldexp (PR #111109)
Vikash Gupta via llvm-commits
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Vikash Gupta via llvm-commits
- [llvm] [CodeGen] [AMDGPU] Adds pre-commit test for fmul-select combine (PR #111107)
Vikash Gupta via llvm-commits
- [lld] [llvm] [CGData][llvm-cgdata] Support for stable function map (PR #112664)
Vincent Lee via llvm-commits
- [llvm] [bazel] Clean up unused exported files (PR #114620)
Vincent Lee via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Vincent Lee via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Vincent Lee via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Vincent Lee via llvm-commits
- [compiler-rt] [compiler-rt] Use installed libc++(abi) for tests instead of build tree (PR #115077)
Vincent Lee via llvm-commits
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Vincent Lee via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
Vincent Lee via llvm-commits
- [compiler-rt] [tsan] Clang format a few files (PR #114725)
Vitaly Buka via llvm-commits
- [compiler-rt] [NFC][tsan] Wrap `Atomic`/`NoTsanAtomic` int struct (PR #114909)
Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
- [compiler-rt] Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (PR #115029)
Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
- [compiler-rt] Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (PR #115029)
Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
- [compiler-rt] Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (PR #115032)
Vitaly Buka via llvm-commits
- [compiler-rt] Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (PR #115032)
Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
- [compiler-rt] Reapply "[tsan] Don't use `enum __tsan_memory_order` in tsan interface"" (PR #115034)
Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
- [compiler-rt] Reapply "[tsan] Don't use `enum __tsan_memory_order` in tsan interface"" (PR #115034)
Vitaly Buka via llvm-commits
- [compiler-rt] [nfc][tsan] Simplify morder conversion (PR #115075)
Vitaly Buka via llvm-commits
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Vitaly Buka via llvm-commits
- [llvm] [BOLT] Ignore AArch64 markers outside their sections. (PR #74106)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Ignore AArch64 markers outside their sections. (PR #74106)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Ignore AArch64 markers outside their sections. (PR #74106)
Vladislav Khmelevsky via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #114501)
Vyacheslav Klochkov via llvm-commits
- [llvm] [SPIR-V] Fix OpDecorate emission after vreg def. (PR #114426)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Fix OpDecorate emission after vreg def. (PR #114426)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Implement support of the SPV_INTEL_split_barrier SPIRV extension (PR #112359)
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- [llvm] [SPIR-V] Ensure correct pointee types of some OpenCL Extended Instructions' pointer arguments (PR #114846)
Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
- [clang] [llvm] [clang][llvm][SPIR-V] Explicitly encode native integer widths for SPIR-V (PR #110695)
Vyacheslav Levytskyy via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
Vyacheslav Levytskyy via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
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- [llvm] [SPIR-V] Fix OpFunctionParameter vs. OpTypeFunction types for pointer arguments when there are functions with aggregate arguments (PR #115044)
Vyacheslav Levytskyy via llvm-commits
- [clang] [llvm] [HLSL] implement elementwise firstbithigh hlsl builtin (PR #111082)
Vyacheslav Levytskyy via llvm-commits
- [clang] [llvm] [HLSL] implement elementwise firstbithigh hlsl builtin (PR #111082)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Fix OpFunctionParameter vs. OpTypeFunction types for pointer arguments when there are functions with aggregate arguments (PR #115044)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Ensure correct pointee types of some OpenCL Extended Instructions' pointer arguments (PR #114846)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V][Codegen] Represent the property of the target to declare and use typed pointers and update MachineVerifier to use it (PR #110270)
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- [llvm] [SPIR-V][Codegen] Represent the property of the target to declare and use typed pointers and update MachineVerifier to use it (PR #110270)
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Implement buildins for OpIAddCarry/OpISubBorrow and improve/fix type inference (PR #115192)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [SPIR-V] Implement builtins for OpIAddCarry/OpISubBorrow and improve/fix type inference (PR #115192)
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- [llvm] [SPIR-V] Implement builtins for OpIAddCarry/OpISubBorrow and improve/fix type inference (PR #115192)
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- [llvm] 445db93 - [LoongArch][NFC] Pre-commit tests for codegen with alias analysis
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- [llvm] 9ba0e5c - Revert "[LoongArch][NFC] Pre-commit tests for codegen with alias analysis"
WANG Rui via llvm-commits
- [llvm] a165bbd - [LoongArch][NFC] Reland "Pre-commit tests for codegen with alias analysis"
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- [lldb] [llvm] [LLDB] Add a target.launch-working-dir setting (PR #113521)
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- [lldb] [llvm] Revert "[LLDB] Add a target.launch-working-dir setting" (PR #114973)
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- [lldb] [llvm] Revert "[LLDB] Add a target.launch-working-dir setting" (PR #114973)
Walter Erquinigo via llvm-commits
- [lldb] [llvm] Revert "[LLDB] Add a target.launch-working-dir setting" (PR #114973)
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- [llvm] 37ce189 - [RISCV] Add requirement of asserts
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- [llvm] [SamplePGO] Handle "sequence too long" errors more gracefully (PR #114982)
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- [llvm] [LoongArch][NFC] Fix the operand constraint of AMCAS instructions (PR #114508)
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- [llvm] [RelocationResolver][Xtensa] Implement R_XTENSA_32 (PR #96311)
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- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
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- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
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- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
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- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
Yingchi Long via llvm-commits
- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
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- [llvm] [LoongArch] Use LSX for scalar FP rounding with explicit rounding mode (PR #114766)
Yingchi Long via llvm-commits
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Yingchi Long via llvm-commits
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Yingchi Long via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold select of clamped shifts (PR #114797)
Yingwei Zheng via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Yingwei Zheng via llvm-commits
- [llvm] [DAGCombiner] Add basic support for `trunc nsw/nuw` (PR #113808)
Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
- [llvm] [DAGCombiner] Add basic support for `trunc nsw/nuw` (PR #113808)
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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- [llvm] [Coroutines] Inline the `.noalloc` ramp function marked coro_safe_elide (PR #114004)
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- [llvm] [LoongArch] Support llvm.lround intrinsics with i32 return type. (PR #114733)
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- [llvm] [CGData] Global Merge Functions (PR #112671)
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Zhaoxuan Jiang via llvm-commits
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Zhaoxuan Jiang via llvm-commits
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Zhaoxuan Jiang via llvm-commits
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Zhaoxuan Jiang via llvm-commits
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Zhaoxuan Jiang via llvm-commits
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Zhaoxuan Jiang via llvm-commits
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Zhaoxuan Jiang via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
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- [clang] [clang-tools-extra] [llvm] [clang] Introduce diagnostics suppression mappings (PR #112517)
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- [clang] [clang-tools-extra] [llvm] [clang] Introduce diagnostics suppression mappings (PR #112517)
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- [compiler-rt] cec147a - [ASan][test] Enable ASan tests on SPARC (#107405)
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- [llvm] [GlobalISel] Check the correct register in sextload OneUse check. (PR #114763)
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- [clang] [flang] [llvm] Enable seq_cst Clause for flush Directive in OpenMP (PR #114072)
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- [llvm] 7d35368 - [RISCV] Lower vector_shuffle for bf16 (#114731)
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- [llvm] 7bf0d6d - [RISCV] Lower fixed-length strided VP loads and stores for zvfhmin/zvfbfmin (#114750)
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- [llvm] 45ae7d1 - [SPIRV] Fix assert in `getOrCreateBaseRegister` for `i32 -1` (#114630)
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- [llvm] a517127 - [PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
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- [llvm] 0653698 - [flang][OpenMP] Add parsing support for Task detach (#112312)
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- [llvm] [AMDGPU] Change scope of resource usage info symbols (PR #114810)
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- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
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- [lld] 5d7afd3 - [LLD][COFF] Add EC alias symbols for undefined x86_64 symbols on ARM64EC target (#114466)
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- [llvm] a58c3d3 - Use `std::move` to avoid copy (#113055)
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- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
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- [llvm] [llvm][llvm-lit] Hide --use-unique-output-file-name from --help (PR #114812)
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- [lld] f855975 - [llvm-project] Fix typo "propogate" (#114795)
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- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
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- [llvm] 9a211fe - [TableGen] Fix concatenation of subreg and artificial subregs (#114391)
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- [llvm] 3e8a8fc - ValueTracking: clarify isNotCrossLaneOperation (NFC) (#112375)
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- [llvm] cd16b07 - IR: introduce CmpInst::isEquivalence (#111979)
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- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
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- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
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- [llvm] [INSTR COMBINE] implement combine select into cast (PR #114612)
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- [flang] [llvm] [flang][OpenMP] Add parsing support for Task detach (PR #112312)
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- [llvm] [GlobalISel] Combine (X >> C) << C to X & ((-1 >> C) << C) (PR #114821)
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- [llvm] ae0ab24 - [TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392)
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- [libcxxabi] [llvm] [demangler] Enhance demangling in llvm-cxxfilt for fixed-point types. (PR #114257)
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- [llvm] 7da9da0 - [demangler] Enhance demangling in llvm-cxxfilt for fixed-point types. (#114257)
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- [libcxxabi] [llvm] [demangler] Enhance demangling in llvm-cxxfilt for fixed-point types. (PR #114257)
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- [llvm] [RISCV] fix SP recovery in varargs functions (PR #114316)
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- [llvm] b5dc7b8 - [LLVM] Change `LLVMIntrinsicCopyOverloadedName` API return type (#114334)
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- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
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- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
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- [llvm] [AArch64] Define high bits of FPR and GPR registers (take 2) (PR #114827)
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- [llvm] [AArch64] Define high bits of FPR and GPR registers (take 2) (PR #114827)
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- [llvm] Fixed test case error which caused the default cpu is changed from generic to ppc64 for triple powerpc64 (PR #114828)
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- [llvm] [DAG] SimplifyDemandedBits - ignore SRL node if we're just demanding known sign bits (PR #114805)
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- [llvm] 01463a2 - Fixed test case error which caused the default cpu is changed from generic to ppc64 for triple powerpc64 (#114828)
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- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #107493)
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- [llvm] [llvm-(min-)tblgen] Avoid redundant source compilation (PR #114494)
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- [llvm] 1c6ec29 - [flang][OpenMP] Parsing support for iterator modifiers in FROM and TO (#114593)
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- [llvm] [ValueTracking] Handle recursive select/PHI in ComputeKnownBits (PR #114689)
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- [llvm] 0742090 - [llvm-exegesis] Use older instructions to load lower vregs (#114768)
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- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
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- [llvm] [InstCombine] Missed optimization: Fold (sext(a) & c1) == c2 to (a & c3) == trunc(c2) (PR #112646)
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- [clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
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- [llvm] Extend LLVM Offloading API for binary fatbin Bundles (PR #114833)
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- [llvm] Extend LLVM Offloading API for binary fatbin Bundles (PR #114833)
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- [llvm] Extend llvm objdump fatbin (PR #114834)
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- [llvm] StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (PR #114836)
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- [llvm] [INSTR COMBINE] implement combine select into cast (PR #114612)
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- [llvm] Extend llvm objdump fatbin (PR #114834)
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- [llvm] 0ac2e42 - [DAG] SimplifyDemandedBits - ignore SRL node if we're just demanding known sign bits (#114805)
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- [llvm] 30dd129 - AMDGPU: Custom expand flat cmpxchg which may access private (#109410)
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- [llvm] bc3c83f - [sancov] Use heterogeneous lookups with std::map (NFC) (#113406)
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- [llvm] 186dc9a - [CodeGen] Avoid repeated hash lookups (NFC) (#113414)
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- [llvm] [NVPTX][docs] Add isspacep.* to usage doc (PR #114839)
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- [clang] [llvm] Intrinsics/clip (PR #114588)
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- [llvm] 2cd3213 - [PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
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- [clang] [llvm] Intrinsics/clip (PR #114588)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [llvm] [SPIR-V] Ensure correct pointee types of some OpenCL Extended Instructions' pointer arguments (PR #114846)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [llvm] [AMDGPU] Improve isBasicBlockPrologue to only add necessary instructions (PR #113303)
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- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
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- [llvm] [AMDGPU] Improve isBasicBlockPrologue to only add necessary instructions (PR #113303)
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- [llvm] 002a0a2 - AMDGPU: Fix broken frame index expansion for v_add_co_u32_e64 (#114634)
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- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
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- [llvm] [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (PR #114850)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
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- [llvm] [DirectX] Flatten arrays (PR #114332)
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- [llvm] [M68k] add ARID addressing mode support for CAS ops (PR #114854)
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- [llvm] [M68k] add ARID addressing mode support for CAS ops (PR #114854)
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- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
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- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
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- [llvm] [PowerPC] Use setbc for values from vector compare conditions (PR #114858)
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- [llvm] [PowerPC] Use setbc for values from vector compare conditions (PR #114858)
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- [llvm] 19ad7dd - [DirectX] Update DXIL op codes for annotateHandle and createHandleFromBinding to match the spec and DXC (#114473)
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- [llvm] ffe96ad - [RISCV] Allow undef elements in isDeinterleaveShuffle (#114585)
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- [llvm] [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (PR #114822)
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- [llvm] 6c3704d - StripSymbols: Query llvm.dbg.declare by intrinsic ID instead of name (#114836)
via llvm-commits
- [llvm] ed19ef7 - [NVPTX][docs] Add isspacep.* to usage doc (#114839)
via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
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- [compiler-rt] [rtsan] Added mmap and shm interceptors (PR #114862)
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- [compiler-rt] 3e15454 - [tsan] Clang format a few files (#114725)
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- [compiler-rt] [rtsan] Added mmap and shm interceptors (PR #114862)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
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- [llvm] 3a5791e - [SampleProf] Templatize longestCommonSequence (NFC) (#114633)
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- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
via llvm-commits
- [compiler-rt] 61e50b9 - [rtsan] Added mmap and shm interceptors (#114862)
via llvm-commits
- [llvm] 910a73f - [X86] Make POP imply pointer-size operands, as with PUSH for Intel syntax (#114533)
via llvm-commits
- [llvm] ea85900 - SafeStack: Respect alloca addrspace (#112536)
via llvm-commits
- [compiler-rt] [NFC][tsan] Wrap `Atomic`/`NoTsanAtomic` int struct (PR #114909)
via llvm-commits
- [compiler-rt] [rtsan][NFC] Remove some unneeded headers, make guards more obvious (PR #114911)
via llvm-commits
- [compiler-rt] fade3be - [nfc][tsan] Wrap `Atomic`/`NoTsanAtomic` int struct (#114909)
via llvm-commits
- [compiler-rt] [nfc][tsan] Move out `morder` params from __VA_ARGS__ (PR #114916)
via llvm-commits
- [llvm] 013f4a4 - [Utils] Remove unused includes (NFC) (#114748)
via llvm-commits
- [llvm] [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (PR #114922)
via llvm-commits
- [compiler-rt] [compiler-rt] Destroy pthread attrs after use in tests (PR #114923)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] [RISCV] Handle zvfhmin/zvfbfmin in lowerVECTOR_SHUFFLEAsVSlide1 (PR #114925)
via llvm-commits
- [llvm] a7d1d38 - [RISCV] Use integer VTypeInfo predicate for vmv_v_v_vl pattern (#114915)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [compiler-rt] a9f829a - [nfc][tsan] Move out `morder` params from __VA_ARGS__ (#114916)
via llvm-commits
- [llvm] [RISCV] Lower fixed-length {insert,extract}_vector_elt on zvfhmin/zvfbfmin (PR #114927)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] a8f8089 - [RISCV] Handle zvfhmin/zvfbfmin in lowerVECTOR_SHUFFLEAsVSlide1 (#114925)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] aea6b25 - [RISCV] Lower fixed-length {insert,extract}_vector_elt on zvfhmin/zvfbfmin (#114927)
via llvm-commits
- [llvm] [RISCV] Lower fixed-length bf16 vector bitcasts (PR #114938)
via llvm-commits
- [llvm] [SelectionDAGBuilder][X86] Don't form FMAXNUM for f16 vectors if FMAXNUM needs to be promoted. (PR #114943)
via llvm-commits
- [compiler-rt] 7767aa4 - [XRay][AArch64] Support -fxray-shared (#114431)
via llvm-commits
- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
via llvm-commits
- [llvm] f50547e - [RISCV] Lower fixed-length bf16 vector bitcasts (#114938)
via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
via llvm-commits
- [llvm] 70de0b8 - [LV][NFC] Simplify initialization of MinProfitableTripCount (#113445)
via llvm-commits
- [llvm] [RISCV] Lower mgather/mscatter for zvfhmin/zvfbfmin (PR #114945)
via llvm-commits
- [clang] [llvm] [LoongArch] Support amcas[_db].{b/h/w/d} instructions. (PR #114189)
via llvm-commits
- [llvm] [SLP][REVEC] Remove assert because canConvertToMinOrMaxIntrinsic can support vector type. (PR #114946)
via llvm-commits
- [llvm] 3495d04 - [AMDGPU][MIR] Serialize SpillPhysVGPRs (#113129)
via llvm-commits
- [clang] [llvm] [LoongArch] Support amcas[_db].{b/h/w/d} instructions. (PR #114189)
via llvm-commits
- [clang] [llvm] [LoongArch] Support amcas[_db].{b/h/w/d} instructions. (PR #114189)
via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
via llvm-commits
- [compiler-rt] d084bc2 - [compiler-rt][profile] Add support for LLVM profile for Haiku (#107575)
via llvm-commits
- [llvm] Fix a dangling reference in FunctionRefTest.cpp (PR #114949)
via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
via llvm-commits
- [llvm] [Mips] Support llvm.readsteadycounter intrinsic (PR #114953)
via llvm-commits
- [llvm] [Mips] Support llvm.readsteadycounter intrinsic (PR #114953)
via llvm-commits
- [llvm] [Mips] Support llvm.readcyclecounter intrinsic (PR #114953)
via llvm-commits
- [llvm] [Mips] Support llvm.readcyclecounter intrinsic (PR #114953)
via llvm-commits
- [llvm] [RISCV] Correct fcopysign pattern for zdinx (PR #114954)
via llvm-commits
- [llvm] [Mips] Support llvm.readcyclecounter intrinsic (PR #114953)
via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
via llvm-commits
- [compiler-rt] cdfd4cf - [win/asan] Search both higher and lower in AllocateTrampolineRegion (#114212)
via llvm-commits
- [compiler-rt] [win/asan] Search both higher and lower in AllocateTrampolineRegion (PR #114212)
via llvm-commits
- [llvm] [AMDGPU] Fix 3495d04 MIR test (PR #114963)
via llvm-commits
- [llvm] [FuncSpec] Query SCCPSolver in more places (PR #114964)
via llvm-commits
- [llvm] 6d2f4dd - [llvm][docs] update links to `clang-format-diff.py` and `git-clang-format` (#114646)
via llvm-commits
- [llvm] 5dc9c39 - [GlobalISel] Check the correct register in sextload OneUse check. (#114763)
via llvm-commits
- [llvm] 93cda6d - [SPIR-V] No OpBitcast is generated for a bitcast between identical types (#114877)
via llvm-commits
- [llvm] [SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (PR #114965)
via llvm-commits
- [llvm] [SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (PR #114965)
via llvm-commits
- [llvm] [llvm-cov] Fix branch counts of template functions (#111743) (PR #113925)
via llvm-commits
- [llvm] 23f3bff - [AArch64] make REVD non-MOVPRFXable (#114430)
via llvm-commits
- [llvm] [AArch64] make REVD non-MOVPRFXable (PR #114430)
via llvm-commits
- [llvm] [llvm-cov] Fix branch counts of template functions (#111743) (PR #113925)
via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
via llvm-commits
- [llvm] [DAG] SimplifyDemandedBits - if we're just demanding a single shifted down sign bit, try to shift down the MSB directly (PR #114967)
via llvm-commits
- [llvm] [LoongArch] Add test for scalar FP rounding (PR #114968)
via llvm-commits
- [llvm] [LoongArch] Add test for scalar FP rounding (PR #114968)
via llvm-commits
- [llvm] [LoongArch] Use LSX for scalar FP rounding with explicit rounding mode (PR #114766)
via llvm-commits
- [llvm] 6620cd2 - [LLDB] Add a target.launch-working-dir setting (#113521)
via llvm-commits
- [llvm] e76d921 - [AMDGPU] Fix 3495d04 MIR test (#114963)
via llvm-commits
- [llvm] [RISCV] add varargs functions test (PR #114970)
via llvm-commits
- [llvm] [RISCV] fix SP recovery in varargs functions (PR #114316)
via llvm-commits
- [llvm] [RISCV] add varargs functions test (PR #114970)
via llvm-commits
- [llvm] [LV] Make having flags (FMFs etc) not require inheriting VPSingleDefRecipe (PR #114972)
via llvm-commits
- [llvm] 5d39e0c - Revert "[LLDB] Add a target.launch-working-dir setting" (#114973)
via llvm-commits
- [lldb] [llvm] Revert "[LLDB] Add a target.launch-working-dir setting" (PR #114973)
via llvm-commits
- [llvm] InstCombine: support floating-point equivalences (PR #114975)
via llvm-commits
- [llvm] [AArch64] Add tablegen patterns for fmla index with extract 0. (PR #114976)
via llvm-commits
- [llvm] Add patterns for fma.relu.{f16|bf16} (PR #114977)
via llvm-commits
- [llvm] cfa5ecd - ValueTracking/test: cover recur limit in non-equal PHIs (#113205)
via llvm-commits
- [llvm] 07b6013 - [CFGPrinter] Allow CFG dumps with a given filename (#112906)
via llvm-commits
- [llvm] [LoongArch] Enable alias analysis by default (PR #114980)
via llvm-commits
- [llvm] [LoongArch] Enable alias analysis by default (PR #114980)
via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
via llvm-commits
- [compiler-rt] Support in GetInstructionSize instructions used by Wine. (PR #113085)
via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
via llvm-commits
- [llvm] [SamplePGO] Handle "sequence too long" errors more gracefully (PR #114982)
via llvm-commits
- [compiler-rt] Support in GetInstructionSize instructions used by Wine. (PR #113085)
via llvm-commits
- [llvm] [LiveDebugValues] Use getNumSupportedRegs to reduce compile time, NFCI (PR #114944)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [llvm] 4ff6205 - [LoongArch] Add test for scalar FP rounding (#114968)
via llvm-commits
- [llvm] f6948e8 - [LoopVectorize] Fix typo in branch-weights.ll test CEHCK->CHECK (NFC) (#113574)
via llvm-commits
- [llvm] [LoopVectorize] Fix typo in branch-weights.ll test CEHCK->CHECK (NFC) (PR #113574)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [llvm] [LoongArch] Use LSX for scalar FP rounding with explicit rounding mode (PR #114766)
via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
via llvm-commits
- [lld] [LLD][COFF] Add support for locally imported EC symbols (PR #114985)
via llvm-commits
- [lld] [LLD][COFF] Add support for locally imported EC symbols (PR #114985)
via llvm-commits
- [llvm] f0231b6 - [MIPS] Use softPromoteHalf legalization for fp16 rather than PromoteFloat (#110199)
via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 support (but still whole register) for reductions (PR #112361)
via llvm-commits
- [llvm] [Support] Fix UB in decodeULEB128 and decodeSLEB128 (NFC) (PR #114986)
via llvm-commits
- [llvm] [Docs][llvm-exegesis] Clarify AArch64 support (PR #114989)
via llvm-commits
- [llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
via llvm-commits
- [llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
via llvm-commits
- [llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
via llvm-commits
- [llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (PR #114992)
via llvm-commits
- [clang] [llvm] Remove leftover uses of llvm::Type::getPointerTo() (PR #114993)
via llvm-commits
- [llvm] [ARM] Add early-clobber to MVE VCMLA.f32 (PR #114995)
via llvm-commits
- [llvm] [ValueTracking] Don't special case depth for phi of select (PR #114996)
via llvm-commits
- [llvm] 119aac0 - EarlyCSE: refactor getOrCreateResult (NFC) (#113339)
via llvm-commits
- [llvm] [AArch64] Improve mull generation (PR #114997)
via llvm-commits
- [llvm] Use `std::move` to avoid copy (PR #113080)
via llvm-commits
- [llvm] aef0e77 - [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (#114992)
via llvm-commits
- [llvm] 6b64f36 - [NFC] Use `std::move` to avoid copy (#113080)
via llvm-commits
- [clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [llvm] 4a04dd4 - [RISCV] add varargs functions test (#114970)
via llvm-commits
- [llvm] [RISCV] add varargs functions test (PR #114970)
via llvm-commits
- [llvm] [Inliner] Add support for preserving `nocapture` param attr (PR #113418)
via llvm-commits
- [llvm] ba60f6d - Remove leftover uses of llvm::Type::getPointerTo() (#114993)
via llvm-commits
- [compiler-rt] a5e1898 - [rtsan] NFC: Simplify 64 file offset naming in unit tests (#114908)
via llvm-commits
- [compiler-rt] 15c7e9f - [rtsan][NFC] Remove some unneeded headers, make guards more obvious (#114911)
via llvm-commits
- [llvm] 877cb9a - [KnownBits] Make `{s, u}{add, sub}_sat` optimal (#113096)
via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
via llvm-commits
- [llvm] [NFC] Eliminate use of `lookupLLVMIntrinsicByName` in Coroutines (PR #114851)
via llvm-commits
- [llvm] [NFC] Eliminate use of `lookupLLVMIntrinsicByName` in Coroutines (PR #114851)
via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] c50bb99 - [RISCV] Allow vslidedown.vx in isExtractSubvectorCheap for half VT case (#114886)
via llvm-commits
- [llvm] 2c13dec - [clang][llvm][SPIR-V] Explicitly encode native integer widths for SPIR-V (#110695)
via llvm-commits
- [llvm] c2b61fc - [NFC][LLVM] Use namespace `Intrinsic` in `Intrinsics.cpp` (#114822)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110810)
via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] 75d6737 - AMDGPU: Fix clobbering temp reg for large frame indexes in VOP3 users (#114924)
via llvm-commits
- [llvm] [Exegesis] Implemented strategy for load operation (PR #113458)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110810)
via llvm-commits
- [llvm] 92574b5 - Fix a dangling reference in FunctionRefTest.cpp (#114949)
via llvm-commits
- [clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] [AMDGPU] Improve isBasicBlockPrologue to only add necessary instructions (PR #113303)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110810)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] [AMDGPU] Improve isBasicBlockPrologue to only add necessary instructions (PR #113303)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] Add clang::lifetimebound annotation to llvm::function_ref (PR #115019)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
via llvm-commits
- [compiler-rt] cb9700e - Revert "[XRay][AArch64] Support -fxray-shared" (#115022)
via llvm-commits
- [clang] [compiler-rt] Revert "[XRay][AArch64] Support -fxray-shared" (PR #115022)
via llvm-commits
- [llvm] 9a5e5a6 - [NFC][NVPTX] Remove use of MachineInstr prior to ISel (#114913)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110810)
via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
via llvm-commits
- [llvm] [RISCV] fix SP recovery in varargs functions (PR #114316)
via llvm-commits
- [llvm] 117e952 - [LiveRangeEdit] Remove any MemoryOperand on MI when converting it to KILL. (#114407)
via llvm-commits
- [compiler-rt] [compiler-rt] Include stdlib.h for exit() (PR #115025)
via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
via llvm-commits
- [clang] [llvm] [HLSL][DXIL] Implement `asdouble` intrinsic (PR #114847)
via llvm-commits
- [clang] [llvm] [HLSL][DXIL] Implement `asdouble` intrinsic (PR #114847)
via llvm-commits
- [clang] [flang] [llvm] seq_cst is allowed in Flush since OpenMP 5.1. (PR #114072)
via llvm-commits
- [llvm] 6d6287a - [NFC] Fix test for zext(shl(trunc)) fold (#113778)
via llvm-commits
- [llvm] [InstCombine] Eliminate fptrunc/fpext if fast math flags allow it (PR #115027)
via llvm-commits
- [llvm] 9540a7a - [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (#112588)
via llvm-commits
- [compiler-rt] 1e50958 - [tsan] Don't use `enum __tsan_memory_order` in tsan interface (#114724)
via llvm-commits
- [compiler-rt] Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (PR #115029)
via llvm-commits
- [clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [compiler-rt] a6fdfef - [compiler-rt] Include stdlib.h for exit() (#115025)
via llvm-commits
- [clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
via llvm-commits
- [llvm] 3297858 - [llvm-readobj] Use heterogenous lookups with std::map (NFC) (#114929)
via llvm-commits
- [compiler-rt] [rtsan] Add more socket interceptors (PR #115020)
via llvm-commits
- [llvm] 8b8778b - [WebAssembly] Use heterogenous lookups with std::set (NFC) (#114930)
via llvm-commits
- [llvm] 665dd23 - [Utils] Simplify code with DenseMap::operator[] (NFC) (#114932)
via llvm-commits
- [compiler-rt] Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (PR #115032)
via llvm-commits
- [llvm] 380fd09 - [WebAssembly] Fix unwind mismatches in new EH (#114361)
via llvm-commits
- [compiler-rt] b14c436 - Revert "[tsan] Don't use `enum __tsan_memory_order` in tsan interface" (#115032)
via llvm-commits
- [compiler-rt] Reapply "[tsan] Don't use `enum __tsan_memory_order` in tsan interface"" (PR #115034)
via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
via llvm-commits
- [llvm] [NVPTX] Fix lowering of i1 SETCC (PR #115035)
via llvm-commits
- [llvm] [RISCV] Support Zfa in SiFive P600's scheduling model (PR #115036)
via llvm-commits
- [llvm] [RISCV] Refine division latencies in SiFive P600's scheduling model (PR #115038)
via llvm-commits
- [llvm] [AMDGPU] Support `nuw` and `nusw` in buffer fat pointer lowering (PR #115039)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] [RISCV] Update latency of MUL & CPOP in SiFive P600's scheduling model (PR #115042)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] [SPIR-V] Fix OpFunctionParameter vs. OpTypeFunction types for pointer arguments when there are functions with aggregate arguments (PR #115044)
via llvm-commits
- [llvm] 3cdac06 - [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (#113623)
via llvm-commits
- [llvm] 7780cf0 - [AMDGPU][MC] Fix disassemble of image_gather4 with d16 (#114609)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] [AArch64][SVE2] Add pattern for constructive EXT instruction. (PR #115047)
via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
via llvm-commits
- [clang] [llvm] [Clang][Darwin] Introduce `SubFrameworks` as a SDK default location (PR #115048)
via llvm-commits
- [llvm] [NVPTX] Emit prmt selection value in hex (PR #115049)
via llvm-commits
- [llvm] [SystemZ] Make lit test more specific (PR #115050)
via llvm-commits
- [llvm] [NVPTX] Emit prmt selection value in hex (PR #115049)
via llvm-commits
- [compiler-rt] 17d9565 - Reapply "[tsan] Don't use `enum __tsan_memory_order` in tsan interface"" (#115034)
via llvm-commits
- [compiler-rt] [libcxx] [libcxxabi] [libunwind] [libunwind][libcxx][libcxxabi][compiler-rt-builtins] Fix Exception Handling build for wasm (PR #79667)
via llvm-commits
- [llvm] [AArch64] Avoid GPR trip when moving truncated i32 vector elements (PR #114541)
via llvm-commits
- [llvm] [AArch64] Avoid GPR trip when moving truncated i32 vector elements (PR #114541)
via llvm-commits
- [llvm] [AArch64] Avoid GPR trip when moving truncated i32 vector elements (PR #114541)
via llvm-commits
- [llvm] [AArch64] Avoid GPR trip when moving truncated i32 vector elements (PR #114541)
via llvm-commits
- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] 8b65973 - [SystemZ] Make lit test more specific (#115050)
via llvm-commits
- [llvm] AMDGPU: Fold copy of scalar add of frame index (PR #115058)
via llvm-commits
- [llvm] [libc][bazel] Remove -mllvm --tail-merge-threshold=0 from Bazel. (PR #115061)
via llvm-commits
- [compiler-rt] db1882e - [SystemZ][XRay] XRay runtime support for SystemZ (#113252)
via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
via llvm-commits
- [clang] [llvm] [TLI] Add support for reallocarray (PR #114818)
via llvm-commits
- [llvm] [RISCV][GISel] Use boolean predicated legalization action methods to simplify code. NFC (PR #115063)
via llvm-commits
- [llvm] 4a37799 - [SystemZ][XRay] Implement XRay instrumentation for SystemZ (#113253)
via llvm-commits
- [llvm] 0b40f97 - AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (#113751)
via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
via llvm-commits
- [compiler-rt] [libcxx] [libcxxabi] [libunwind] [libunwind][libcxx][libcxxabi][compiler-rt-builtins] Fix Exception Handling build for wasm (PR #79667)
via llvm-commits
- [llvm] [VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (PR #115066)
via llvm-commits
- [llvm] e8644e3 - [AMDGPU][True16][MC] VOP2 update instructions with fake16 format (#114436)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110810)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110810)
via llvm-commits
- [llvm] 97982a8 - [RISCV][CFI] add function epilogue cfi information (#110810)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110810)
via llvm-commits
- [llvm] [RISCV] fix RISCVPushPopOptimizer pass (PR #110813)
via llvm-commits
- [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110810)
via llvm-commits
- [llvm] [RISCV] fix RISCVPushPopOptimizer pass (PR #110813)
via llvm-commits
- [llvm] [RISCV] fix RISCVPushPopOptimizer pass (PR #110813)
via llvm-commits
- [llvm] [RISCV][CFI] add function epilogue cfi information (PR #110234)
via llvm-commits
- [llvm] b8ac87f - [LLVM][AsmParser] Add support for C style comments (#111554)
via llvm-commits
- [llvm] Allow specifying libcxx builder image. (PR #110303)
via llvm-commits
- [llvm] [RISCV][NFC] refactor CFI emitting (PR #114227)
via llvm-commits
- [llvm] [RISCV] Prefer strided load for interleave load with only one lane active (PR #115069)
via llvm-commits
- [llvm] Allow specifying libcxx builder image. (PR #110303)
via llvm-commits
- [llvm] [RISCV] Prefer strided load for interleave load with only one lane active (PR #115069)
via llvm-commits
- [llvm] [openmp] [Offload] Provide a CMake cache file to easily build offloading (PR #115074)
via llvm-commits
- [llvm] a353e25 - [LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (#113126)
via llvm-commits
- [compiler-rt] [nfc][tsan] Simplify morder conversion (PR #115075)
via llvm-commits
- [compiler-rt] 823625c - [nfc][tsan] Simplify morder conversion (#115075)
via llvm-commits
- [llvm] [SandboxVec][Legality] Query the scheduler for legality (PR #114616)
via llvm-commits
- [llvm] [SandboxVec][Legality] Query the scheduler for legality (PR #114616)
via llvm-commits
- [llvm] [SandboxVec][Legality] Query the scheduler for legality (PR #114616)
via llvm-commits
- [llvm] [SandboxVec] Notify scheduler about new instructions (PR #115102)
via llvm-commits
- [llvm] [SandboxVec] Notify scheduler about new instructions (PR #115102)
via llvm-commits
- [llvm] 895a8e6 - [AArch64][GISel] Support neon.abs intrinsic for vector types (#107226)
via llvm-commits
- [llvm] 236fda5 - [Analysis] Remove unused includes (NFC) (#114936)
via llvm-commits
- [llvm] [DomTreeUpdater] Move critical edge splitting code to updater (PR #115111)
via llvm-commits
- [llvm] [LoongArch] Enable alias analysis by default (PR #114980)
via llvm-commits
- [llvm] [DomTreeUpdater] Move critical edge splitting code to updater (PR #115111)
via llvm-commits
- [llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
via llvm-commits
- [llvm] [Instrumentation] Remove unused includes (NFC) (PR #115117)
via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
via llvm-commits
- [llvm] [libc][bazel] Mark socket functions weak (PR #115088)
via llvm-commits
- [llvm] [RISCV] Add load/store clustering in post machine schedule (PR #111504)
via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
via llvm-commits
- [llvm] 492812f - [WebAssembly] Fix rethrow's index calculation (#114693)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] 4480a22 - [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (#101641)
via llvm-commits
- [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)
via llvm-commits
- [llvm] [RISCV] Add +unaligned-scalar-mem to spacemit-x60 (PR #115125)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] [LoongArch] Record the special AMO operand constraint with TableGen (PR #114398)
via llvm-commits
- [llvm] 5adb5c0 - [RISCV] Add tests for memcmp expansion
via llvm-commits
- [llvm] [LoongArch] Enable alias analysis by default (PR #114980)
via llvm-commits
- [lld] [lld][ELF] Consider exportDynamic of all comdat symbols when internalizing the symbol (PR #115126)
via llvm-commits
- [lld] [lld][ELF] Consider exportDynamic of all comdat symbols when internalizing the symbol (PR #115126)
via llvm-commits
- [lld] [lld][ELF] Consider exportDynamic of all comdat symbols when internalizing the symbol (PR #115126)
via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115127)
via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115127)
via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115128)
via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115128)
via llvm-commits
- [llvm] [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (PR #114922)
via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
via llvm-commits
- [llvm] 41248b5 - [docs] Update docs on code-review process (#111735)
via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU specific tryCandidate() (PR #114957)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] 08411c8 - [RISCV] Correct fcopysign pattern for zdinx (#114954)
via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
via llvm-commits
- [lld] [LLD][COFF] allow saving intermediate files with /lldsavetemps (PR #115131)
via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
via llvm-commits
- [llvm] 69d0bab - [RISCV] Add load/store clustering in post machine schedule (#111504)
via llvm-commits
- [llvm] [RISCV] Add load/store clustering in post machine schedule (PR #111504)
via llvm-commits
- [lld] [lld][ELF] Consider exportDynamic of all comdat symbols when internalizing the symbol (PR #115126)
via llvm-commits
- [clang] [llvm] [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (PR #112084)
via llvm-commits
- [clang] [llvm] [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (PR #112084)
via llvm-commits
- [clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 support (but still whole register) for reductions (PR #112361)
via llvm-commits
- [llvm] [DomTreeUpdater] Move critical edge splitting code to updater (PR #115111)
via llvm-commits
- [llvm] [DomTreeUpdater] Move critical edge splitting code to updater (PR #115111)
via llvm-commits
- [llvm] [DomTreeUpdater] Move critical edge splitting code to updater (PR #115111)
via llvm-commits
- [llvm] [DomTreeUpdater] Move critical edge splitting code to updater (PR #115111)
via llvm-commits
- [llvm] [DomTreeUpdater] Move critical edge splitting code to updater (PR #115111)
via llvm-commits
- [llvm] [DomTreeUpdater] Move critical edge splitting code to updater (PR #115111)
via llvm-commits
- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
via llvm-commits
- [lld] [lld][ELF] Resolve Symbols with same comdat index as Defined Symbols (PR #115140)
via llvm-commits
- [llvm] [SCEVExpander] Don't try to reuse SCEVUnknown values (PR #115141)
via llvm-commits
- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
via llvm-commits
- [llvm] [DAGCombiner] Remove a hasOneUse check in visitAND (PR #115142)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-AVX512 (PR #114070)
via llvm-commits
- [clang] [llvm] [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (PR #112084)
via llvm-commits
- [llvm] ebfafa2 - [SPIR-V] Fix OpFunctionParameter vs. OpTypeFunction types for pointer arguments when there are functions with aggregate arguments (#115044)
via llvm-commits
- [compiler-rt] f363f9d - [ORC][Runtime] Add `dlupdate` for elf (#110406)
via llvm-commits
- [llvm] d77a36e - [LoopVectorize] Use new getUniqueLatchExitBlock routine (#108231)
via llvm-commits
- [llvm] 5a16ed9 - [RISCV] Add +unaligned-scalar-mem to spacemit-x60 (#115125)
via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
via llvm-commits
- [llvm] [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (PR #115145)
via llvm-commits
- [llvm] ea6b8fa - [SDAG] Merge multiple-result libcall expansion into DAG.expandMultipleResultFPLibCall() (#114792)
via llvm-commits
- [llvm] [AArch64] Add missing ASIMD FP convert instructions to scheduling model (PR #115146)
via llvm-commits
- [lld] 56077e5 - [LLD][COFF] Add support for locally imported EC symbols (#114985)
via llvm-commits
- [llvm] [DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (PR #115150)
via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
via llvm-commits
- [llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
via llvm-commits
- [llvm] 38fffa6 - [LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)
via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
via llvm-commits
- [llvm] InstSimplify: support floating-point equivalences (PR #115152)
via llvm-commits
- [llvm] [LLVM][ARM] Latency mutations for cortex m55, m7 and m85 (PR #115153)
via llvm-commits
- [llvm] [SLP]Initial support for interleaved loads (PR #112042)
via llvm-commits
- [llvm] 88e9b37 - [FuncSpec] Query SCCPSolver in more places (#114964)
via llvm-commits
- [llvm] fbd89bc - Reland "[LTO] Run Argument Promotion before IPSCCP" (#111853)
via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_EXTRACT_VECTOR_ELT for SVE (PR #115161)
via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] [llvm] Use LazyValueInfo to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] 9b016e3 - [ARM] Add early-clobber to MVE VCMLA.f32 (#114995)
via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
via llvm-commits
- [llvm] Test added for x86-instr-mapping (PR #115170)
via llvm-commits
- [llvm] 86e4beb - [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (#112084)
via llvm-commits
- [llvm] [SLP]Enable splat ordering for loads (PR #115173)
via llvm-commits
- [llvm] [SLP]Enable splat ordering for loads (PR #115173)
via llvm-commits
- [llvm] [ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (PR #115174)
via llvm-commits
- [llvm] Test added for x86-instr-mapping (PR #115170)
via llvm-commits
- [llvm] [SampleFDO] Support enabling sample loader pass in O0 mode (PR #113985)
via llvm-commits
- [llvm] fb90733 - [HLSL] implement elementwise firstbithigh hlsl builtin (#111082)
via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
via llvm-commits
- [llvm] b5d8a03 - [AArch64] Add missing ASIMD FP convert instructions to scheduling model (#115146)
via llvm-commits
- [compiler-rt] 8699f30 - [rtsan] Add more socket interceptors (#115020)
via llvm-commits
- [llvm] 7642238 - [SLP]Support reordered buildvector nodes for better clustering
via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
via llvm-commits
- [llvm] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
via llvm-commits
- [llvm] f74aed7 - [DAGCombiner] Add basic support for `trunc nsw/nuw` (#113808)
via llvm-commits
- [lld] 201d760 - [ELF] Add context-aware diagnostic functions (#112319)
via llvm-commits
- [llvm] 83f92c3 - [RISCV] fix SP recovery in varargs functions (#114316)
via llvm-commits
- [llvm] [RISCV] fix SP recovery in varargs functions (PR #114316)
via llvm-commits
- [llvm] [RISCV] fix SP recovery in varargs functions (PR #114316)
via llvm-commits
- [llvm] 4d12a14 - [Instrumentation] Remove unused includes (NFC) (#115117)
via llvm-commits
- [llvm] Test added for x86-instr-mapping (PR #115170)
via llvm-commits
- [llvm] efe87fb - AMDGPU: Improve vector of pointer handling in amdgpu-promote-alloca (#114144)
via llvm-commits
- [llvm] 5dc8d61 - [RISCV][GISel] Implement zexti32/zexti16 ComplexPatterns. (#115097)
via llvm-commits
- [llvm] 29e467f - [llvm] Deprecate Type::getPointerTo() (#113331)
via llvm-commits
- [llvm] [Codegen] Spill/Restore FP/BP under option (PR #114791)
via llvm-commits
- [llvm] aa79412 - AMDGPU: Fold copy of scalar add of frame index (#115058)
via llvm-commits
- [llvm] [SLP]Represent externally used values as original scalars, if profitable. (PR #100904)
via llvm-commits
- [llvm] 3b0f506 - [AMDGPU] Support `nuw` and `nusw` in buffer fat pointer lowering (#115039)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] [LLVM][SVE] Extend dup(extract_elt(v,i)) isel patterns to cover all combinations. (PR #115189)
via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
via llvm-commits
- [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)
via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
via llvm-commits
- [llvm] ffc2233 - [AArch64][SVE2] Add pattern for constructive EXT instruction. (#115047)
via llvm-commits
- [llvm] [dsymutil] Add missing newlines in error messages. (PR #115191)
via llvm-commits
- [llvm] 8c75290 - [AMDGPU] modify named barrier builtins and intrinsics (#114550)
via llvm-commits
- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
via llvm-commits
- [llvm] [SPIR-V] Fix early definition of SPIR-V types during call lowering (PR #115192)
via llvm-commits
- [llvm] [WIP-LTO] Print conflicting operands between Src and Dest modules (PR #115104)
via llvm-commits
- [llvm] [SPIR-V] Fix early definition of SPIR-V types during call lowering (PR #115192)
via llvm-commits
- [llvm] [WIP-LTO] Print conflicting operands between Src and Dest modules (PR #115104)
via llvm-commits
- [llvm] [SPIRV] Audit `select` Result in SPIRVInstructionSelector (PR #115193)
via llvm-commits
- [llvm] [HLSL] Update tests to use splat for vector constants (PR #115198)
via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (PR #115068)
via llvm-commits
- [llvm] 381156c - [HLSL] Update tests to use splat for vector constants (#115198)
via llvm-commits
- [llvm] [AMDGPU] fix build error unused-var (PR #115199)
via llvm-commits
- [llvm] 768b0b4 - [RISCV] Add test cases for RV64 i128<->half/float/double (#115124)
via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
via llvm-commits
- [llvm] [AMDGPU][MC] Allow null where 128b or larger dst reg is expected (PR #115200)
via llvm-commits
- [llvm] [AMDGPU][MC] Allow null where 128b or larger dst reg is expected (PR #115200)
via llvm-commits
- [llvm] 3ed4b0b - [NVPTX] Emit prmt selection value in hex (#115049)
via llvm-commits
- [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)
via llvm-commits
- [llvm] [SLP]Add cost estimation for gather node reshuffling (PR #115201)
via llvm-commits
- [compiler-rt] e7bad34 - [compiler-rt] Use installed libc++(abi) for tests instead of build tree
via llvm-commits
- [compiler-rt] a036d18 - [compiler-rt] Reduce build output for tests
via llvm-commits
- [lld] [LLD][COFF] Append a terminator entry to redirection metadata (PR #115202)
via llvm-commits
- [llvm] [SandboxVec] Notify scheduler about new instructions (PR #115102)
via llvm-commits
- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
via llvm-commits
- [llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)
via llvm-commits
- [llvm] 375d192 - Revert "[NVPTX] Emit prmt selection value in hex" (#115204)
via llvm-commits
- [llvm] Revert "[NVPTX] Emit prmt selection value in hex" (PR #115204)
via llvm-commits
- [llvm] add QuietMisdreavus to Clang/ExtractAPI code owners (PR #115206)
via llvm-commits
- [llvm] [VectorCombine] Combine scalar fneg with insert/extract to vector fneg when length is different (PR #115209)
via llvm-commits
- [llvm] [VectorCombine] Combine scalar fneg with insert/extract to vector fneg when length is different (PR #115209)
via llvm-commits
- [llvm] [NFC][AMDGPU] Guard FP8 related instructions properly (PR #115211)
via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
via llvm-commits
- [llvm] 5942a99 - [SandboxVec] Notify scheduler about new instructions (#115102)
via llvm-commits
- [llvm] [SandboxVec] Notify scheduler about new instructions (PR #115102)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [llvm] [memprof] Add extractCallsFromIR (PR #115218)
via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
via llvm-commits
- [llvm] [X86] visitSelect - widen select(cond,extract_subvector(shuffle(vec0)),vec1) if it will create a mask instruction (PR #115223)
via llvm-commits
- [llvm] [AMDGPU] Fix typo in v_dot4 combine (PR #115224)
via llvm-commits
- [llvm] [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (PR #115225)
via llvm-commits
- [llvm] Make functions always renamable (PR #115226)
via llvm-commits
- [compiler-rt] 87f4bc0 - [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (#115167)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [compiler-rt] [rtsan] Add I/O multiplexing interceptors (PR #115227)
via llvm-commits
- [llvm] [GlobalISel][AArch64] Allow vector ptr to int unmerges (PR #115228)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [llvm] 7ef7c0d - [RISCV] Refine vector division latencies in SiFive P600's scheduling model (#115038)
via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
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- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
via llvm-commits
- [llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [llvm] f6617d6 - [DebugInfo] Add num_extra_inhabitants to debug info (#112590)
via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
via llvm-commits
- [llvm] [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (PR #115236)
via llvm-commits
- [llvm] cacbe71 - [Analysis] Avoid running transform passes that have just been run (#112092)
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- [llvm] bbc3af0 - [dsymutil] Add missing newlines in error messages. (#115191)
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- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
via llvm-commits
- [llvm] AtomicExpand: Preserve metadata when bitcasting fp atomicrmw xchg (PR #115240)
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- [llvm] [OpenMP] Add missing SExt attributes on __kmpc_omp_taskwait_deps_51 args. (PR #115242)
via llvm-commits
- [clang] [llvm] [HLSL][SPIRV] Added clamp intrinsic (PR #113394)
via llvm-commits
- [llvm] [RISCV] Update SiFive P600's scheduling model on RVV instructions (PR #115243)
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- [llvm] 5348a30 - [ExecutionEngine] Simplify code with DenseMap::operator[] (NFC) (#115115)
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- [llvm] cbfe87c - [GlobalISel] Remove references to rhs of shufflevector if rhs is undef (#115076)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
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- [llvm] [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (PR #115244)
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- [llvm] 7c82875 - [GISel][RISCV][AMDGPU] Add G_SHL, G_LSHR, G_ASHR to binop_left_to_zero. (#115089)
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- [llvm] 29a5c05 - ValueTracking: Allow getUnderlyingObject to look at vectors (#114311)
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- [llvm] 05f87b2 - [RISCV] Lower fixed-length mload/mstore for zvfhmin/zvfbfmin (#115145)
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- [llvm] [RISCV] Lower fixed-length vp_{gather,scatter} for zvfhmin/zvfbfmin (PR #115253)
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- [llvm] c6091cd - [SLP][REVEC] Make shufflevector can be vectorized with ReorderIndices and ReuseShuffleIndices. (#114965)
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- [llvm] [NFC][CodingStandard] Adjust the ordering of dependency libraries. (PR #115254)
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- [llvm] [NFC][CodingStandard] Adjust the ordering of dependency libraries. (PR #115254)
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- [llvm] [NFC][CodingStandard] Adjust the ordering of dependency libraries. (PR #115254)
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- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
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- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
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- [llvm] da032b7 - [RISCV][GISel] Use maskedValueIsZero in RISCVInstructionSelector::selectZExtBits. (#115244)
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- [llvm] 3bdd711 - [TableGen][GISel] Extract helper function for constraining operands (#115148)
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- [llvm] [RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal interleaved access (PR #115257)
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- [llvm] ValueTracking: Do not return nullptr from getUnderlyingObject (PR #115258)
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- [llvm] ValueTracking: Do not return nullptr from getUnderlyingObject (PR #115258)
via llvm-commits
- [llvm] [IPO] Simplify code with DenseMap::operator[] (NFC) (PR #115261)
via llvm-commits
- [llvm] [Utils] Avoid repeated hash lookups (NFC) (PR #115262)
via llvm-commits
- [llvm] [Transforms] Remove unused includes (NFC) (PR #115263)
via llvm-commits
- [llvm] [RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal strided access (PR #115264)
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- [llvm] 481ff22 - [RISCV] Lower fixed-length vp_{gather,scatter} for zvfhmin/zvfbfmin (#115253)
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- [llvm] f0e2301 - [RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal interleaved access (#115257)
via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
via llvm-commits
- [llvm] ae6dbed - [AMDGPU] Use correct DWord for v_dot4 S0 operand (#115224)
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- [llvm] f7ef7b2 - [SandboxVec][Scheduler] Implement rescheduling (#115220)
via llvm-commits
- [llvm] [SandboxVec][Scheduler] Implement rescheduling (PR #115220)
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- [llvm] [SandboxVec][BottomUpVec] Clean up dead instructions (PR #115267)
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- [llvm] [SandboxVec][BottomUpVec] Clean up dead instructions (PR #115267)
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- [llvm] Revert "TLS loads opimization (hoist)" (PR #114740)
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- [llvm] [RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (PR #115268)
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- [llvm] [RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (PR #115268)
via llvm-commits
- [compiler-rt] Add extendhfxf2 into compiler rt (PR #113897)
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- [llvm] [AMDGPU][NFC] Precommit tests representing spills. (PR #115270)
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- [llvm] [NFC][CodingStandard] Adjust the ordering of dependency libraries. (PR #115254)
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- [llvm] 343a810 - [RISCV] Allow f16/bf16 with zvfhmin/zvfbfmin as legal strided access (#115264)
via llvm-commits
- [llvm] [RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (PR #115272)
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- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
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- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
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- [llvm] [VPlan] Add support for VPWidenIntOrFpInductionRecipe in predicated D… (PR #115274)
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- [llvm] 9f79615 - Add clang::lifetimebound annotation to llvm::function_ref (#115019)
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- [llvm] 3850801 - [RISCV] Add vcpop.m/vfirst.m to RISCVMaskedPseudosTable
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- [llvm] [CodeGen] Use first EHLabel as a stop gate for live range shrinking (PR #114195)
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- [polly] 0b9f1cc - [SCEV] Disallow simplifying phi(undef, X) to X (#115109)
via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
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- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
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- [llvm] 1469d82 - Remove `br i1 undef` from some regression tests [NFC] (#115130)
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- [llvm] Remove `br i1 undef` from regression tests (PR #115130)
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- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
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- [llvm] [RISCV][AsmParser] Allow parsing vsetvl omitting LMUL parameter (PR #115277)
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- [llvm] 9b909b8 - [AMDGPU][NFC] Precommit tests representing agpr spills. (#115270)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
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- [llvm] 5f34281 - [llvm] Use computeConstantRange to improve llvm.objectsize computation (#114673)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
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- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
via llvm-commits
- [flang] [llvm] [Flang][OpenMP] Add semantic checks for order clause (PR #115281)
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- [llvm] d2aff18 - Revert "TLS loads opimization (hoist)" (#114740)
via llvm-commits
- [llvm] 2d7f34f - [ValueTracking] Don't special case depth for phi of select (#114996)
via llvm-commits
- [llvm] [RISCV][TTI] Add vp.fneg intrinsic cost with functionalOP (PR #114378)
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- [llvm] [llvm-objdump][ELF] Ensure offset to verdaux entry array does not go past size (PR #115284)
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- [llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
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- [compiler-rt] [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (PR #115167)
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- [llvm] 1b01064 - [NVPTX] Add TMA bulk tensor copy intrinsics (#96083)
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- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
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- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
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- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
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- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
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- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
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- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
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- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
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- [llvm] [AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (PR #115292)
via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
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- [llvm] 6720ce7 - [Docs][llvm-exegesis] Clarify AArch64 support (#114989)
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- [llvm] dd98ae3 - Test added for x86-instr-mapping (#115170)
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- [llvm] [TableGen][SelectionDAG] Remove the `implicit` DAG node (PR #115295)
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- [llvm] [TableGen][SelectionDAG] Remove the `implicit` DAG node (PR #115295)
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- [llvm] [TableGen][SelectionDAG] Remove the `implicit` DAG node (PR #115295)
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- [llvm] 9f02950 - [ARM] Allow spilling FPSCR for MVE adc/sbc intrinsics (#115174)
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- [clang] [llvm] [AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (PR #115296)
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- [clang] [llvm] [AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (PR #115296)
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- [clang] [llvm] [AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (PR #115296)
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- [llvm] d87dbcb - [LoongArch] Reuse GPRRegisterClass to shorten some code in LoongArchRegisterInfo.td. NFC
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- [llvm] [RISCV] Implement tail call optimization in machine outliner (PR #115297)
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- [clang] [compiler-rt] Reapply "[XRay][AArch64] Support -fxray-shared (#114431)" (PR #115300)
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- [llvm] abe0cd4 - ValueTracking: pre-commit udiv/urem recurrence tests (#109198)
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- [clang] [compiler-rt] Reapply "[XRay][AArch64] Support -fxray-shared (#114431)" (PR #115300)
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- [llvm] fef6613 - ValueTracking: simplify udiv/urem recurrences (#108973)
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- [lld] dafbc97 - [LLD][COFF] Append a terminator entry to redirection metadata (#115202)
via llvm-commits
- [llvm] [InstSimplify] Fix incorrect poison propagation when folding phi (PR #96631)
via llvm-commits
- [llvm] 9470945 - [CalcSpillWeights] Simplify copy hint register collection. NFC. (#114236)
via llvm-commits
- [llvm] b358f21 - [X86] visitSelect - widen select(cond,extract_subvector(shuffle(vec0)),vec1) if it will create a mask instruction (#115223)
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- [llvm] 9123dc6 - [AArch64] AArch64ISelDAGToDAG.cpp - disable inlining on MSVC release builds (#115292)
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- [llvm] f5e4ffa - Revert "[llvm] Use computeConstantRange to improve llvm.objectsize computation (#114673)"
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
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- [lld] [LLD][COFF] Use correct machine types in PDB records on ARM64EC (PR #115309)
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- [lld] [LLD][COFF] Use correct machine types in PDB records on ARM64EC (PR #115309)
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- [lld] [LLD][COFF] Use correct machine types in PDB records on ARM64EC (PR #115309)
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- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
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- [llvm] [RuntimeDyld] Add LoongArch support (PR #114741)
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- [lld] [LLD][COFF] Add S_THUNK32 PDB records for all ARM64EC import thunks (PR #115310)
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- [llvm] [RuntimeDyld] Add LoongArch support (PR #114741)
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- [llvm] [RuntimeDyld] Add LoongArch support (PR #114741)
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- [llvm] dd11636 - [InstSimplify] Fix incorrect poison propagation when folding phi (#96631)
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- [compiler-rt] [compiler-rt][RISCV] Avoid using __init_riscv_feature_bits as a direc… (PR #115316)
via llvm-commits
- [llvm] [LoopInterchange] Bail out early if minimum loop nest is not met (PR #115128)
via llvm-commits
- [llvm] [AMDGPU] Fix resource usage information for unnamed functions (PR #115320)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [compiler-rt] [llvm] [msan] Add 32-bit platforms support (PR #109284)
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- [compiler-rt] [llvm] [msan] Add 32-bit platforms support (PR #109284)
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- [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)
via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
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- [llvm] 21835ee - [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (#115291)
via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
via llvm-commits
- [llvm] [RISCV] Skip DAG combine for bitcast fabs/fneg (PR #115325)
via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] [GlobalOpt] Fix global SRA incorrect alignment on some elements (PR #115328)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [llvm] c8a7f14 - [Backend] Add clearSubtargetMap API for TargetMachine. (#112383)
via llvm-commits
- [compiler-rt] [win/asan] Support instructions in GetInstructionSize used by Wine. (PR #113085)
via llvm-commits
- [llvm] c87d198 - [ORC] Switch to new visibility macros for JIT debug symbols (#113848)
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- [llvm] ec05b88 - [lineeditor] Add `setHistorySize()` method for adjusting history size (#110092)
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- [llvm] d74b1f0 - ValueTracking: Do not return nullptr from getUnderlyingObject (#115258)
via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
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- [llvm] [bolt] Introduce binary analysis tool based on BOLT. (PR #115330)
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- [llvm] 76a52db - [OpenMP] Add missing SExt attributes on i32 args. (#115242)
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- [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #115331)
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- [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #115331)
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- [llvm] e373ba4 - [llvm-objdump] Implement decoding auxiliary header for xcoff with llvm-objdump --private-headers (#105682)
via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
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- [compiler-rt] 522880c - [compiler-rt][RISCV] Avoid using __init_riscv_feature_bits as a direc… (#115316)
via llvm-commits
- [llvm] [mlir] andrzej/extend vector to llvm test 9 (PR #115335)
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- [llvm] [mlir] andrzej/extend vector to llvm test 9 (PR #115335)
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- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
via llvm-commits
- [clang] [compiler-rt] [lldb] [llvm] [mlir] [SPIRV] Add reads from image buffer for shaders. (PR #115178)
via llvm-commits
- [llvm] 392807e - [RISCV] Separate HW/SW shadow stack on RISC-V (#112478)
via llvm-commits
- [clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)
via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (PR #115291)
via llvm-commits
- [llvm] [mlir] andrzej/disable flat transpose scalable (PR #115338)
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- [llvm] [mlir] andrzej/disable flat transpose scalable (PR #115338)
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- [compiler-rt] 5a8956e - [compiler-rt][libunwind] Support aarch64 without FPU (#111235)
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- [llvm] ef353b0 - Introduce a new WebKit checker for a unchecked call arguments (#113708) (#114522)
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- [clang] [llvm] [AArch64][SVE] Change the immediate argument in svextq (PR #115340)
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- [clang] [llvm] [AArch64][SVE] Change the immediate argument in svextq (PR #115340)
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- [clang] [llvm] [AArch64][SVE] Change the immediate argument in svextq (PR #115340)
via llvm-commits
- [llvm] [VectorCombine] Combine BinOp with extract/insert to vector BinOp (PR #115213)
via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
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- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
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- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
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- [llvm] f58757b - [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (#114946)
via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
via llvm-commits
- [llvm] [ObjectYAML][ELF] Allow verdaux entry offset to be user-defined (PR #115343)
via llvm-commits
- [compiler-rt] e8b7d8b - [FMV][AArch64] Remove features which expose non exploitable runtime behavior. (#114387)
via llvm-commits
- [llvm] 7c63b10 - [NFC][AMDGPU] Guard FP8 related instructions properly (#115211)
via llvm-commits
- [llvm] [IR][Attributes] Take "best" from Callbase/Call Function when getting attributes (PR #112985)
via llvm-commits
- [llvm] [DebugInfo] Update policy for when to merge locations (PR #115349)
via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #114946)
via llvm-commits
- [llvm] Revert "[AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes" (PR #115353)
via llvm-commits
- [llvm] bc7e099 - Revert "[AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes" (#115353)
via llvm-commits
- [llvm] Revert "[AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes" (PR #115353)
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- [llvm] Revert "[AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes" (PR #115353)
via llvm-commits
- [llvm] [SLP]Enable interleaved stores support (PR #115354)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] 7760ae7 - [X86] Switch to the new symbol visibility macros (#109982)
via llvm-commits
- [llvm] bf30b6c - [HLSL][SPIRV][DXIL] Implement `dot4add_u8packed` intrinsic (#115068)
via llvm-commits
- [llvm] e8b70e9 - [TableGen] Make `!and` and `!or` short-circuit (#113963)
via llvm-commits
- [llvm] 7f60f13 - [AMDGPU] Fix resource usage information for unnamed functions (#115320)
via llvm-commits
- [llvm] [AMDGPU][True16][MC] update true16 flag on vinterp test (PR #115356)
via llvm-commits
- [libc] [llvm] [libc] Support multilib with runtimes build (PR #115357)
via llvm-commits
- [llvm] 937e506 - [IPO] Simplify code with DenseMap::operator[] (NFC) (#115261)
via llvm-commits
- [llvm] 1ae5ecc - [Utils] Avoid repeated hash lookups (NFC) (#115262)
via llvm-commits
- [llvm] b02e5bc - [Transforms] Remove unused includes (NFC) (#115263)
via llvm-commits
- [llvm] [DebugInfo] Add an specification_of attribute to LLVM DebugInfo (PR #115362)
via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV] Remove feature dgh. (PR #115363)
via llvm-commits
- [llvm] [SDAG] Only apply sincos/frexp stack slot folding to IR pointers (PR #115346)
via llvm-commits
- [llvm] [RISCV][GISel] Add fcopysign tests with mismatched types. NFC (PR #115364)
via llvm-commits
- [llvm] [MachineSink] Sink into consistent blocks for optsize funcs (PR #115367)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [llvm] [SDAG] Only apply sincos/frexp stack slot folding to IR pointers (PR #115346)
via llvm-commits
- [llvm] 1fef4ad - [AMDGPU][True16][MC] update true16 flag on vinterp test (#115356)
via llvm-commits
- [llvm] [InstCombine] fold `sub(zext(ptrtoint), zext(ptrtoint))` (PR #115369)
via llvm-commits
- [llvm] 09fb01a - [gn build] Enable hwasan for aarch64 Android (#115219)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [llvm] [SLP]Represent externally used values as original scalars, if profitable. (PR #100904)
via llvm-commits
- [llvm] 1f25099 - [DirectX] introducing lowering for `bufferUpdateCounter` (#115041)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] 87feafc - [RISCV][GISel] Custom promote s32 G_ROTL/ROTR on RV64. (#115107)
via llvm-commits
- [llvm] [AMDGPU] Re-enable closed-world assumption as an opt-out feature (PR #115371)
via llvm-commits
- [llvm] AMDGPU: Don't avoid clamp of bit shift in BFE pattern (PR #115372)
via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
via llvm-commits
- [llvm] Revert "Add clang::lifetimebound annotation to llvm::function_ref (#1… (PR #115376)
via llvm-commits
- [llvm] e109c49 - Revert "Add clang::lifetimebound annotation to llvm::function_ref (#1… (#115376)
via llvm-commits
- [llvm] ae9d062 - [RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (#115236)
via llvm-commits
- [llvm] [GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (PR #115377)
via llvm-commits
- [llvm] bdf8e30 - AMDGPU: Don't avoid clamp of bit shift in BFE pattern (#115372)
via llvm-commits
- [llvm] [CodeExtractor][NFC] Refactor-out applyFirstDebugLoc. (PR #115358)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [llvm] 02668f6 - [RISCV] Match single source deinterleave shuffles for vnsrl (#114878)
via llvm-commits
- [llvm] [SystemZ] Fix bitwidth problem in FindReplicatedImm() (NFC). (PR #115383)
via llvm-commits
- [llvm] e189d61 - [memprof] Add extractCallsFromIR (#115218)
via llvm-commits
- [llvm] [Coroutines] Respect noinline attributes when eliding heap allocation (PR #115384)
via llvm-commits
- [llvm] [Coroutines] Respect noinline attributes when eliding heap allocation (PR #115384)
via llvm-commits
- [llvm] 3b1b127 - [Xtensa] Implement support for the BranchRelaxation. (#113450)
via llvm-commits
- [llvm] [SPIRV] Use `Op[S|U]Dot` when possible for integer dot product (PR #115095)
via llvm-commits
- [llvm] [M68k] implement large code model (PR #106381)
via llvm-commits
- [llvm] [RISCV][GISel] Add G_ZEXT to RISCVInstructionSelector::selectZExtBits. (PR #115391)
via llvm-commits
- [llvm] [RISCV][GISel] Add G_ZEXT to RISCVInstructionSelector::selectZExtBits. (PR #115391)
via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
via llvm-commits
- [clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)
via llvm-commits
- [llvm] [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (PR #115402)
via llvm-commits
- [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)
via llvm-commits
- [llvm] 037f804 - [RISCV][GISel] Add fcopysign tests with mismatched types. NFC (#115364)
via llvm-commits
- [llvm] d3177d8 - [RISCV][GISel] Custom promote s32 G_FPTOSI/FPTOUI on RV64. (#115268)
via llvm-commits
- [llvm] Optimize fptrunc(x)>=C1 --> x>=C2 (PR #99475)
via llvm-commits
- [llvm] 1febd71 - [NVPTX] Add TTI support for folding isspacep in InferAS (#114486)
via llvm-commits
- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
via llvm-commits
- [llvm] ConstantFolding: Do not fold fcmp of denormal without known mode (PR #115407)
via llvm-commits
- [llvm] [TailDuplicator] Only duplicate the blocks containing computed gotos (PR #114990)
via llvm-commits
- [llvm] 36d757f - [HLSL][SPIRV] Added clamp intrinsic (#113394)
via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
via llvm-commits
- [llvm] 4e668d5 - [RuntimeDyld] Add LoongArch support
via llvm-commits
- [llvm] [RuntimeDyld] Add LoongArch support (PR #114741)
via llvm-commits
- [lldb] [llvm] [lldb][LoongArch] Function calls support in lldb expressions (PR #114742)
via llvm-commits
- [lldb] [llvm] [lldb][LoongArch] Function calls support in lldb expressions (PR #114742)
via llvm-commits
- [clang] [llvm] [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (PR #112084)
via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
via llvm-commits
- [llvm] 4fb43c4 - AMDGPU: Fold more scalar operations on frame index to VALU (#115059)
via llvm-commits
- [llvm] e520b28 - [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (#113382)
via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Clean up dead instructions (PR #115267)
via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Clean up dead instructions (PR #115267)
via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Clean up dead instructions (PR #115267)
via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
via llvm-commits
- [llvm] [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (PR #115417)
via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
via llvm-commits
- [llvm] [MemProf] Avoid incorrect ICP symtab canonicalization (PR #115419)
via llvm-commits
- [llvm] 50e73ae - [flang][OpenMP] Parse `bind` clause for `loop` direcitve. (#113662)
via llvm-commits
- [llvm] [OpenMP] Allocatable explicit member mapping fortran offloading tests (PR #113555)
via llvm-commits
- [llvm] [mlir] [OpenMP][MLIR] Descriptor explicit member map lowering changes (PR #113556)
via llvm-commits
- [llvm] 594e11c - [MemProf] Avoid incorrect ICP symtab canonicalization (#115419)
via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
via llvm-commits
- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
via llvm-commits
- [llvm] 2f40e3e - [M68k] implement large code model (#106381)
via llvm-commits
- [llvm] [M68k] implement large code model (PR #106381)
via llvm-commits
- [llvm] [M68k] implement large code model (PR #106381)
via llvm-commits
- [llvm] [LoongArch] Precommit test for avoid indirect branch jumps through ra. NFC (PR #115423)
via llvm-commits
- [llvm] [LoongArch] Precommit test for avoid indirect branch jumps through ra. NFC (PR #115423)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [llvm] [SPIRV] Use heterogenous lookups with std::map (NFC) (PR #115425)
via llvm-commits
- [llvm] 9061e6e - [GlobalISel][AArch64] Legalize G_EXTRACT_VECTOR_ELT for SVE (#115161)
via llvm-commits
- [llvm] c17a914 - [RISCV] Add Smdbltrp and Ssdbltrp extension (#111837)
via llvm-commits
- [clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)
via llvm-commits
- [llvm] [RISCV] Only allow 5 bit shift amounts in disassembler for RV32. (PR #115432)
via llvm-commits
- [llvm] [RISCV] Only allow 5 bit shift amounts in disassembler for RV32. (PR #115432)
via llvm-commits
- [clang] [clang-tools-extra] [llvm] Add code completion for C++20 keywords. (PR #107982)
via llvm-commits
- [clang] [llvm] [MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (PR #112084)
via llvm-commits
- [llvm] 984bca9 - [GVN][NewGVN] Take call attributes into account in expressions (#114545)
via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
via llvm-commits
- [llvm] [lit] Add --report-failures-only option for lit test reports (PR #115439)
via llvm-commits
- [flang] [llvm] [mlir] [flang][mlir][llvm][OpenMP] Add lowering and translation support for mergeable clause on task (PR #114662)
via llvm-commits
- [llvm] [SLP] NFC. Use Value instead of template. (PR #115440)
via llvm-commits
- [llvm] [memprof] Teach extractCallsFromIR to look into inline stacks (PR #115441)
via llvm-commits
- [llvm] Reland `[lineeditor] Add `setHistorySize()` method for adjusting history size` (PR #115442)
via llvm-commits
- [llvm] ff07df6 - [InstCombine] Drop nsw in negation of select (#112893)
via llvm-commits
- [llvm] Reland '[lineeditor] Add `setHistorySize()` method for adjusting history size' (PR #115442)
via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
via llvm-commits
- [llvm] [RISCV] Override default sched policy (PR #115445)
via llvm-commits
- [llvm] [RISCV] Remove forced-sw-shadow-stack in RISCVFeatures.td (PR #115447)
via llvm-commits
- [compiler-rt] [llvm] [ORC][Runtime] Add dlupdate for coff (PR #115448)
via llvm-commits
- [llvm] d74127e - [flang][OpenMP][MLIR] Add MLIR op for loop directive (#113911)
via llvm-commits
- [llvm] [SelectionDAG] Add support for extending masked loads in computeKnownBits (PR #115450)
via llvm-commits
- [llvm] [SelectionDAG] Add support for extending masked loads in computeKnownBits (PR #115450)
via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [llvm] [DebugInfo] Add num_extra_inhabitants to debug info (PR #112590)
via llvm-commits
- [llvm] Zext sext undef in sdag (PR #115451)
via llvm-commits
- [llvm] Zext sext undef in sdag (PR #115451)
via llvm-commits
- [llvm] [AMDGPU] Clarify amdgpu.cs.chain + init whole wave. NFC (PR #115452)
via llvm-commits
- [lld] ffe49b7 - [LLD][COFF] Use correct machine types in PDB records on ARM64EC (#115309)
via llvm-commits
- [compiler-rt] 799e520 - [FMV] Remove feature dgh. (#115363)
via llvm-commits
- [llvm] 799e520 - [FMV] Remove feature dgh. (#115363)
via llvm-commits
- [llvm] [StructurizeCFG] Introduce struct PredInfo. NFC. (PR #115457)
via llvm-commits
- [llvm] 2c49301 - [IR] Remove variadic overload of StructType::setBody. NFC. (#114421)
via llvm-commits
- [llvm] 31af00f - [AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (#115296)
via llvm-commits
- [clang] [llvm] [AArch64][v8.7-A] Fix inconsistency in SPE_EEF feature (PR #115296)
via llvm-commits
- [llvm] [LegalizeTypes] Support softening FMINIMUM/FMAXIMUM (PR #115463)
via llvm-commits
- [clang] [llvm] Reland [clang][AArch64] Add getHostCPUFeatures to query for enabled f… (PR #115467)
via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
via llvm-commits
- [llvm] 3797daa - [AArch64] Create set.fpmr intrinsic and assembly lowering (#114248)
via llvm-commits
- [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)
via llvm-commits
- [llvm] Add StringMap::lookup() overload to take a default value and return a reference to the value to avoid a copy (PR #115469)
via llvm-commits
- [llvm] e3b0ef7 - [RISCV] Remove forced-sw-shadow-stack in RISCVFeatures.td (#115447)
via llvm-commits
- [lld] [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (PR #115374)
via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [llvm] [CodeGen][NewPM] Port LiveDebugVariables to NPM (PR #115468)
via llvm-commits
- [llvm] [StructurizeCFG] Remove one SSAUpdater::AddAvailableValue. NFCI. (PR #115472)
via llvm-commits
- [lld] [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (PR #115474)
via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
via llvm-commits
- [lld] 5fbe9b9 - [LLD][COFF] Set __guard_flags to CF_INSTRUMENTED if any object is instrumented (#115374)
via llvm-commits
- [llvm] [StructurizeCFG] Refactor insertConditions. NFC. (PR #115476)
via llvm-commits
- [llvm] [symbolizer] Change the ErrorHandler from llvm::function_ref to std::function. (PR #115477)
via llvm-commits
- [llvm] [symbolizer] Change the ErrorHandler from llvm::function_ref to std::function. (PR #115477)
via llvm-commits
- [llvm] [AMDGPU] Add target feature require-naturally-aligned-buffer-access (PR #115479)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [llvm] [InstCombine] Fix poison safety of folding shufflevector into select (PR #115483)
via llvm-commits
- [llvm] [RISCV] When using global merging, don't enable merging of external globals by default (PR #115484)
via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
via llvm-commits
- [llvm] 107af4a - [StructurizeCFG] Introduce struct PredInfo. NFC. (#115457)
via llvm-commits
- [llvm] 644a9a4 - [CodeExtractor][NFC] Refactor-out applyFirstDebugLoc. (#115358)
via llvm-commits
- [llvm] [SelectOpt] Support ADD and SUB with zext operands. (PR #115489)
via llvm-commits
- [llvm] [RISCV] Enable global merging by default (PR #115495)
via llvm-commits
- [llvm] 9aea667 - [symbolizer] Change the ErrorHandler from llvm::function_ref to std::function. (#115477)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] da9499e - [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114293)
via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [llvm] [RISCV] fix SP recovery in varargs functions (PR #114316)
via llvm-commits
- [llvm] [MC][ARM] Fix crash when assembling Thumb 'movs r0, #foo'. (PR #115026)
via llvm-commits
- [llvm] 71f82bb - [SPIRV] Use heterogenous lookups with std::map (NFC) (#115425)
via llvm-commits
- [llvm] bc7e5c2 - [SLP] Avoid repeated hash lookups (NFC) (#115428)
via llvm-commits
- [llvm] Zext sext undef in sdag (PR #115451)
via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
via llvm-commits
- [llvm] [AMDGPU] Reorganize tests to unblock #112403 (PR #115503)
via llvm-commits
- [llvm] [llvm] Fix handling of very large allocation in llvm.objectsize expan… (PR #115504)
via llvm-commits
- [llvm] [llvm] Fix handling of very large allocation in llvm.objectsize expan… (PR #115504)
via llvm-commits
- [llvm] [llvm] Fix handling of very large allocation in llvm.objectsize expan… (PR #115504)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] 3356eb3 - [llvm-reduce] Reduce samesign flag from icmp (#115492)
via llvm-commits
- [llvm] [Clang] [OMPIRBuilder] Add Assertion to Prevent Null Pointer Dereference in OpenMP IR Builder (PR #115506)
via llvm-commits
- [llvm] [Clang] [OMPIRBuilder] Add Assertion to Prevent Null Pointer Dereference in OpenMP IR Builder (PR #115506)
via llvm-commits
- [llvm] 92a9bcc - [AArch64] Add tablegen patterns for fmla index with extract 0. (#114976)
via llvm-commits
- [llvm] [SimplifyLibCalls] Constant fold scalbxx (PR #114417)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [llvm] [JITLink] Use `rsplit` on `-sectcreate` argument in llvm-jitlink (PR #115511)
via llvm-commits
- [llvm] add QuietMisdreavus to Clang/ExtractAPI code owners (PR #115206)
via llvm-commits
- [llvm] 92e0fb0 - [DebugInfo][LoopUnroll] Preserve DebugLocs on optimized cond branches (#114225)
via llvm-commits
- [llvm] bde3d4a - [RISCV] Only allow 5 bit shift amounts in disassembler for RV32. (#115432)
via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
via llvm-commits
- [llvm] b535e4e - [StructurizeCFG] Remove one SSAUpdater::AddAvailableValue. NFCI. (#115472)
via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #115522)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #115522)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #115522)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #115522)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #114673)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #115522)
via llvm-commits
- [llvm] M68k atomic addr modes for merge (PR #115523)
via llvm-commits
- [llvm] d30a6dc - [AMDGPU] Reorganize tests to unblock #112403 (#115503)
via llvm-commits
- [llvm] M68k atomic addr modes for merge (PR #115523)
via llvm-commits
- [llvm] e215a1e - [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)
via llvm-commits
- [llvm] [AArch64] Allow SVE_AES instructions in streaming mode with SSVE_AES (PR #115526)
via llvm-commits
- [llvm] [AArch64] Allow SVE_AES instructions in streaming mode with SSVE_AES (PR #115526)
via llvm-commits
- [llvm] [AArch64] Allow SVE_AES instructions in streaming mode with SSVE_AES (PR #115526)
via llvm-commits
- [llvm] [CodeLayout] Do not flip branch condition when using optsize (PR #114607)
via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor prefetch intrinsics (PR #115527)
via llvm-commits
- [llvm] [NVPTX] Add TMA bulk tensor prefetch intrinsics (PR #115527)
via llvm-commits
- [llvm] [X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X, C1), C2) --> kshiftr(X, C1+C2) (PR #115528)
via llvm-commits
- [llvm] M68k atomic addr modes for merge (PR #115523)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #115522)
via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
via llvm-commits
- [llvm] [M68k] add ARID addressing mode support for CAS ops (PR #114854)
via llvm-commits
- [llvm] [M68k] add ARID addressing mode support for CAS ops (PR #114854)
via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
via llvm-commits
- [llvm] e53c46a - [Statepoint] Treat result of atomicrmw xchg as a base pointer (#97280)
via llvm-commits
- [llvm] [VectorCombine] Combine extract/insert from vector (PR #115213)
via llvm-commits
- [llvm] AMDGPU/GlobalISel: Remove getVRegDef null checks in selector (PR #115530)
via llvm-commits
- [llvm] 86405ed - [DebugInfo][Reassociate] Preserve DebugLocs when reassociating subs (#114226)
via llvm-commits
- [clang] [llvm] [clang] NFC: Remove `{File, Directory}Entry::getName()` (PR #74910)
via llvm-commits
- [llvm] [llvm] Use computeConstantRange to improve llvm.objectsize computation (PR #115522)
via llvm-commits
- [llvm] [RISCV][DAG][TLI] Avoid scalarizing length decreasing shuffles (PR #115532)
via llvm-commits
- [llvm] [RISCV][DAG][TLI] Avoid scalarizing length decreasing shuffles (PR #115532)
via llvm-commits
- [llvm] [RISCV][DAG][TLI] Avoid scalarizing length decreasing shuffles (PR #115532)
via llvm-commits
- [llvm] [AArch64] Generate zeroing forms of certain SVE2.2 instructions (1/n) (PR #115535)
via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
via llvm-commits
- [llvm] [Instructions] cache computed shufflevector properties (PR #115536)
via llvm-commits
- [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)
via llvm-commits
- [llvm] [Instructions] cache computed shufflevector properties (PR #115536)
via llvm-commits
- [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)
via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (PR #115537)
via llvm-commits
- [llvm] [CodeGen][X86] LiveRangeShrink: fix increment after end (PR #115276)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [clang] [lldb] [llvm] Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (PR #115539)
via llvm-commits
- [clang] [lldb] [llvm] Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (PR #115539)
via llvm-commits
- [clang] [lldb] [llvm] Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (PR #115539)
via llvm-commits
- [clang] [lldb] [llvm] Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (PR #115539)
via llvm-commits
- [clang] [lldb] [llvm] Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (PR #115539)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [clang] [llvm] [HLSL] Adding HLSL `clip` function. (PR #114588)
via llvm-commits
- [llvm] bbcd352 - Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (#115539)
via llvm-commits
- [clang] [lldb] [llvm] Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (PR #115539)
via llvm-commits
- [llvm] 7dffc96 - [SandboxVec][BottomUpVec] Clean up dead instructions (#115267)
via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Clean up dead instructions (PR #115267)
via llvm-commits
- [llvm] AMDGPU: Use "countMaxActiveBits() <= 5" to define uint5Bits (PR #115543)
via llvm-commits
- [llvm] db6f476 - AMDGPU: Use "countMaxActiveBits() <= 5" to define uint5Bits (#115543)
via llvm-commits
- [llvm] [JITLink] Use `rsplit` on `-sectcreate` argument in llvm-jitlink (PR #115511)
via llvm-commits
- [llvm] 30ee3f4 - AMDGPU/GlobalISel: Add test showing s_andn2_b32/b64 is not formed from booleans (#115537)
via llvm-commits
- [llvm] 552f6fe - [RISCV] Custom promote s32 G_UDIV/UREM/SDIV on RV64. Promote SREM using G_SEXT. (#115402)
via llvm-commits
- [llvm] [CodeLayout] Do not flip branch condition when using optsize (PR #114607)
via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Implement pack of scalars (PR #115549)
via llvm-commits
- [llvm] [SandboxVec][BottomUpVec] Implement pack of scalars (PR #115549)
via llvm-commits
- [llvm] [SandboxIR] Remove incorrect assertion. (PR #115553)
via llvm-commits
- [llvm] 7a6a52a - [SandboxIR] Remove incorrect assertion. (#115553)
via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
via llvm-commits
- [llvm] [MemProf] Allow promotion if target is a declaration (PR #115555)
via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
via llvm-commits
- [llvm] [RISCV][GISel] Custom promote s32 G_SHL/ASHR/LSHR on RV64. (PR #115559)
via llvm-commits
- [llvm] [NFC] Move DroppedVariableStats to its own file. (PR #115563)
via llvm-commits
- [llvm] [VPlan] Preserve IR flags when widening casts (PR #115373)
via llvm-commits
- [llvm] [bazel][libc] Add exp10m1f (PR #115565)
via llvm-commits
- [llvm] [bazel][libc] Add exp10m1f (PR #115565)
via llvm-commits
- [llvm] bc1aa28 - [SampleFDO] Support enabling sample loader pass in O0 mode (#113985)
via llvm-commits
- [llvm] Add a pass to collect dropped var stats for MIR. (PR #115566)
via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
via llvm-commits
- [llvm] [GVN][NewGVN] Take call attributes into account in expressions (PR #114545)
via llvm-commits
- [llvm] Fix Arm64EC name mangling algorithm (PR #115567)
via llvm-commits
- [llvm] [Inliner] Prevent adding pointer attributes to non-pointer arguments (PR #115569)
via llvm-commits
- [llvm] [mlir] [Python] Develop python bindings for Presburger library (PR #113233)
via llvm-commits
- [llvm] 818d715 - [Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (#113637)
via llvm-commits
- [clang] [llvm] Revert "[X86][AMX] Support AMX-AVX512" (PR #115570)
via llvm-commits
- [llvm] ff22515 - Revert "[X86][AMX] Support AMX-AVX512" (#115570)
via llvm-commits
- [llvm] [RISCV] RVA23S64 should include H extension (PR #115572)
via llvm-commits
- [llvm] [RISCV] RVA23S64 should include H extension (PR #115572)
via llvm-commits
- [lld] b70eb86 - [lld][WebAssemlby] Implement --thinlto-object-suffix-replace/--thinlto-prefix-replace (#114625)
via llvm-commits
- [llvm] c618324 - [memprof] Teach extractCallsFromIR to look into inline stacks (#115441)
via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
via llvm-commits
- [llvm] 1bf385f - AMDGPU: Default to selecting frame indexes to SGPRs (#115060)
via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Allow G_SEXT_INREG patterns to be imported. (PR #115576)
via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
via llvm-commits
- [llvm] [GVN][NewGVN] Take call attributes into account in expressions (PR #114545)
via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
via llvm-commits
- [llvm] [InstCombine] Ensure Safe Handling of Flags in foldFNegIntoConstant (PR #94148)
via llvm-commits
- [llvm] 501a583 - [TableGen][SelectionDAG] Remove the `implicit` DAG node (#115295)
via llvm-commits
- [llvm] 5e02fd8 - [CodeGen][X86] LiveRangeShrink: fix increment after end (#115276)
via llvm-commits
- [llvm] [PowerPC] Add `SDNPMemOperand` to some nodes (PR #115580)
via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
via llvm-commits
- [clang] [llvm] Reland "[X86][AMX] Support AMX-AVX512" (PR #115581)
via llvm-commits
- [clang] [llvm] Reland "[X86][AMX] Support AMX-AVX512" (PR #115581)
via llvm-commits
- [llvm] [AMDGPU] Remove unused AMDGPUISD enum members (NFC) (PR #115582)
via llvm-commits
- [llvm] [AMDGPU] Remove unused AMDGPUISD enum members (NFC) (PR #115582)
via llvm-commits
- [llvm] 8f44013 - Reland "[X86][AMX] Support AMX-AVX512" (#115581)
via llvm-commits
- [llvm] [SROA] Fix NumPromoted statistic for SROA pass. (PR #115586)
via llvm-commits
- [llvm] 09b372a - [GISel][AArch64][RISCV] Allow G_SEXT_INREG patterns to be imported. (#115576)
via llvm-commits
- [llvm] b83399e - [GlobalISel] Remove unused includes (NFC) (#115429)
via llvm-commits
- [llvm] [Inliner] Prevent adding pointer attributes to non-pointer arguments (PR #115569)
via llvm-commits
- [llvm] [DebugInfo] Simplify code with std::map::operator[] (NFC) (PR #115591)
via llvm-commits
- [llvm] [Vectorize] Simplify code with MapVector::operator[] (NFC) (PR #115592)
via llvm-commits
- [llvm] [X86] Remove unused includes (NFC) (PR #115593)
via llvm-commits
- [llvm] fe63669 - [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (#115471)
via llvm-commits
- [llvm] [Instrumentation] Support `MachineFunction` in `OptNoneInstrumentation` (PR #115471)
via llvm-commits
- [compiler-rt] [libfuzzer] use timer_create() instead of setitimer() for linux (PR #110274)
via llvm-commits
- [llvm] [Instrumentation] Fix test failure in #115471 (PR #115596)
via llvm-commits
- [llvm] 9afec3c - [Instrumentation] Fix test failure in #115471 (#115596)
via llvm-commits
- [llvm] [Instrumentation] Fix test failure in #115471 (PR #115596)
via llvm-commits
- [llvm] [Instrumentation] Fix test failure in #115471 (PR #115596)
via llvm-commits
- [llvm] 5a41800 - [SROA] Fix NumPromoted statistic for SROA pass (#115586)
via llvm-commits
- [llvm] [RISCV][TTI] Add vp.fneg intrinsic cost with functionalOP (PR #114378)
via llvm-commits
- [llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
via llvm-commits
- [llvm] 10f35a0 - [InstCombine] add control for SimplifyDemandedVectorElts depth limit (#113717)
via llvm-commits
- [llvm] [GlobalISel] Add G_STEP_VECTOR instruction (PR #115598)
via llvm-commits
- [llvm] 5a08acc - [LegalizeTypes] Support softening FMINIMUM/FMAXIMUM (#115463)
via llvm-commits
- [llvm] ae4fc80 - [RISCV] When using global merging, don't enable merging of external globals by default (#115484)
via llvm-commits
- [llvm] [TableGen] Fix crashes on invalid instruction patterns (PR #115600)
via llvm-commits
- [lld] 5811067 - [LLD][COFF] Support ARM64EC in BitcodeFile::getMachineType (#115474)
via llvm-commits
- [llvm] [X86] Make use of `null_frag` (NFC) (PR #115601)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
via llvm-commits
- [llvm] 56253c7 - [GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (#115225)
via llvm-commits
- [llvm] [InstCombine] Preserve metadata from orig load in select fold. (PR #115605)
via llvm-commits
- [llvm] [LegalizeTypes] Support softening FMINIMUM/FMAXIMUM (PR #115463)
via llvm-commits
- [llvm] 6beaa12 - [X86] Make use of `null_frag` (NFC) (#115601)
via llvm-commits
- [llvm] 3654183 - [MemProf] Allow promotion if target is a declaration (#115555)
via llvm-commits
- [llvm] ccaded2 - [Inliner] Prevent adding pointer attributes to non-pointer arguments (#115569)
via llvm-commits
- [llvm] [ADT] Mark reverse and concat as nodiscard (PR #115611)
via llvm-commits
- [llvm] eedff8b - [DebugInfo] Simplify code with std::map::operator[] (NFC) (#115591)
via llvm-commits
- [llvm] dfe43bd - [X86] Remove unused includes (NFC) (#115593)
via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
via llvm-commits
- [llvm] [SandboxIR] Preserve the order of switch cases after revert. (PR #115577)
via llvm-commits
- [llvm] [SandboxIR] Preserve the order of switch cases after revert. (PR #115577)
via llvm-commits
- [llvm] f8fea5d - [llvm] Add explicit visibility macros to YAMLTraits classes (#111484)
via llvm-commits
- [llvm] [DirectX] introducing lowering for `bufferUpdateCounter` (PR #115041)
via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
via llvm-commits
- [llvm] [Bolt] Teach bolt about no-return functions (PR #115616)
via llvm-commits
- [llvm] [Bolt] Teach bolt about no-return functions (PR #115616)
via llvm-commits
- [llvm] [Bolt] Teach bolt about no-return functions (PR #115616)
via llvm-commits
- [llvm] [InstCombine] Missed optimization: Fold (sext(a) & c1) == c2 to (a & c3) == trunc(c2) (PR #112646)
via llvm-commits
- [llvm] [Bolt] Teach bolt about no-return functions (PR #115616)
via llvm-commits
- [llvm] [Bolt] Teach bolt about no-return functions (PR #115616)
via llvm-commits
- [llvm] 230946f - [ADT] Mark reverse and concat as nodiscard (#115611)
via llvm-commits
- [llvm] [VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (PR #114292)
via llvm-commits
- [llvm] c236dbc - [Vectorize] Simplify code with MapVector::operator[] (NFC) (#115592)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] [Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (PR #115623)
via llvm-commits
- [llvm] [Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (PR #115623)
via llvm-commits
- [llvm] [Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (PR #115623)
via llvm-commits
- [llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)
via llvm-commits
- [llvm] test/MSan: change target trilpe to 32-bit arch in respective tests (PR #115018)
via llvm-commits
- [llvm] 10b80ff - [Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (#115623)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
via llvm-commits
- [llvm] [InstCombine] Only fold extract element to trunc if vector `hasOneUse` (PR #115627)
via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115626)
via llvm-commits
- [llvm] [InstCombine] Only fold extract element to trunc if vector `hasOneUse` (PR #115627)
via llvm-commits
- [llvm] [InstCombine] Only fold extract element to trunc if vector `hasOneUse` (PR #115627)
via llvm-commits
- [llvm] [RISCV][GISel] Use boolean predicated legalization action methods to remove a custom lambda. (PR #115628)
via llvm-commits
- [llvm] [RISCV][GISel] Use boolean predicated legalization action methods to remove a custom lambda. (PR #115628)
via llvm-commits
- [llvm] [LangRef] Fix examples for float to int saturating intrinsics (PR #115629)
via llvm-commits
- [llvm] [LangRef] Fix examples for float to int saturating intrinsics (PR #115629)
via llvm-commits
- [llvm] [LangRef] Fix examples for float to int saturating intrinsics (PR #115629)
via llvm-commits
- [llvm] [NFC] Correct imprecise file location in the comment. (PR #115630)
via llvm-commits
- [llvm] [NFC] Correct imprecise file location in the comment. (PR #115630)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TF32 (PR #115625)
via llvm-commits
- [llvm] Fix mistake in #113532 (PR #115631)
via llvm-commits
- [llvm] 08af115 - Fix mistakes in #113532 (#115631)
via llvm-commits
- [compiler-rt] [llvm] [NFC] Correct imprecise file location in the comment. (PR #115630)
via llvm-commits
- [compiler-rt] [llvm] [NFC] Correct imprecise file location in the comment. (PR #115630)
via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
via llvm-commits
- [llvm] 3cdd86b - [SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is enabled. (#115417)
via llvm-commits
- [llvm] 639cafd - [RISCV][GISel] Use boolean predicated legalization action methods to remove a custom lambda. (#115628)
via llvm-commits
- [lld] f344367 - [PAC][lld] Test warning emitted for non-PAuth-marked files with `-z pac-plt` (#112958)
via llvm-commits
- [llvm] [Vectorize] Simplify code with DenseMap::operator[] (NFC) (PR #115635)
via llvm-commits
- [llvm] [AArch64/GISel] Remove unused includes (NFC) (PR #115636)
via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Don't call markAllIdxsAsCovered from minScalarSameAs/maxScalarSameAs. (PR #115637)
via llvm-commits
- [compiler-rt] [libcxx] [libcxxabi] [libunwind] [libunwind][libcxx][libcxxabi][compiler-rt-builtins] Fix Exception Handling build for wasm (PR #79667)
via llvm-commits
- [llvm] [GISel][AArch64][RISCV] Don't call markAllIdxsAsCovered from minScalarSameAs/maxScalarSameAs. (PR #115637)
via llvm-commits
- [llvm] e149528 - [RISCV] Use the 'B' extension in RISC-V profile definitions (#113942)
via llvm-commits
- [compiler-rt] 59770a4 - [NFC] Correct imprecise file location in the comment. (#115630)
via llvm-commits
- [compiler-rt] [llvm] [NFC] Correct imprecise file location in the comment. (PR #115630)
via llvm-commits
- [llvm] 4edd711 - [NVPTX] Add TMA bulk tensor prefetch intrinsics (#115527)
via llvm-commits
- [llvm] d822c09 - [JITLink] Use `rsplit` on `-sectcreate` argument in llvm-jitlink (#115511)
via llvm-commits
- [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
via llvm-commits
- [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
via llvm-commits
- [llvm] 27bf45a - [InstCombine] Fix poison safety of folding shufflevector into select (#115483)
via llvm-commits
- [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
via llvm-commits
- [llvm] [llvm-exegesis] Add explicit support for setting DF in X86 (PR #115644)
via llvm-commits
- [llvm] [LangRef] Fix examples for float to int saturating intrinsics (PR #115629)
via llvm-commits
- [llvm] [llvm-exegesis][X86] Groups ports 2, 3, and 11 for Golden Cove (PR #115645)
via llvm-commits
- [llvm] [X86] Delete unused X86setcc_commute node (PR #115650)
via llvm-commits
- [clang] [llvm] [Clang-Repl] Add support for out-of-process execution. (PR #110418)
via llvm-commits
- [lld] ac30a0f - [PAC][lld] Do not emit warnings for `-z pac-plt` with valid PAuth core info (#112959)
via llvm-commits
- [llvm] 7c13477 - [X86] Delete unused X86setcc_commute node (NFC) (#115650)
via llvm-commits
- [clang] [llvm] [RISCV] Support `svukte` extension (PR #115657)
via llvm-commits
- [clang] [llvm] [RISCV] Support `svukte` extension (PR #115657)
via llvm-commits
- [clang] [llvm] [RISCV] Support `svukte` extension (PR #115657)
via llvm-commits
- [clang] [llvm] [RISCV] Support `svukte` extension (PR #115657)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TRANSPOSE, part 2 (PR #115660)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TRANSPOSE, part 2 (PR #115660)
via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TRANSPOSE, part 2 (PR #115660)
via llvm-commits
- [llvm] 5b19ed8 - [llvm] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (#115626)
via llvm-commits
- [llvm] 2c0f463 - [Vectorize] Simplify code with DenseMap::operator[] (NFC) (#115635)
via llvm-commits
- [llvm] 1e25c92 - [AArch64/GISel] Remove unused includes (NFC) (#115636)
via llvm-commits
- [llvm] ff0698b - [LangRef] Fix examples for float to int saturating intrinsics (#115629)
via llvm-commits
- [llvm] [LangRef] Fix examples for float to int saturating intrinsics (PR #115629)
via llvm-commits
- [llvm] [CGData] Global Merge Functions (PR #112671)
via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [llvm] [llvm-objdump] Add preliminary support for decoding binary files (PR #115667)
via llvm-commits
- [llvm] [llvm-objdump] Add preliminary support for decoding binary files (PR #115667)
via llvm-commits
- [clang] [lldb] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
via llvm-commits
- [llvm] [WPD]Regard unreachable function as a possible devirtualizable target (PR #115668)
via llvm-commits
- [compiler-rt] [libcxx] [libcxxabi] [libunwind] [libunwind][libcxx][libcxxabi][compiler-rt-builtins] Fix Exception Handling build for wasm (PR #79667)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Do not create LIFETIME instructions in functions. (PR #115669)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Do not create LIFETIME instructions in functions. (PR #115669)
via llvm-commits
- [llvm] 3006ddd - [M68k] fix call frame destruction elimination when returning structs (#107579)
via llvm-commits
- [llvm] [M68k] fix call frame destruction elimination (PR #107579)
via llvm-commits
- [compiler-rt] [compiler-rt] Add custom libc++ workaround for CMake < 3.26 (PR #115677)
via llvm-commits
- [llvm] [InstCombine] Only fold extract element to trunc if vector `hasOneUse` (PR #115627)
via llvm-commits
- [llvm] [InstCombine] Only fold extract element to trunc if vector `hasOneUse` (PR #115627)
via llvm-commits
- [llvm] [InstCombine] Only fold extract element to trunc if vector `hasOneUse` (PR #115627)
via llvm-commits
- [llvm] Zext sext undef in sdag (PR #115451)
via llvm-commits
- [llvm] [Mips] Support llvm.readcyclecounter intrinsic (PR #114953)
via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115681)
via llvm-commits
- [llvm] [llvm] Migrate away from PointerUnion::{is, get, dyn_cast} (NFC) (PR #115681)
via llvm-commits
- [llvm] [AArch64] Remove unused includes (NFC) (PR #115685)
via llvm-commits
- [compiler-rt] 5082acc - [compiler-rt] Add custom libc++ workaround for CMake < 3.26
via llvm-commits
- [llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #113214)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] [llvm] Remove `br i1 undef` from regression tests (PR #115688)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] 5ca082c - [LangRef] Fix evl type on float VP reduction intrinsics (#115421)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] b2e2d8b - [RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (#115272)
via llvm-commits
- [llvm] a912c81 - [llvm-debuginfo-analyzer] Fix crash with thread local storage. (#113904)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [llvm] [M68k] Handle 16 bit MOVs to and from CCR (PR #114714)
via llvm-commits
- [clang] [flang] [llvm] seq_cst is allowed in Flush since OpenMP 5.1. (PR #114072)
via llvm-commits
- [llvm] [M68k] Add remaining addressing modes for Atomic operations (PR #115523)
via llvm-commits
- [llvm] 2eaf507 - [LoongArch] Precommit test for avoid indirect branch jumps through ra. NFC
via llvm-commits
- [llvm] [LoongArch] Precommit test for avoid indirect branch jumps through ra. NFC (PR #115423)
via llvm-commits
- [llvm] 21ef17c - [LoongArch] Avoid indirect branch jumps using the ra register
via llvm-commits
- [llvm] [LoongArch] Avoid indirect branch jumps using the ra register (PR #115424)
via llvm-commits
- [llvm] [LoongArch] Avoid indirect branch jumps using the ra register (PR #115424)
via llvm-commits
- [llvm] [InstCombine] Re-queue users of phi when nsw/nuw flags of add are inferred (PR #113933)
via llvm-commits
- [llvm] [TableGen] Don't instantiate CodeGenDAGPatterns where unnecessary (PR #115689)
via llvm-commits
- [lld] [LLD][MachO] Enable plugin support for LTO (PR #115690)
via llvm-commits
- [lld] [LLD][MachO] Enable plugin support for LTO (PR #115690)
via llvm-commits
- [llvm] [llvm] Remove `br i1 undef` from regression tests (PR #115691)
via llvm-commits
- [llvm] [llvm] Remove `br i1 undef` from regression tests (PR #115691)
via llvm-commits
- [llvm] eddb79d - [X86][AMX] Support AMX-TF32 (#115625)
via llvm-commits
- [llvm] [Pass] Add `RequiredPassMixin` for non skippable passes (PR #115692)
via llvm-commits
- [llvm] [Pass] Add `RequiredPassMixin` for non skippable passes (PR #115692)
via llvm-commits
- [llvm] b7db403 - [CVP] Add `samesign` flag to `icmp` (#115642)
via llvm-commits
- [clang] [llvm] [CVP] #114820 add 'samesign' for 'icmp' (PR #115642)
via llvm-commits
- [llvm] 01a5596 - [llvm-exegesis][X86] Groups ports 2,3, and 11 for Golden Cove (#115645)
via llvm-commits
- [llvm] Zext sext undef in sdag (PR #115451)
via llvm-commits
- [llvm] e952728 - [LLDB] Retry Add a target.launch-working-dir setting
walter erquinigo via llvm-commits
- [llvm] [Backend] Add clearSubtargetMap API for TargetMachine. (PR #112383)
weiwei chen via llvm-commits
- [llvm] [Backend] Add clearSubtargetMap API for TargetMachine. (PR #112383)
weiwei chen via llvm-commits
- [llvm] [Backend] Add clearSubtargetMap API for TargetMachine. (PR #112383)
weiwei chen via llvm-commits
- [llvm] [Backend] Add clearSubtargetMap API for TargetMachine. (PR #112383)
weiwei chen via llvm-commits
- [llvm] [Backend] Add clearSubtargetMap API for TargetMachine. (PR #112383)
weiwei chen via llvm-commits
- [llvm] [Baze] Add missing lldbDataFormatter.py back to BUILD.bazel. (PR #115519)
weiwei chen via llvm-commits
- [llvm] [Baze] Add missing lldbDataFormatter.py back to BUILD.bazel. (PR #115519)
weiwei chen via llvm-commits
- [llvm] [Baze] Add missing lldbDataFormatter.py back to BUILD.bazel. (PR #115519)
weiwei chen via llvm-commits
- [llvm] [Bazel] Add a comment why an export file is needed. (PR #115556)
weiwei chen via llvm-commits
- [llvm] [Baze] Add missing lldbDataFormatter.py back to BUILD.bazel. (PR #115519)
weiwei chen via llvm-commits
- [llvm] [Bazel] Add a comment why an export file is needed. (PR #115556)
weiwei chen via llvm-commits
- [llvm] [PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (PR #113943)
zhijian lin via llvm-commits
- [llvm] Fixed test case error which caused the default cpu is changed from generic to ppc64 for triple powerpc64 (PR #114828)
zhijian lin via llvm-commits
- [llvm] Fixed test case error which caused the default cpu is changed from generic to ppc64 for triple powerpc64 (PR #114828)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Utilize getReservedRegs to find asm clobberable registers. (PR #107863)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Utilize getReservedRegs to find asm clobberable registers. (PR #107863)
zhijian lin via llvm-commits
- [llvm] [llvm-objdump] Implement decoding auxiliary header for xcoff with llvm-objdump --private-headers (PR #105682)
zhijian lin via llvm-commits
- [llvm] [llvm-objdump] Implement decoding auxiliary header for xcoff with llvm-objdump --private-headers (PR #105682)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
zhijian lin via llvm-commits
- [llvm] [llvm-objdump] Implement decoding auxiliary header for xcoff with llvm-objdump --private-headers (PR #105682)
zhijian lin via llvm-commits
Last message date:
Sun Nov 10 23:59:44 PST 2024
Archived on: Sun Nov 10 23:59:51 PST 2024
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