[llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 8 08:51:25 PST 2024
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@@ -1808,6 +1808,8 @@ void SIRegisterInfo::buildSpillLoadStore(
.addReg(SubReg, getKillRegState(IsKill));
if (NeedSuperRegDef)
AccRead.addReg(ValueReg, RegState::ImplicitDefine);
+ if (NeedSuperRegImpOperand && (IsFirstSubReg || IsLastSubReg))
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arsenm wrote:
copyPhysReg and the spill expansions should have similar behavior. I don't know why the spill case is more complex here
https://github.com/llvm/llvm-project/pull/115285
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