[llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Thorsten Schütt via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 4 12:01:06 PST 2024
tschuett wrote:
I looked ad the GlobalISel assert again:
```
llc 0x000000010dcbe76e llvm::MachineIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::__1::optional<unsigned int>) + 7086
8 llc 0x000000010dbae9fc llvm::CSEMIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::__1::optional<unsigned int>) + 3324
9 llc 0x000000010dcb5e6a llvm::MachineIRBuilder::buildMergeLikeInstr(llvm::DstOp const&, llvm::ArrayRef<llvm::Register>) + 282
10 llc 0x000000010dbb9bef mergeVectorRegsToResultRegs(llvm::MachineIRBuilder&, llvm::ArrayRef<llvm::Register>, llvm::ArrayRef<llvm::Register>) + 383
11 llc 0x000000010dbb5dea llvm::CallLowering::handleAssignments(llvm::CallLowering::ValueHandler&, llvm::SmallVectorImpl<llvm::CallLowering::ArgInfo>&, llvm::CCState&, llvm::SmallVectorImpl<llvm::CCValAssign>&, llvm::MachineIRBuilder&, llvm::ArrayRef<llvm::Register>) const + 9722
12 llc 0x000000010b1a071f llvm::AArch64CallLowering::lowerFormalArguments(llvm::MachineIRBuilder&, llvm::Function const&, llvm::ArrayRef<llvm::ArrayRef<llvm::Register>>, llvm::FunctionLoweringInfo&) const + 1823
13 llc 0x000000010dc33012 llvm::IRTranslator::runOnMachineFunction(llvm::MachineFunction&) + 4242
14 llc 0x000000010c5a538e llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 782
```
It comes out of lowerFormalArguments and mergeVectorRegsToResultRegs.
https://github.com/llvm/llvm-project/pull/114784
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