[llvm] [BOLT] support mold linker generated PLT in disassembling (PR #115256)

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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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``````````bash
git-clang-format --diff f02b1cc99e12ac0147d5c334f130a305d85e477a 8c51da24960b673d242247a3af8e486bac8a2b78 --extensions cpp,h -- bolt/include/bolt/Core/MCPlusBuilder.h bolt/lib/Rewrite/RewriteInstance.cpp bolt/lib/Target/X86/X86MCPlusBuilder.cpp
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<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/bolt/lib/Rewrite/RewriteInstance.cpp b/bolt/lib/Rewrite/RewriteInstance.cpp
index 5d4118e51d..d139221fc7 100644
--- a/bolt/lib/Rewrite/RewriteInstance.cpp
+++ b/bolt/lib/Rewrite/RewriteInstance.cpp
@@ -1725,16 +1725,18 @@ void RewriteInstance::disassemblePLTSectionX86(BinarySection &Section,
     }
 
     if (InstrOffset + InstrSize > EntryOffset + EntrySize) {
-      // Check if it is a mold header before rolling back because the mold linker generates
-      // a unique format. The header entry of the mold-style PLT is 32 bytes long, while the
-      // remaining entries are 16 bytes long. We need to skip the header entry.
+      // Check if it is a mold header before rolling back because the mold
+      // linker generates a unique format. The header entry of the mold-style
+      // PLT is 32 bytes long, while the remaining entries are 16 bytes long. We
+      // need to skip the header entry.
       uint64_t HeaderOffset = 0, MoldHeaderSize = 32;
       if (EntryOffset == HeaderOffset && SectionSize >= MoldHeaderSize) {
         std::vector<MCInst *> Insns;
         MCInst Instructions[32]; // 32 insns at most
         uint32_t Index = 0;
         while (HeaderOffset < MoldHeaderSize) {
-          disassemblePLTInstruction(Section, HeaderOffset, Instructions[Index], InstrSize);
+          disassemblePLTInstruction(Section, HeaderOffset, Instructions[Index],
+                                    InstrSize);
           Insns.push_back(&Instructions[Index]);
           HeaderOffset += InstrSize;
           Index++;
@@ -1744,7 +1746,6 @@ void RewriteInstance::disassemblePLTSectionX86(BinarySection &Section,
           BC->outs() << "BOLT-INFO: parsing the PLT of the mold linker\n";
           EntryOffset += EntrySize;
         }
-          
       }
       continue;
     }
diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
index 215380085d..df3b2e16f3 100644
--- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
+++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
@@ -2139,11 +2139,11 @@ public:
   bool isMoldPLTHeader(std::vector<MCInst *> &Insns) const override {
     if (Insns.size() != 18)
       return false;
-      
-    if (!isTerminateBranch(*Insns[0]) || !isPush(*Insns[1])
-        || !isPush(*Insns[2]) || !isIndirectBranch(*Insns[3]))
+
+    if (!isTerminateBranch(*Insns[0]) || !isPush(*Insns[1]) ||
+        !isPush(*Insns[2]) || !isIndirectBranch(*Insns[3]))
       return false;
-      
+
     for (unsigned int i = 4; i < 18; ++i)
       if (Insns[i]->getOpcode() != X86::INT3)
         return false;

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https://github.com/llvm/llvm-project/pull/115256