[llvm] [RISCV] Override default sched policy (PR #115445)

[Min-Yih Hsu via llvm-commits]

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@@ -199,3 +200,25 @@ unsigned RISCVSubtarget::getMinimumJumpTableEntries() const {
              ? RISCVMinimumJumpTableEntries
              : TuneInfo->MinimumJumpTableEntries;
 }
+
+void RISCVSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
+                                         unsigned NumRegionInstrs) const {
+  // Do bidirectional scheduling since it provides a more balanced scheduling
+  // leading to better performance. This will increase compile time.
+  Policy.OnlyTopDown = false;
+  Policy.OnlyBottomUp = false;
+
+  // Enabling or Disabling the latency heuristic is a close call: It seems to
+  // help nearly no benchmark on out-of-order architectures, on the other hand
+  // it regresses register pressure on a few benchmarking.
+  // FIXME: This is from AArch64, but we haven't evaluated it on RISC-V.
+  Policy.DisableLatencyHeuristic = true;
----------------
mshockwave wrote:

GenericScheduler picks the next SU by inspecting heuristics in the following order (not an exhaustive list):
1. register pressure
2. acyclic critical path in a loop
3. load/store cluster
4. resource pressure (probably the most important for out-of-order core)
5. latency (critical path)
6. program order

DisableLatencyHeuristic basically turns off (5), which means that at that point we're relying on program order. I don't think using program order will be more favorable than reducing critical path, especially for in-order cores.

https://github.com/llvm/llvm-project/pull/115445