[llvm] [NVPTX] Add patterns for fma.relu.{f16|bf16} (PR #114977)
Justin Fargnoli via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 5 08:12:37 PST 2024
================
@@ -3917,3 +3917,22 @@ def atomic_thread_fence_seq_cst_cta :
def atomic_thread_fence_acq_rel_cta :
NVPTXInst<(outs), (ins), "fence.acq_rel.cta;", []>,
Requires<[hasPTX<60>, hasSM<70>]>;
+
+def fpimm0 : FPImmLeaf<fAny, [{
+ return Imm.isExactlyValue(+0.0);
+}]>;
+
+def FMARELU_F16 :
+ NVPTXInst<(outs Int16Regs:$dst), (ins Int16Regs:$a, Int16Regs:$b, Int16Regs:$c),
+ "fma.rn.relu.f16 \t$dst, $a, $b, $c;", []>;
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justinfargnoli wrote:
Do we need the `Requires<...>` on the instruction too?
https://github.com/llvm/llvm-project/pull/114977
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