[llvm] [AMDGPU] Machine-CP is deleting incorrect copy instr. (PR #114773)

Pravin Jagtap via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 5 04:37:25 PST 2024


https://github.com/pravinjagtap updated https://github.com/llvm/llvm-project/pull/114773

>From 8f451842cbd687fa746922848fd792d96970455e Mon Sep 17 00:00:00 2001
From: Pravin Jagtap <Pravin.Jagtap at amd.com>
Date: Mon, 4 Nov 2024 16:28:36 +0530
Subject: [PATCH 1/2] [AMDGPU] Machine-CP is deleting incorrect copy instr.

During AGPR tuple SPILLing, AMDGPU backend marks
the tuple as implicit-def in the first spill
instruction. It clobbers the register and the
machine-cp thinks its def i.e. copy is deletable
which I think is incorrect. Seeking help
to understand whether following copy is
deletable here ? (given the fact that compiler
decided to mark it implicit-def for preserving the
liveness)

renamable $agpr1 = COPY renamable $agpr3, implicit $exec
---
 .../AMDGPU/incorrect-copy-deletion.mir        | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 llvm/test/CodeGen/AMDGPU/incorrect-copy-deletion.mir

diff --git a/llvm/test/CodeGen/AMDGPU/incorrect-copy-deletion.mir b/llvm/test/CodeGen/AMDGPU/incorrect-copy-deletion.mir
new file mode 100644
index 00000000000000..a4ec8ca825aee4
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/incorrect-copy-deletion.mir
@@ -0,0 +1,24 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn -mcpu=gfx908 %s -o - -run-pass machine-cp -verify-machineinstrs | FileCheck -check-prefix=GFX908 %s
+
+---
+name:  foo
+tracksRegLiveness: true
+body: |
+  bb.0:
+    successors:
+    liveins: $vgpr0, $agpr3
+
+    ; GFX908-LABEL: name: foo
+    ; GFX908: liveins: $vgpr0, $agpr3
+    ; GFX908-NEXT: {{  $}}
+    ; GFX908-NEXT: renamable $agpr0 = COPY renamable $vgpr0, implicit $exec
+    ; GFX908-NEXT: $vgpr254 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $agpr0_agpr1
+    ; GFX908-NEXT: $vgpr255 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
+    ; GFX908-NEXT: S_ENDPGM 0
+    renamable $agpr0 = COPY renamable $vgpr0, implicit $exec
+    renamable $agpr1 = COPY renamable $agpr3, implicit $exec
+    $vgpr254 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $agpr0_agpr1
+    $vgpr255 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
+    S_ENDPGM 0
+...

>From 59e7bae439fa7327f0082ad6c2703926063a91d5 Mon Sep 17 00:00:00 2001
From: Pravin Jagtap <Pravin.Jagtap at amd.com>
Date: Tue, 5 Nov 2024 18:02:48 +0530
Subject: [PATCH 2/2] Added a test to represent prologepilog marks the src
 tuple as implicit-def while expanding of SI_SPILL_AV96_SAVE.

---
 .../AMDGPU/av-spill-implicit-def-tuple.mir    | 31 +++++++++++++++++++
 .../AMDGPU/incorrect-copy-deletion.mir        | 24 --------------
 2 files changed, 31 insertions(+), 24 deletions(-)
 create mode 100644 llvm/test/CodeGen/AMDGPU/av-spill-implicit-def-tuple.mir
 delete mode 100644 llvm/test/CodeGen/AMDGPU/incorrect-copy-deletion.mir

diff --git a/llvm/test/CodeGen/AMDGPU/av-spill-implicit-def-tuple.mir b/llvm/test/CodeGen/AMDGPU/av-spill-implicit-def-tuple.mir
new file mode 100644
index 00000000000000..ec5d3a75c8d356
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/av-spill-implicit-def-tuple.mir
@@ -0,0 +1,31 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn -mcpu=gfx908 %s -o - -run-pass prologepilog -verify-machineinstrs | FileCheck -check-prefix=GFX908 %s
+
+---
+name:  test_implicit_def
+tracksRegLiveness: true
+stack:
+  - { id: 0, name: '', type: spill-slot, offset: 0, size: 12, alignment: 4 }
+machineFunctionInfo:
+  scratchRSrcReg:  $sgpr0_sgpr1_sgpr2_sgpr3
+  stackPtrOffsetReg: '$sgpr32'
+  hasSpilledVGPRs: true
+body: |
+  bb.0:
+    successors:
+    liveins: $vgpr0, $vgpr1
+
+    ; GFX908-LABEL: name: test_implicit_def
+    ; GFX908: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
+    ; GFX908-NEXT: {{  $}}
+    ; GFX908-NEXT: renamable $agpr0 = COPY renamable $vgpr0, implicit $exec
+    ; GFX908-NEXT: renamable $agpr2 = COPY renamable $vgpr1, implicit $exec
+    ; GFX908-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
+    ; GFX908-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
+    ; GFX908-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2
+    ; GFX908-NEXT: S_ENDPGM 0
+    renamable $agpr0 = COPY renamable $vgpr0, implicit $exec
+    renamable $agpr2 = COPY renamable $vgpr1, implicit $exec
+    SI_SPILL_AV96_SAVE $agpr0_agpr1_agpr2, %stack.0, $sgpr32, 0, implicit $exec :: (store (s96) into %stack.0, align 4, addrspace 5)
+    S_ENDPGM 0
+...
diff --git a/llvm/test/CodeGen/AMDGPU/incorrect-copy-deletion.mir b/llvm/test/CodeGen/AMDGPU/incorrect-copy-deletion.mir
deleted file mode 100644
index a4ec8ca825aee4..00000000000000
--- a/llvm/test/CodeGen/AMDGPU/incorrect-copy-deletion.mir
+++ /dev/null
@@ -1,24 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn -mcpu=gfx908 %s -o - -run-pass machine-cp -verify-machineinstrs | FileCheck -check-prefix=GFX908 %s
-
----
-name:  foo
-tracksRegLiveness: true
-body: |
-  bb.0:
-    successors:
-    liveins: $vgpr0, $agpr3
-
-    ; GFX908-LABEL: name: foo
-    ; GFX908: liveins: $vgpr0, $agpr3
-    ; GFX908-NEXT: {{  $}}
-    ; GFX908-NEXT: renamable $agpr0 = COPY renamable $vgpr0, implicit $exec
-    ; GFX908-NEXT: $vgpr254 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $agpr0_agpr1
-    ; GFX908-NEXT: $vgpr255 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
-    ; GFX908-NEXT: S_ENDPGM 0
-    renamable $agpr0 = COPY renamable $vgpr0, implicit $exec
-    renamable $agpr1 = COPY renamable $agpr3, implicit $exec
-    $vgpr254 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $agpr0_agpr1
-    $vgpr255 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
-    S_ENDPGM 0
-...



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