[llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 7 10:18:14 PST 2024


Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>
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In-Reply-To: <llvm.org/llvm/llvm-project/pull/114784 at github.com>


topperc wrote:

> @topperc how is RISC-V handling this with GlobalISel? I bet you also have vectorized predicated instructions.

We probably hit the same assertion. The RISC-V vector support in GlobalISel has largely been done by a student.

https://github.com/llvm/llvm-project/pull/114784


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