[llvm] [AMDGPU][MC] Restrict op_sel in VOP3P dot instructions (PR #100485)

[Jun Wang via llvm-commits]

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@@ -389,345 +389,23 @@ v_dot8_i32_i4 v0, v1, v2, v3
 v_dot8_u32_u4 v0, v1, v2, v3
 
 //
-// Test op_sel/op_sel_hi.
+// Test op_sel/op_sel_hi: in VOP3P dot, op_sel must be 0, op_sel_hi cannot appear
 //
 
 // CHECK: encoding: [0x00,0x40,0xa3,0xd3,0x01,0x05,0x0e,0x1c]
 v_dot2_f32_f16 v0, v1, v2, v3 op_sel:[0,0]
-// CHECK: encoding: [0x00,0x50,0xa3,0xd3,0x01,0x05,0x0e,0x1c]
-v_dot2_f32_f16 v0, v1, v2, v3 op_sel:[0,1]
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jwanggit86 wrote:

Thanks! However, `v_dot4_` and `v_dot8_` still don't support opsel pre-gfx940, right? What's the best way to differentiate between `v_dot2_` and, say `v_dot4_`?

https://github.com/llvm/llvm-project/pull/100485