[llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)

[Thorsten Schütt via llvm-commits]

================
@@ -0,0 +1,36 @@
+//===-- AArch64GlobalISelPatterns.td - GlobalISel patterns -*- tablegen -*-===//
----------------
tschuett wrote:

Patterns like ,e.g, extract_subvector work great for use. We have issues with predicated instructions. I want to add patterns that unpredicate instructions.

https://github.com/llvm/llvm-project/pull/114784