[llvm] [AArch64] Define high bits of FPR and GPR registers (take 2) (PR #114827)

[Sander de Smalen via llvm-commits]

sdesmalen-arm wrote:

@Rin18 would you be happy to have a look at the `V1-clear-upper-regs.s` test to see if there's any issues with the generated output? I'm not sure if there is a hidden bug in there (it seems to iterate through all subregs, including artificial ones, which may affect the output)

https://github.com/llvm/llvm-project/pull/114827