[llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)

[Justin Fargnoli via llvm-commits]

================
@@ -3340,6 +3340,23 @@ bool NVPTXTargetLowering::splitValueIntoRegisterParts(
   return false;
 }
 
+bool llvm::NVPTXTargetLowering::isTruncateFree(EVT FromVT, EVT ToVT) const {
+  if (FromVT.isVector() || ToVT.isVector() || !FromVT.isInteger() ||
+      !ToVT.isInteger()) {
+    return false;
+  }
+
+  return FromVT.getSizeInBits() == 64 && ToVT.getSizeInBits() == 32;
+}
+
+bool llvm::NVPTXTargetLowering::isZExtFree(EVT FromVT, EVT ToVT) const {
+  return false;
+}
+
+bool llvm::NVPTXTargetLowering::isZExtFree(Type *SrcTy, Type *DstTy) const {
+  return false;
+}
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justinfargnoli wrote:

I'm following up offline on what our approach for these should be. I'll update this thread later. 

https://github.com/llvm/llvm-project/pull/114683