[llvm] [DAG] SimplifyDemandedBits - ignore SRL node if we're just demanding known sign bits (PR #114805)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 4 09:27:52 PST 2024

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https://github.com/RKSimon closed https://github.com/llvm/llvm-project/pull/114805

Previous message: [llvm] [DAG] SimplifyDemandedBits - ignore SRL node if we're just demanding known sign bits (PR #114805)
Next message: [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `dot4add_i8packed` intrinsic (PR #113623)
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