[llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 5 10:13:03 PST 2024
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/114784 at github.com>
davemgreen wrote:
In SDAG any sve nodes which require predication will be lowered to target-specific predicated ops, in this case:
```
case ISD::FNEG:
return LowerToPredicatedOp(Op, DAG, AArch64ISD::FNEG_MERGE_PASSTHRU);
```
(This has the obvious disadvantage that we lose any target independent optimizations that could happen after we convert them, but that maybe isn't as important for SVE).
Those nodes then have tablegen patterns through
```
def AArch64fneg_mt : SDNode<"AArch64ISD::FNEG_MERGE_PASSTHRU", SDT_AArch64Arith>;
```
The most straight-forward route for GISel would be to mirror that, and mark AArch64fneg_mt as GINodeEquiv with the new G_ nodes that get created.
https://github.com/llvm/llvm-project/pull/114784
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