[llvm] [RISCV] Enable scalable loop vectorization for zvfhmin/zvfbfmin (PR #115272)

[Luke Lau via llvm-commits]

lukel97 wrote:

> > What is the result if we change data type in TSVC2 to bf16? Can we handle all cases correctly?
> 
> Good idea, this actually caught a crash because it turns out we also can't lower fmax/fmin reductions, so I've also disabled these for now. I think we can promote these in a later PR.
> 
> Otherwise, TSVC2 seems to compile fine and emits a healthy amount of vfwcvtbf16.f.f.v and vfwmaccbf16.vvs. I can try running it on QEMU tomorrow.

The run finished, the checksums are the same between the vectorized and non-vectorized binaries so I presume the lowering is correct

https://github.com/llvm/llvm-project/pull/115272