[llvm] [AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (PR #113634)

[Brox Chen via llvm-commits]

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@@ -363,6 +363,21 @@ static DecodeStatus decodeOperand_VSrcT16(MCInst &Inst, unsigned Imm,
                               (AMDGPU::OperandSemantics)OperandSemantics));
 }
 
+static DecodeStatus decodeOperand_VGPR_16(MCInst &Inst, unsigned Imm,
+                                          uint64_t /*Addr*/,
+                                          const MCDisassembler *Decoder) {
+  assert(isUInt<10>(Imm) && "10-bit encoding expected");
+
+  const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder);
+  if (Imm & AMDGPU::EncValues::IS_VGPR) {
+    bool IsHi = Imm & (1 << 9);
+    unsigned RegIdx = Imm & 0xff;
+    return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
+  }
+  return addOperand(Inst, DAsm->decodeNonVGPRSrcOp(AMDGPUDisassembler::OPW16,
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broxigarchen wrote:

Hey Joe I checked that this code is never reached for its current usage. However, many of the other decodeXX functions has this addtional line. I think if we remove this we'll replace this with a assert. What do you think?

https://github.com/llvm/llvm-project/pull/113634