[llvm] [Backend] Add clearSubtargetMap API for TargetMachine. (PR #112383)
weiwei chen via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 6 07:14:42 PST 2024
https://github.com/weiweichen updated https://github.com/llvm/llvm-project/pull/112383
>From 9ab9cb027e0dc27ae2ca0aa11ac059a8240aeffc Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.chen at modular.com>
Date: Tue, 15 Oct 2024 11:41:29 -0400
Subject: [PATCH 1/4] Add clearSubtargetMap API for TargetMachine.
---
llvm/include/llvm/Target/TargetMachine.h | 3 +++
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 2 ++
llvm/lib/Target/AArch64/AArch64TargetMachine.h | 3 +++
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 ++
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 3 +++
llvm/lib/Target/AMDGPU/R600TargetMachine.cpp | 2 ++
llvm/lib/Target/AMDGPU/R600TargetMachine.h | 3 +++
llvm/lib/Target/ARM/ARMTargetMachine.cpp | 2 ++
llvm/lib/Target/ARM/ARMTargetMachine.h | 3 +++
llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 ++
llvm/lib/Target/CSKY/CSKYTargetMachine.h | 3 +++
llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 2 ++
llvm/lib/Target/Hexagon/HexagonTargetMachine.h | 3 +++
llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp | 2 ++
llvm/lib/Target/LoongArch/LoongArchTargetMachine.h | 3 +++
llvm/lib/Target/M68k/M68kTargetMachine.cpp | 2 ++
llvm/lib/Target/M68k/M68kTargetMachine.h | 3 +++
llvm/lib/Target/Mips/MipsTargetMachine.cpp | 2 ++
llvm/lib/Target/Mips/MipsTargetMachine.h | 3 +++
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 2 ++
llvm/lib/Target/PowerPC/PPCTargetMachine.h | 3 +++
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 2 ++
llvm/lib/Target/RISCV/RISCVTargetMachine.h | 3 +++
llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 2 ++
llvm/lib/Target/Sparc/SparcTargetMachine.h | 3 +++
llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp | 2 ++
llvm/lib/Target/SystemZ/SystemZTargetMachine.h | 3 +++
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | 2 ++
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h | 3 +++
llvm/lib/Target/X86/X86TargetMachine.cpp | 2 ++
llvm/lib/Target/X86/X86TargetMachine.h | 3 +++
llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp | 2 ++
llvm/lib/Target/Xtensa/XtensaTargetMachine.h | 3 +++
33 files changed, 83 insertions(+)
diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index c3e9d41315f617..d16fe6aa4bde55 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -448,6 +448,9 @@ class LLVMTargetMachine : public TargetMachine {
void initAsmInfo();
+ /// clear target specific SubtargetMap.
+ virtual void clearSubtargetMap(){};
+
public:
/// Get a TargetTransformInfo implementation for the target.
///
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 7b0ae23358673e..d8c23de22386d4 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -272,6 +272,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() {
initializeAArch64GlobalsTaggingPass(*PR);
}
+void AArch64TargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
//===----------------------------------------------------------------------===//
// AArch64 Lowering public interface.
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.h b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
index 1a470ca87127ce..135a21dbde5221 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.h
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
@@ -26,6 +26,9 @@ class AArch64TargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 23ee0c3e896eb3..f90118f4caae38 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -938,6 +938,8 @@ bool AMDGPUTargetMachine::splitModule(
// GCN Target Machine (SI+)
//===----------------------------------------------------------------------===//
+void GCNTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); };
+
GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
index af8476bc21ec61..d2d3a64a08185f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
@@ -81,6 +81,9 @@ class GCNTargetMachine final : public AMDGPUTargetMachine {
private:
mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
index a1a60b8bdfa9ee..e65e90c688ee05 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
@@ -50,6 +50,8 @@ static MachineSchedRegistry R600SchedRegistry("r600",
// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//
+void R600TargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.h b/llvm/lib/Target/AMDGPU/R600TargetMachine.h
index b7f123a07a9c1d..c09d784a0a03c1 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.h
@@ -29,6 +29,9 @@ class R600TargetMachine final : public AMDGPUTargetMachine {
private:
mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 7553778c574033..fac3892d1289e9 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -640,3 +640,5 @@ bool ARMBaseTargetMachine::parseMachineFunctionInfo(
MF.getInfo<ARMFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
return false;
}
+
+void ARMBaseTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h
index 69d8fa8ada6498..bf5a008e75e9ca 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.h
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.h
@@ -38,6 +38,9 @@ class ARMBaseTargetMachine : public LLVMTargetMachine {
bool isLittle;
mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
index a756061e307a44..45752572f0a28b 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
@@ -96,6 +96,8 @@ MachineFunctionInfo *CSKYTargetMachine::createMachineFunctionInfo(
STI);
}
+void CSKYTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
class CSKYPassConfig : public TargetPassConfig {
public:
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.h b/llvm/lib/Target/CSKY/CSKYTargetMachine.h
index e47b514ae9ddc5..872648b6d99401 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.h
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.h
@@ -24,6 +24,9 @@ class CSKYTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<CSKYSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
CSKYTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 803b9b81045c63..6cab7906b22ada 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -348,6 +348,8 @@ MachineFunctionInfo *HexagonTargetMachine::createMachineFunctionInfo(
HexagonTargetMachine::~HexagonTargetMachine() = default;
+void HexagonTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
/// Hexagon Code Generator Pass Configuration Options.
class HexagonPassConfig : public TargetPassConfig {
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
index 6e9a78b7665042..21730d88e17f4d 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
@@ -26,6 +26,9 @@ class HexagonTargetMachine : public LLVMTargetMachine {
HexagonSubtarget Subtarget;
mutable StringMap<std::unique_ptr<HexagonSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
index 4401aadfe78485..83e2bdf6d14f90 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
@@ -141,6 +141,8 @@ MachineFunctionInfo *LoongArchTargetMachine::createMachineFunctionInfo(
Allocator, F, STI);
}
+void LoongArchTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
class LoongArchPassConfig : public TargetPassConfig {
public:
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
index fa9bc7608e7d2c..321cfdd9f84b51 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
@@ -23,6 +23,9 @@ class LoongArchTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<LoongArchSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.cpp b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
index b65de5e177b53e..3353f1d34ffbd0 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.cpp
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
@@ -138,6 +138,8 @@ MachineFunctionInfo *M68kTargetMachine::createMachineFunctionInfo(
STI);
}
+void M68kTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
//===----------------------------------------------------------------------===//
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.h b/llvm/lib/Target/M68k/M68kTargetMachine.h
index 4ff4c4cb46b809..416fc166940672 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.h
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.h
@@ -34,6 +34,9 @@ class M68kTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<M68kSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
M68kTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 7802767e31c2f6..11c3aa12c357dc 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -215,6 +215,8 @@ void MipsTargetMachine::resetSubtarget(MachineFunction *MF) {
Subtarget = &MF->getSubtarget<MipsSubtarget>();
}
+void MipsTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
/// Mips Code Generator Pass Configuration Options.
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h
index 0ad239e3bed128..1efbd355a39e6e 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.h
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.h
@@ -36,6 +36,9 @@ class MipsTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 7d0455942923dd..08a6d4608d5e52 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -410,6 +410,8 @@ PPCTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
+void PPCTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
//===----------------------------------------------------------------------===//
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
index 9d0d3e727170a3..88a5d62d191b96 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
@@ -36,6 +36,9 @@ class PPCTargetMachine final : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<PPCSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index 2dcac1320417c2..adfd98093df591 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -271,6 +271,8 @@ bool RISCVTargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,
return true;
}
+void RISCVTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
class RVVRegisterRegAlloc : public RegisterRegAllocBase<RVVRegisterRegAlloc> {
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.h b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
index ce7b7907e1f3af..b8f7077b14a2ae 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
@@ -25,6 +25,9 @@ class RISCVTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<RISCVSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
index 50a96368bbdca9..a4816fb643048b 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -158,6 +158,8 @@ MachineFunctionInfo *SparcTargetMachine::createMachineFunctionInfo(
F, STI);
}
+void SparcTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
/// Sparc Code Generator Pass Configuration Options.
class SparcPassConfig : public TargetPassConfig {
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h
index 497d5f6623cd30..7f41d946578afc 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.h
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h
@@ -25,6 +25,9 @@ class SparcTargetMachine : public LLVMTargetMachine {
bool is64Bit;
mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
index 53ed46f14f14dc..a2cb9477f7c2d2 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -205,6 +205,8 @@ SystemZTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
+void SystemZTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
/// SystemZ Code Generator Pass Configuration Options.
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index 75e5d68e74eef4..db5bba172e4787 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -29,6 +29,9 @@ class SystemZTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<SystemZSubtarget>> SubtargetMap;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index 73765f8fa0092c..c499a4a95bf2f5 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -185,6 +185,8 @@ WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
return getSubtargetImpl(CPU, FS);
}
+void WebAssemblyTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
class CoalesceFeaturesAndStripAtomics final : public ModulePass {
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
index 1ff2e175978c31..e532a6237aa578 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
@@ -26,6 +26,9 @@ class WebAssemblyTargetMachine final : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<WebAssemblySubtarget>> SubtargetMap;
bool UsesMultivalueABI = false;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index fc2a1e34b711ef..187c856740376d 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -373,6 +373,8 @@ bool X86TargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,
return SrcAS < 256 && DestAS < 256;
}
+void X86TargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
//===----------------------------------------------------------------------===//
// X86 TTI query.
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/X86/X86TargetMachine.h b/llvm/lib/Target/X86/X86TargetMachine.h
index ec4a93e9c9d4b0..93fa5a562ecc1d 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.h
+++ b/llvm/lib/Target/X86/X86TargetMachine.h
@@ -31,6 +31,9 @@ class X86TargetMachine final : public LLVMTargetMachine {
// True if this is used in JIT.
bool IsJIT;
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
+
public:
X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
index 49c7faf84df1d3..4279e4edacce40 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -83,6 +83,8 @@ XtensaTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
+void XtensaTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+
namespace {
/// Xtensa Code Generator Pass Configuration Options.
class XtensaPassConfig : public TargetPassConfig {
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.h b/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
index f371f22ed3d0e7..041b01f6c87f91 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
@@ -47,6 +47,9 @@ class XtensaTargetMachine : public LLVMTargetMachine {
protected:
mutable StringMap<std::unique_ptr<XtensaSubtarget>> SubtargetMap;
+
+ /// clear target specific SubtargetMap.
+ void clearSubtargetMap() override;
};
} // end namespace llvm
>From eeb3152b4df3c15ebbe6f0d41c9eff13278bfea7 Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.chen at modular.com>
Date: Tue, 15 Oct 2024 12:35:40 -0400
Subject: [PATCH 2/4] Fix format.
---
llvm/include/llvm/Target/TargetMachine.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index d16fe6aa4bde55..971dee30a4ebb3 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -449,7 +449,7 @@ class LLVMTargetMachine : public TargetMachine {
void initAsmInfo();
/// clear target specific SubtargetMap.
- virtual void clearSubtargetMap(){};
+ virtual void clearSubtargetMap() {};
public:
/// Get a TargetTransformInfo implementation for the target.
>From d072a33386267b37f67d0fefd5abe97f18b456a0 Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.chen at modular.com>
Date: Mon, 28 Oct 2024 07:00:57 -0700
Subject: [PATCH 3/4] Make API more general.
---
llvm/include/llvm/Target/TargetMachine.h | 4 ++--
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 2 +-
llvm/lib/Target/AArch64/AArch64TargetMachine.h | 4 ++--
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +-
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 4 ++--
llvm/lib/Target/AMDGPU/R600TargetMachine.cpp | 2 +-
llvm/lib/Target/AMDGPU/R600TargetMachine.h | 4 ++--
llvm/lib/Target/ARM/ARMTargetMachine.cpp | 2 +-
llvm/lib/Target/ARM/ARMTargetMachine.h | 4 ++--
llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 +-
llvm/lib/Target/CSKY/CSKYTargetMachine.h | 4 ++--
llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 2 +-
llvm/lib/Target/Hexagon/HexagonTargetMachine.h | 4 ++--
llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp | 2 +-
llvm/lib/Target/LoongArch/LoongArchTargetMachine.h | 4 ++--
llvm/lib/Target/M68k/M68kTargetMachine.cpp | 2 +-
llvm/lib/Target/M68k/M68kTargetMachine.h | 4 ++--
llvm/lib/Target/Mips/MipsTargetMachine.cpp | 2 +-
llvm/lib/Target/Mips/MipsTargetMachine.h | 4 ++--
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 2 +-
llvm/lib/Target/PowerPC/PPCTargetMachine.h | 4 ++--
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 2 +-
llvm/lib/Target/RISCV/RISCVTargetMachine.h | 4 ++--
llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 2 +-
llvm/lib/Target/Sparc/SparcTargetMachine.h | 4 ++--
llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp | 2 +-
llvm/lib/Target/SystemZ/SystemZTargetMachine.h | 4 ++--
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | 2 +-
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h | 4 ++--
llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +-
llvm/lib/Target/X86/X86TargetMachine.h | 4 ++--
llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp | 2 +-
llvm/lib/Target/Xtensa/XtensaTargetMachine.h | 4 ++--
33 files changed, 50 insertions(+), 50 deletions(-)
diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index 971dee30a4ebb3..fa3ab58a21ddcb 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -448,8 +448,8 @@ class LLVMTargetMachine : public TargetMachine {
void initAsmInfo();
- /// clear target specific SubtargetMap.
- virtual void clearSubtargetMap() {};
+ /// Reset internal state.
+ virtual void reset() {};
public:
/// Get a TargetTransformInfo implementation for the target.
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 070b11032f884a..e24a874e74970f 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -272,7 +272,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() {
initializeAArch64GlobalsTaggingPass(*PR);
}
-void AArch64TargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void AArch64TargetMachine::reset() { SubtargetMap.clear(); }
//===----------------------------------------------------------------------===//
// AArch64 Lowering public interface.
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.h b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
index 135a21dbde5221..e4d0aff50d8f67 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.h
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
@@ -26,8 +26,8 @@ class AArch64TargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index b6c1b94917bbbc..901dc0e4989733 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -939,7 +939,7 @@ bool AMDGPUTargetMachine::splitModule(
// GCN Target Machine (SI+)
//===----------------------------------------------------------------------===//
-void GCNTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); };
+void GCNTargetMachine::reset() { SubtargetMap.clear(); };
GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
index c60cf7dffcca14..e0797b1f0118fa 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
@@ -81,8 +81,8 @@ class GCNTargetMachine final : public AMDGPUTargetMachine {
private:
mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
index e65e90c688ee05..b39f0b124582da 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
@@ -50,7 +50,7 @@ static MachineSchedRegistry R600SchedRegistry("r600",
// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//
-void R600TargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void R600TargetMachine::reset() { SubtargetMap.clear(); }
R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.h b/llvm/lib/Target/AMDGPU/R600TargetMachine.h
index c09d784a0a03c1..4377d98c0a46b6 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.h
@@ -29,8 +29,8 @@ class R600TargetMachine final : public AMDGPUTargetMachine {
private:
mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 26bf5d26987cbc..74a63361d341b7 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -643,4 +643,4 @@ bool ARMBaseTargetMachine::parseMachineFunctionInfo(
return false;
}
-void ARMBaseTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void ARMBaseTargetMachine::reset() { SubtargetMap.clear(); }
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h
index 34822fd3de713d..5b3594a4dcca8a 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.h
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.h
@@ -38,8 +38,8 @@ class ARMBaseTargetMachine : public LLVMTargetMachine {
bool isLittle;
mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
index 45752572f0a28b..1093c5600eb594 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
@@ -96,7 +96,7 @@ MachineFunctionInfo *CSKYTargetMachine::createMachineFunctionInfo(
STI);
}
-void CSKYTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void CSKYTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
class CSKYPassConfig : public TargetPassConfig {
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.h b/llvm/lib/Target/CSKY/CSKYTargetMachine.h
index 872648b6d99401..5a338c50475b32 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.h
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.h
@@ -24,8 +24,8 @@ class CSKYTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<CSKYSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
CSKYTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 6cab7906b22ada..4b9682ae56066f 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -348,7 +348,7 @@ MachineFunctionInfo *HexagonTargetMachine::createMachineFunctionInfo(
HexagonTargetMachine::~HexagonTargetMachine() = default;
-void HexagonTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void HexagonTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
/// Hexagon Code Generator Pass Configuration Options.
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
index 21730d88e17f4d..273ff6df4204f9 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
@@ -26,8 +26,8 @@ class HexagonTargetMachine : public LLVMTargetMachine {
HexagonSubtarget Subtarget;
mutable StringMap<std::unique_ptr<HexagonSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
index 83e2bdf6d14f90..f13b50e2f80bd0 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
@@ -141,7 +141,7 @@ MachineFunctionInfo *LoongArchTargetMachine::createMachineFunctionInfo(
Allocator, F, STI);
}
-void LoongArchTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void LoongArchTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
class LoongArchPassConfig : public TargetPassConfig {
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
index 321cfdd9f84b51..5874e100b274f5 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
@@ -23,8 +23,8 @@ class LoongArchTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<LoongArchSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.cpp b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
index 3353f1d34ffbd0..eb95d9ffc5b5cb 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.cpp
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
@@ -138,7 +138,7 @@ MachineFunctionInfo *M68kTargetMachine::createMachineFunctionInfo(
STI);
}
-void M68kTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void M68kTargetMachine::reset() { SubtargetMap.clear(); }
//===----------------------------------------------------------------------===//
// Pass Pipeline Configuration
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.h b/llvm/lib/Target/M68k/M68kTargetMachine.h
index 416fc166940672..0d92ec64e5056d 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.h
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.h
@@ -34,8 +34,8 @@ class M68kTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<M68kSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
M68kTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 11c3aa12c357dc..f6c86186cff39d 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -215,7 +215,7 @@ void MipsTargetMachine::resetSubtarget(MachineFunction *MF) {
Subtarget = &MF->getSubtarget<MipsSubtarget>();
}
-void MipsTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void MipsTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h
index 1efbd355a39e6e..27c49f4d9676fb 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.h
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.h
@@ -36,8 +36,8 @@ class MipsTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 7abdb209cc33a0..697bc2fa4bbf9f 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -410,7 +410,7 @@ PPCTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
-void PPCTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void PPCTargetMachine::reset() { SubtargetMap.clear(); }
//===----------------------------------------------------------------------===//
// Pass Pipeline Configuration
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
index 88a5d62d191b96..e82e93637b8c57 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
@@ -36,8 +36,8 @@ class PPCTargetMachine final : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<PPCSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index 84d5e44578eb40..0d94da89c938a0 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -272,7 +272,7 @@ bool RISCVTargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,
return true;
}
-void RISCVTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void RISCVTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.h b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
index b8f7077b14a2ae..69880bcd2e7e6d 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
@@ -25,8 +25,8 @@ class RISCVTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<RISCVSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
index a4816fb643048b..ad8e525f02a7e3 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -158,7 +158,7 @@ MachineFunctionInfo *SparcTargetMachine::createMachineFunctionInfo(
F, STI);
}
-void SparcTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void SparcTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
/// Sparc Code Generator Pass Configuration Options.
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h
index 7f41d946578afc..2497ca8ef861f9 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.h
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h
@@ -25,8 +25,8 @@ class SparcTargetMachine : public LLVMTargetMachine {
bool is64Bit;
mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
index f6067358d5492b..79a8566eba441d 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -205,7 +205,7 @@ SystemZTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
-void SystemZTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void SystemZTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index db5bba172e4787..2c08f4352168f9 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -29,8 +29,8 @@ class SystemZTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<SystemZSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index 462a24614f533c..5a67c64393f302 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -188,7 +188,7 @@ WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
return getSubtargetImpl(CPU, FS);
}
-void WebAssemblyTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void WebAssemblyTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
index e532a6237aa578..c6f0a3bde384fe 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
@@ -26,8 +26,8 @@ class WebAssemblyTargetMachine final : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<WebAssemblySubtarget>> SubtargetMap;
bool UsesMultivalueABI = false;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index dd354bacca8877..dcdd059b4c0cf9 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -376,7 +376,7 @@ bool X86TargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,
return SrcAS < 256 && DestAS < 256;
}
-void X86TargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void X86TargetMachine::reset() { SubtargetMap.clear(); }
//===----------------------------------------------------------------------===//
// X86 TTI query.
diff --git a/llvm/lib/Target/X86/X86TargetMachine.h b/llvm/lib/Target/X86/X86TargetMachine.h
index 93fa5a562ecc1d..d27c8a4d101165 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.h
+++ b/llvm/lib/Target/X86/X86TargetMachine.h
@@ -31,8 +31,8 @@ class X86TargetMachine final : public LLVMTargetMachine {
// True if this is used in JIT.
bool IsJIT;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
public:
X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
index 4279e4edacce40..f608ae3cf60088 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -83,7 +83,7 @@ XtensaTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
-void XtensaTargetMachine::clearSubtargetMap() { SubtargetMap.clear(); }
+void XtensaTargetMachine::reset() { SubtargetMap.clear(); }
namespace {
/// Xtensa Code Generator Pass Configuration Options.
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.h b/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
index 041b01f6c87f91..9f70018ef52214 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
@@ -48,8 +48,8 @@ class XtensaTargetMachine : public LLVMTargetMachine {
protected:
mutable StringMap<std::unique_ptr<XtensaSubtarget>> SubtargetMap;
- /// clear target specific SubtargetMap.
- void clearSubtargetMap() override;
+ /// Reset internal state.
+ void reset() override;
};
} // end namespace llvm
>From af85959faf5fe54bb7b643a6ba19f3ac031fce53 Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.chen at modular.com>
Date: Wed, 6 Nov 2024 10:13:47 -0500
Subject: [PATCH 4/4] Keep reset impl as default for some backends.
---
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 --
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 3 ---
llvm/lib/Target/AMDGPU/R600TargetMachine.cpp | 2 --
llvm/lib/Target/AMDGPU/R600TargetMachine.h | 3 ---
llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 --
llvm/lib/Target/CSKY/CSKYTargetMachine.h | 3 ---
llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 2 --
llvm/lib/Target/Hexagon/HexagonTargetMachine.h | 3 ---
llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp | 2 --
llvm/lib/Target/LoongArch/LoongArchTargetMachine.h | 3 ---
llvm/lib/Target/M68k/M68kTargetMachine.cpp | 2 --
llvm/lib/Target/M68k/M68kTargetMachine.h | 3 ---
llvm/lib/Target/Mips/MipsTargetMachine.cpp | 2 --
llvm/lib/Target/Mips/MipsTargetMachine.h | 3 ---
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 2 --
llvm/lib/Target/PowerPC/PPCTargetMachine.h | 3 ---
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 2 --
llvm/lib/Target/RISCV/RISCVTargetMachine.h | 3 ---
llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 2 --
llvm/lib/Target/Sparc/SparcTargetMachine.h | 3 ---
llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp | 2 --
llvm/lib/Target/SystemZ/SystemZTargetMachine.h | 3 ---
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | 2 --
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h | 3 ---
llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp | 2 --
llvm/lib/Target/Xtensa/XtensaTargetMachine.h | 2 --
26 files changed, 64 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index e9bef7292e1ae7..786baa6820e860 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -953,8 +953,6 @@ bool AMDGPUTargetMachine::splitModule(
// GCN Target Machine (SI+)
//===----------------------------------------------------------------------===//
-void GCNTargetMachine::reset() { SubtargetMap.clear(); };
-
GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
index e0797b1f0118fa..d8a5111e5898d7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
@@ -81,9 +81,6 @@ class GCNTargetMachine final : public AMDGPUTargetMachine {
private:
mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
index b39f0b124582da..a1a60b8bdfa9ee 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
@@ -50,8 +50,6 @@ static MachineSchedRegistry R600SchedRegistry("r600",
// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//
-void R600TargetMachine::reset() { SubtargetMap.clear(); }
-
R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.h b/llvm/lib/Target/AMDGPU/R600TargetMachine.h
index 4377d98c0a46b6..b7f123a07a9c1d 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.h
@@ -29,9 +29,6 @@ class R600TargetMachine final : public AMDGPUTargetMachine {
private:
mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
index 1093c5600eb594..a756061e307a44 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
@@ -96,8 +96,6 @@ MachineFunctionInfo *CSKYTargetMachine::createMachineFunctionInfo(
STI);
}
-void CSKYTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
class CSKYPassConfig : public TargetPassConfig {
public:
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.h b/llvm/lib/Target/CSKY/CSKYTargetMachine.h
index 5a338c50475b32..e47b514ae9ddc5 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.h
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.h
@@ -24,9 +24,6 @@ class CSKYTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<CSKYSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
CSKYTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 4b9682ae56066f..803b9b81045c63 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -348,8 +348,6 @@ MachineFunctionInfo *HexagonTargetMachine::createMachineFunctionInfo(
HexagonTargetMachine::~HexagonTargetMachine() = default;
-void HexagonTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
/// Hexagon Code Generator Pass Configuration Options.
class HexagonPassConfig : public TargetPassConfig {
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
index 273ff6df4204f9..6e9a78b7665042 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h
@@ -26,9 +26,6 @@ class HexagonTargetMachine : public LLVMTargetMachine {
HexagonSubtarget Subtarget;
mutable StringMap<std::unique_ptr<HexagonSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
index f13b50e2f80bd0..4401aadfe78485 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
@@ -141,8 +141,6 @@ MachineFunctionInfo *LoongArchTargetMachine::createMachineFunctionInfo(
Allocator, F, STI);
}
-void LoongArchTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
class LoongArchPassConfig : public TargetPassConfig {
public:
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
index 5874e100b274f5..fa9bc7608e7d2c 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
@@ -23,9 +23,6 @@ class LoongArchTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<LoongArchSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.cpp b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
index eb95d9ffc5b5cb..b65de5e177b53e 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.cpp
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
@@ -138,8 +138,6 @@ MachineFunctionInfo *M68kTargetMachine::createMachineFunctionInfo(
STI);
}
-void M68kTargetMachine::reset() { SubtargetMap.clear(); }
-
//===----------------------------------------------------------------------===//
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.h b/llvm/lib/Target/M68k/M68kTargetMachine.h
index 0d92ec64e5056d..4ff4c4cb46b809 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.h
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.h
@@ -34,9 +34,6 @@ class M68kTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<M68kSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
M68kTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 423883cb5657ad..c7dbcc80148ae4 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -219,8 +219,6 @@ void MipsTargetMachine::resetSubtarget(MachineFunction *MF) {
Subtarget = &MF->getSubtarget<MipsSubtarget>();
}
-void MipsTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
/// Mips Code Generator Pass Configuration Options.
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h
index 27c49f4d9676fb..0ad239e3bed128 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.h
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.h
@@ -36,9 +36,6 @@ class MipsTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index b8673d4b9a05f1..133c47174570cc 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -410,8 +410,6 @@ PPCTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
-void PPCTargetMachine::reset() { SubtargetMap.clear(); }
-
//===----------------------------------------------------------------------===//
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
index e82e93637b8c57..9d0d3e727170a3 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
@@ -36,9 +36,6 @@ class PPCTargetMachine final : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<PPCSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index 38323e9c282da1..daaf9d4075dc54 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -274,8 +274,6 @@ bool RISCVTargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,
return true;
}
-void RISCVTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
class RVVRegisterRegAlloc : public RegisterRegAllocBase<RVVRegisterRegAlloc> {
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.h b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
index 69880bcd2e7e6d..ce7b7907e1f3af 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
@@ -25,9 +25,6 @@ class RISCVTargetMachine : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<RISCVSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
index ad8e525f02a7e3..50a96368bbdca9 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -158,8 +158,6 @@ MachineFunctionInfo *SparcTargetMachine::createMachineFunctionInfo(
F, STI);
}
-void SparcTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
/// Sparc Code Generator Pass Configuration Options.
class SparcPassConfig : public TargetPassConfig {
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h
index 2497ca8ef861f9..497d5f6623cd30 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.h
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h
@@ -25,9 +25,6 @@ class SparcTargetMachine : public LLVMTargetMachine {
bool is64Bit;
mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
index 79a8566eba441d..f76f41768e886d 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -205,8 +205,6 @@ SystemZTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
-void SystemZTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
/// SystemZ Code Generator Pass Configuration Options.
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index 2c08f4352168f9..75e5d68e74eef4 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -29,9 +29,6 @@ class SystemZTargetMachine : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<SystemZSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
-
public:
SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index 5a67c64393f302..83cd57d0bbdd55 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -188,8 +188,6 @@ WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
return getSubtargetImpl(CPU, FS);
}
-void WebAssemblyTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
class CoalesceFeaturesAndStripAtomics final : public ModulePass {
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
index c6f0a3bde384fe..1ff2e175978c31 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
@@ -26,9 +26,6 @@ class WebAssemblyTargetMachine final : public LLVMTargetMachine {
mutable StringMap<std::unique_ptr<WebAssemblySubtarget>> SubtargetMap;
bool UsesMultivalueABI = false;
- /// Reset internal state.
- void reset() override;
-
public:
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
index f608ae3cf60088..49c7faf84df1d3 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -83,8 +83,6 @@ XtensaTargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}
-void XtensaTargetMachine::reset() { SubtargetMap.clear(); }
-
namespace {
/// Xtensa Code Generator Pass Configuration Options.
class XtensaPassConfig : public TargetPassConfig {
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.h b/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
index 9f70018ef52214..c0173e40d2d8f0 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.h
@@ -48,8 +48,6 @@ class XtensaTargetMachine : public LLVMTargetMachine {
protected:
mutable StringMap<std::unique_ptr<XtensaSubtarget>> SubtargetMap;
- /// Reset internal state.
- void reset() override;
};
} // end namespace llvm
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