[llvm] e3b0ef7 - [RISCV] Remove forced-sw-shadow-stack in RISCVFeatures.td (#115447)

via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 8 04:28:10 PST 2024


Author: Jesse Huang
Date: 2024-11-08T04:28:07-08:00
New Revision: e3b0ef7aaacb7f1374cb0fc5f6dde4b95ebfa624

URL: https://github.com/llvm/llvm-project/commit/e3b0ef7aaacb7f1374cb0fc5f6dde4b95ebfa624
DIFF: https://github.com/llvm/llvm-project/commit/e3b0ef7aaacb7f1374cb0fc5f6dde4b95ebfa624.diff

LOG: [RISCV] Remove forced-sw-shadow-stack in RISCVFeatures.td (#115447)

This patch removes forced-sw-shadow-stack related statements in
RISCVFeatures.td, which was missed in the last patch
https://github.com/llvm/llvm-project/pull/115355

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVFeatures.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 2d6d455a2248ea..ad733e1488b5ca 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -1461,8 +1461,3 @@ def FeatureTaggedGlobals : SubtargetFeature<"tagged-globals",
     "AllowTaggedGlobals",
     "true", "Use an instruction sequence for taking the address of a global "
     "that allows a memory tag in the upper address bits">;
-
-def FeatureForcedSWShadowStack : SubtargetFeature<
-    "forced-sw-shadow-stack", "HasForcedSWShadowStack", "true",
-    "Implement shadow stack with software.">;
-def HasForcedSWShadowStack : Predicate<"Subtarget->hasForcedSWShadowStack()">;


        


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