[llvm] [AMDGPU] Support `nuw` and `nusw` in buffer fat pointer lowering (PR #115039)
Krzysztof Drewniak via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 5 09:59:50 PST 2024
https://github.com/krzysz00 created https://github.com/llvm/llvm-project/pull/115039
This commit usis the `nuw` flag on `getelemnetptr` to set the `nuw` flag on buffer offset additions, and also moves from `inbounds` to the looser `nusw` for the existing case.
>From 42e4a6704136edf218724346e7970fbf51563095 Mon Sep 17 00:00:00 2001
From: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: Tue, 5 Nov 2024 17:57:21 +0000
Subject: [PATCH] [AMDGPU] Support `nuw` and `nusw` in buffer fat pointer
lowering
This commit usis the `nuw` flag on `getelemnetptr` to set the `nuw`
flag on buffer offset additions, and also moves from `inbounds` to the
looser `nusw` for the existing case.
---
.../AMDGPU/AMDGPULowerBufferFatPointers.cpp | 5 +-
.../lower-buffer-fat-pointers-pointer-ops.ll | 47 +++++++++++++++++++
2 files changed, 50 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
index 787747e6055805..c7cdd7a37282c7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
@@ -1256,7 +1256,8 @@ PtrParts SplitPtrStructs::visitGetElementPtrInst(GetElementPtrInst &GEP) {
auto [Rsrc, Off] = getPtrParts(Ptr);
const DataLayout &DL = GEP.getDataLayout();
- bool InBounds = GEP.isInBounds();
+ bool IsNUW = GEP.hasNoUnsignedWrap();
+ bool IsNUSW = GEP.hasNoUnsignedSignedWrap();
// In order to call emitGEPOffset() and thus not have to reimplement it,
// we need the GEP result to have ptr addrspace(7) type.
@@ -1280,7 +1281,7 @@ PtrParts SplitPtrStructs::visitGetElementPtrInst(GetElementPtrInst &GEP) {
NewOff = OffAccum;
} else {
NewOff = IRB.CreateAdd(Off, OffAccum, "",
- /*hasNUW=*/InBounds && HasNonNegativeOff,
+ /*hasNUW=*/IsNUW || (IsNUSW && HasNonNegativeOff),
/*hasNSW=*/false);
}
copyMetadata(NewOff, &GEP);
diff --git a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
index cc98b5333c5bb8..9cff68303a5390 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
+++ b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
@@ -89,6 +89,53 @@ define ptr addrspace(7) @simple_inbounds_gep(ptr addrspace(7) %ptr, i32 %off) {
ret ptr addrspace(7) %ret
}
+define ptr addrspace(7) @simple_nuw_gep(ptr addrspace(7) %ptr, i32 %off) {
+; CHECK-LABEL: define { ptr addrspace(8), i32 } @simple_nuw_gep
+; CHECK-SAME: ({ ptr addrspace(8), i32 } [[PTR:%.*]], i32 [[OFF:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[PTR_RSRC:%.*]] = extractvalue { ptr addrspace(8), i32 } [[PTR]], 0
+; CHECK-NEXT: [[PTR_OFF:%.*]] = extractvalue { ptr addrspace(8), i32 } [[PTR]], 1
+; CHECK-NEXT: [[RET_IDX:%.*]] = mul nuw i32 [[OFF]], 4
+; CHECK-NEXT: [[RET:%.*]] = add nuw i32 [[PTR_OFF]], [[RET_IDX]]
+; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr addrspace(8), i32 } poison, ptr addrspace(8) [[PTR_RSRC]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { ptr addrspace(8), i32 } [[TMP1]], i32 [[RET]], 1
+; CHECK-NEXT: ret { ptr addrspace(8), i32 } [[TMP2]]
+;
+ %ret = getelementptr nuw i32, ptr addrspace(7) %ptr, i32 %off
+ ret ptr addrspace(7) %ret
+}
+
+define ptr addrspace(7) @simple_nusw_gep(ptr addrspace(7) %ptr, i32 %off) {
+; CHECK-LABEL: define { ptr addrspace(8), i32 } @simple_nusw_gep
+; CHECK-SAME: ({ ptr addrspace(8), i32 } [[PTR:%.*]], i32 [[OFF:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[PTR_RSRC:%.*]] = extractvalue { ptr addrspace(8), i32 } [[PTR]], 0
+; CHECK-NEXT: [[PTR_OFF:%.*]] = extractvalue { ptr addrspace(8), i32 } [[PTR]], 1
+; CHECK-NEXT: [[RET_IDX:%.*]] = mul nsw i32 [[OFF]], 4
+; CHECK-NEXT: [[RET:%.*]] = add i32 [[PTR_OFF]], [[RET_IDX]]
+; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr addrspace(8), i32 } poison, ptr addrspace(8) [[PTR_RSRC]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { ptr addrspace(8), i32 } [[TMP1]], i32 [[RET]], 1
+; CHECK-NEXT: ret { ptr addrspace(8), i32 } [[TMP2]]
+;
+ %ret = getelementptr nusw i32, ptr addrspace(7) %ptr, i32 %off
+ ret ptr addrspace(7) %ret
+}
+
+define ptr addrspace(7) @nusw_gep_pair(ptr addrspace(7) %ptr, i32 %off) {
+; CHECK-LABEL: define { ptr addrspace(8), i32 } @nusw_gep_pair
+; CHECK-SAME: ({ ptr addrspace(8), i32 } [[PTR:%.*]], i32 [[OFF:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[PTR_RSRC:%.*]] = extractvalue { ptr addrspace(8), i32 } [[PTR]], 0
+; CHECK-NEXT: [[PTR_OFF:%.*]] = extractvalue { ptr addrspace(8), i32 } [[PTR]], 1
+; CHECK-NEXT: [[P1_IDX:%.*]] = mul nsw i32 [[OFF]], 4
+; CHECK-NEXT: [[P1:%.*]] = add i32 [[PTR_OFF]], [[P1_IDX]]
+; CHECK-NEXT: [[RET:%.*]] = add nuw i32 [[P1]], 16
+; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr addrspace(8), i32 } poison, ptr addrspace(8) [[PTR_RSRC]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { ptr addrspace(8), i32 } [[TMP1]], i32 [[RET]], 1
+; CHECK-NEXT: ret { ptr addrspace(8), i32 } [[TMP2]]
+;
+ %p1 = getelementptr nusw i32, ptr addrspace(7) %ptr, i32 %off
+ %ret = getelementptr nusw i32, ptr addrspace(7) %p1, i32 4
+ ret ptr addrspace(7) %ret
+}
+
define ptr addrspace(7) @zero_gep(ptr addrspace(7) %ptr) {
; CHECK-LABEL: define { ptr addrspace(8), i32 } @zero_gep
; CHECK-SAME: ({ ptr addrspace(8), i32 } [[PTR:%.*]]) #[[ATTR0]] {
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