[llvm] [NFC][PowerPC] Add getScalarIntVT to return MVT based on arch (PR #115203)

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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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git-clang-format --diff c949500d519085a4e5b93928b14ca766a353ad73 7be42369652588f7311043c4e1eddcd9525f9d6f --extensions h,cpp -- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp llvm/lib/Target/PowerPC/PPCISelLowering.cpp llvm/lib/Target/PowerPC/PPCSubtarget.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 8a4bfbf33b..2ca2872b75 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -5242,10 +5242,10 @@ static SDValue EmitTailCallStoreFPAndRetAddr(SelectionDAG &DAG, SDValue Chain,
 
 /// CalculateTailCallArgDest - Remember Argument for later processing. Calculate
 /// the position of the argument.
-static void
-CalculateTailCallArgDest(SelectionDAG &DAG, MachineFunction &MF, bool IsPPC64,
-                         SDValue Arg, int SPDiff, unsigned ArgOffset,
-                     SmallVectorImpl<TailCallArgumentInfo> &TailCallArguments) {
+static void CalculateTailCallArgDest(
+    SelectionDAG &DAG, MachineFunction &MF, bool IsPPC64, SDValue Arg,
+    int SPDiff, unsigned ArgOffset,
+    SmallVectorImpl<TailCallArgumentInfo> &TailCallArguments) {
   int Offset = ArgOffset + SPDiff;
   uint32_t OpSize = (Arg.getValueSizeInBits() + 7) / 8;
   int FI = MF.getFrameInfo().CreateFixedObject(OpSize, Offset, true);
@@ -5705,13 +5705,11 @@ static void prepareDescriptorIndirectCall(SelectionDAG &DAG, SDValue &Callee,
   prepareIndirectCall(DAG, LoadFuncPtr, Glue, Chain, dl);
 }
 
-static void
-buildCallOperands(SmallVectorImpl<SDValue> &Ops,
-                  PPCTargetLowering::CallFlags CFlags, const SDLoc &dl,
-                  SelectionDAG &DAG,
-                  SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
-                  SDValue Glue, SDValue Chain, SDValue &Callee, int SPDiff,
-                  const PPCSubtarget &Subtarget) {
+static void buildCallOperands(
+    SmallVectorImpl<SDValue> &Ops, PPCTargetLowering::CallFlags CFlags,
+    const SDLoc &dl, SelectionDAG &DAG,
+    SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue,
+    SDValue Chain, SDValue &Callee, int SPDiff, const PPCSubtarget &Subtarget) {
   // MVT for a general purpose register.
   const bool IsPPC64 = Subtarget.isPPC64();
   const MVT RegVT = Subtarget.getScalarIntVT();

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https://github.com/llvm/llvm-project/pull/115203