[llvm] [RISCV] Update latency of MUL & CPOP in SiFive P600's scheduling model (PR #115042)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 5 11:09:08 PST 2024

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https://github.com/topperc approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/115042

Previous message: [llvm] [RISCV] Update latency of MUL & CPOP in SiFive P600's scheduling model (PR #115042)
Next message: [llvm] 02e5c25 - [X86] SimplifyDemandedBitsForTargetNode - cleanup SSE shift-by-immediate handlers. NFC.
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