[llvm] [SDAG] Only apply sincos stack slot folding to IR pointers (PR #115346)

[Benjamin Maxwell via llvm-commits]

https://github.com/MacDue created https://github.com/llvm/llvm-project/pull/115346

Fixes #115323

>From 79b50e9faca172b0632b9337b3a9ca85e8ebffcc Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: Thu, 7 Nov 2024 17:16:31 +0000
Subject: [PATCH] [SDAG] Only apply sincos stack slot folding to IR pointers

Fixes #115323
---
 .../lib/CodeGen/SelectionDAG/SelectionDAG.cpp |  1 +
 llvm/test/CodeGen/X86/sincos-stack-args.ll    | 35 +++++++++++++++++++
 2 files changed, 36 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/sincos-stack-args.ll

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 203e14f6cde3e3..710b314becbaef 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2519,6 +2519,7 @@ bool SelectionDAG::expandMultipleResultFPLibCall(
     unsigned ResNo = StoreValue.getResNo();
     Type *StoreType = StoreValue.getValueType().getTypeForEVT(Ctx);
     if (CallRetResNo == ResNo || !ST->isSimple() ||
+        !isa<const Value *>(ST->getPointerInfo().V) ||
         ST->getAddressSpace() != 0 ||
         ST->getAlign() <
             getDataLayout().getABITypeAlign(StoreType->getScalarType()) ||
diff --git a/llvm/test/CodeGen/X86/sincos-stack-args.ll b/llvm/test/CodeGen/X86/sincos-stack-args.ll
new file mode 100644
index 00000000000000..9fb3a6769fda11
--- /dev/null
+++ b/llvm/test/CodeGen/X86/sincos-stack-args.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 5
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu  | FileCheck %s
+; Test for issue https://github.com/llvm/llvm-project/issues/115323
+
+declare double @g(double, double)
+
+define double @f(double %a) {
+; CHECK-LABEL: f:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    subl $44, %esp
+; CHECK-NEXT:    .cfi_def_cfa_offset 48
+; CHECK-NEXT:    fldl 48(%esp)
+; CHECK-NEXT:    leal 24(%esp), %eax
+; CHECK-NEXT:    movl %eax, 12(%esp)
+; CHECK-NEXT:    leal 32(%esp), %eax
+; CHECK-NEXT:    movl %eax, 8(%esp)
+; CHECK-NEXT:    fstpl (%esp)
+; CHECK-NEXT:    calll sincos
+; CHECK-NEXT:    fldl 32(%esp)
+; CHECK-NEXT:    fldl 24(%esp)
+; CHECK-NEXT:    faddl {{\.?LCPI[0-9]+_[0-9]+}}
+; CHECK-NEXT:    fxch %st(1)
+; CHECK-NEXT:    fstpl 8(%esp)
+; CHECK-NEXT:    fstpl (%esp)
+; CHECK-NEXT:    calll g at PLT
+; CHECK-NEXT:    addl $44, %esp
+; CHECK-NEXT:    .cfi_def_cfa_offset 4
+; CHECK-NEXT:    retl
+entry:
+  %0 = tail call double @llvm.sin.f64(double %a)
+  %1 = tail call double @llvm.cos.f64(double %a)
+  %add = fadd double %1, 3.140000e+00
+  %call = tail call double @g(double %add, double %0)
+  ret double %call
+}