[llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)

[Rahul Joshi via llvm-commits]

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@@ -1543,6 +1543,29 @@ const Init *BinOpInit::resolveReferences(Resolver &R) const {
   const Init *lhs = LHS->resolveReferences(R);
   const Init *rhs = RHS->resolveReferences(R);
 
+  unsigned Opc = getOpcode();
+  if (Opc == AND || Opc == OR) {
+    // Short-circuit. Regardless whether this is a logical or bitwise
+    // AND/OR.
+    // Ideally we could also short-circuit `!or(true, ...)`, but it's
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jurahul wrote:

The comment about `!or` now seems stale.

https://github.com/llvm/llvm-project/pull/113963