[llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #112403)

[Shilei Tian via llvm-commits]

shiltian wrote:

This change is likely to expose an issue in the register allocation, as we now lose 2 SGPRs by default.

https://github.com/llvm/llvm-project/pull/112403