[llvm] [TableGen] Make `!and` and `!or` short-circuit (PR #113963)

[Min-Yih Hsu via llvm-commits]

================
@@ -1543,6 +1543,29 @@ const Init *BinOpInit::resolveReferences(Resolver &R) const {
   const Init *lhs = LHS->resolveReferences(R);
   const Init *rhs = RHS->resolveReferences(R);
 
+  unsigned Opc = getOpcode();
+  if (Opc == AND || Opc == OR) {
+    // Short-circuit. Regardless whether this is a logical or bitwise
+    // AND/OR.
+    // Ideally we could also short-circuit `!or(true, ...)`, but it's
----------------
mshockwave wrote:

> The comment about `!or` now seems stale.

It is up-to-date: in the case of `!or`, TableGen first casts every operands into `int`, which is a 64 integer underlying. A `true` is casted to 1 (rather than all ones) and because we only support short-circuit against all ones -- namely -1 -- a `true` is actually not short circuited. The comment that follows also clarifies why we can't short circuit against 1.

https://github.com/llvm/llvm-project/pull/113963