[llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)
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Mon Nov 4 20:29:50 PST 2024
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@@ -17923,6 +17931,7 @@ AArch64TargetLowering::isDesirableToCommuteWithShift(const SDNode *N,
}
}
}
+
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LiqinWeng wrote:
removed
https://github.com/llvm/llvm-project/pull/101294
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