[llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)
Mel Chen via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 5 00:32:03 PST 2024
================
@@ -1392,7 +1395,19 @@ static void transformRecipestoEVLRecipes(VPlan &Plan, VPValue &EVL) {
TypeInfo.inferScalarType(Sel),
false, false, false);
})
-
+ .Case<VPInstruction>([&](VPInstruction *VPI) -> VPRecipeBase * {
+ VPValue *LHS, *RHS;
+ if (!match(VPI, m_Select(m_Specific(HeaderMask), m_VPValue(LHS),
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Mel-Chen wrote:
53d9ac6b0aa6d890e82cdffd53cd61faa025f772
Agree, replace `predicated reduction select` with `select with a header mask condition`.
https://github.com/llvm/llvm-project/pull/101641
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