[llvm] 596fd10 - [VPlan] Share logic to connect predecessors in VPBB/VPIRBB execute (NFC)
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 4 11:05:44 PST 2024
Author: Florian Hahn
Date: 2024-11-04T19:01:39Z
New Revision: 596fd103f896987463d212921421b3e78b6cf051
URL: https://github.com/llvm/llvm-project/commit/596fd103f896987463d212921421b3e78b6cf051
DIFF: https://github.com/llvm/llvm-project/commit/596fd103f896987463d212921421b3e78b6cf051.diff
LOG: [VPlan] Share logic to connect predecessors in VPBB/VPIRBB execute (NFC)
This moves the common logic to connect IRBBs created for a VPBB to their
predecessors in the VPlan CFG, making it easier to keep in sync in the
future.
Added:
Modified:
llvm/lib/Transforms/Vectorize/VPlan.cpp
llvm/lib/Transforms/Vectorize/VPlan.h
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/VPlan.cpp b/llvm/lib/Transforms/Vectorize/VPlan.cpp
index 54aae122877b98..00ba2f49017899 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlan.cpp
@@ -414,6 +414,11 @@ VPBasicBlock::createEmptyBasicBlock(VPTransformState::CFGState &CFG) {
PrevBB->getParent(), CFG.ExitBB);
LLVM_DEBUG(dbgs() << "LV: created " << NewBB->getName() << '\n');
+ return NewBB;
+}
+
+void VPBasicBlock::connectToPredecessors(VPTransformState::CFGState &CFG) {
+ BasicBlock *NewBB = CFG.VPBB2IRBB[this];
// Hook up the new basic block to its predecessors.
for (VPBlockBase *PredVPBlock : getHierarchicalPredecessors()) {
VPBasicBlock *PredVPBB = PredVPBlock->getExitingBasicBlock();
@@ -438,19 +443,22 @@ VPBasicBlock::createEmptyBasicBlock(VPTransformState::CFGState &CFG) {
// Set each forward successor here when it is created, excluding
// backedges. A backward successor is set when the branch is created.
unsigned idx = PredVPSuccessors.front() == this ? 0 : 1;
- assert(!TermBr->getSuccessor(idx) &&
- "Trying to reset an existing successor block.");
+ assert(
+ (!TermBr->getSuccessor(idx) ||
+ (isa<VPIRBasicBlock>(this) && TermBr->getSuccessor(idx) == NewBB)) &&
+ "Trying to reset an existing successor block.");
TermBr->setSuccessor(idx, NewBB);
}
CFG.DTU.applyUpdates({{DominatorTree::Insert, PredBB, NewBB}});
}
- return NewBB;
}
void VPIRBasicBlock::execute(VPTransformState *State) {
assert(getHierarchicalSuccessors().size() <= 2 &&
"VPIRBasicBlock can have at most two successors at the moment!");
State->Builder.SetInsertPoint(IRBB->getTerminator());
+ State->CFG.PrevBB = IRBB;
+ State->CFG.VPBB2IRBB[this] = IRBB;
executeRecipes(State, IRBB);
// Create a branch instruction to terminate IRBB if one was not created yet
// and is needed.
@@ -464,23 +472,7 @@ void VPIRBasicBlock::execute(VPTransformState *State) {
"other blocks must be terminated by a branch");
}
- for (VPBlockBase *PredVPBlock : getHierarchicalPredecessors()) {
- VPBasicBlock *PredVPBB = PredVPBlock->getExitingBasicBlock();
- BasicBlock *PredBB = State->CFG.VPBB2IRBB[PredVPBB];
- assert(PredBB && "Predecessor basic-block not found building successor.");
- LLVM_DEBUG(dbgs() << "LV: draw edge from" << PredBB->getName() << '\n');
-
- auto *PredBBTerminator = PredBB->getTerminator();
- auto *TermBr = cast<BranchInst>(PredBBTerminator);
- // Set each forward successor here when it is created, excluding
- // backedges. A backward successor is set when the branch is created.
- const auto &PredVPSuccessors = PredVPBB->getHierarchicalSuccessors();
- unsigned idx = PredVPSuccessors.front() == this ? 0 : 1;
- assert((!TermBr->getSuccessor(idx) || TermBr->getSuccessor(idx) == IRBB) &&
- "Trying to reset an existing successor block.");
- TermBr->setSuccessor(idx, IRBB);
- State->CFG.DTU.applyUpdates({{DominatorTree::Insert, PredBB, IRBB}});
- }
+ connectToPredecessors(State->CFG);
}
void VPBasicBlock::execute(VPTransformState *State) {
@@ -512,6 +504,7 @@ void VPBasicBlock::execute(VPTransformState *State) {
// predecessor of this region.
NewBB = createEmptyBasicBlock(State->CFG);
+
State->Builder.SetInsertPoint(NewBB);
// Temporarily terminate with unreachable until CFG is rewired.
UnreachableInst *Terminator = State->Builder.CreateUnreachable();
@@ -520,7 +513,12 @@ void VPBasicBlock::execute(VPTransformState *State) {
if (State->CurrentVectorLoop)
State->CurrentVectorLoop->addBasicBlockToLoop(NewBB, *State->LI);
State->Builder.SetInsertPoint(Terminator);
+
State->CFG.PrevBB = NewBB;
+ State->CFG.VPBB2IRBB[this] = NewBB;
+ connectToPredecessors(State->CFG);
+ } else {
+ State->CFG.VPBB2IRBB[this] = NewBB;
}
// 2. Fill the IR basic block with IR instructions.
@@ -541,7 +539,6 @@ void VPBasicBlock::executeRecipes(VPTransformState *State, BasicBlock *BB) {
LLVM_DEBUG(dbgs() << "LV: vectorizing VPBB:" << getName()
<< " in BB:" << BB->getName() << '\n');
- State->CFG.VPBB2IRBB[this] = BB;
State->CFG.PrevVPBB = this;
for (VPRecipeBase &Recipe : Recipes)
diff --git a/llvm/lib/Transforms/Vectorize/VPlan.h b/llvm/lib/Transforms/Vectorize/VPlan.h
index 035b9e66fd062a..ed0ea98f35a9a9 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.h
+++ b/llvm/lib/Transforms/Vectorize/VPlan.h
@@ -3539,6 +3539,10 @@ class VPBasicBlock : public VPBlockBase {
/// Execute the recipes in the IR basic block \p BB.
void executeRecipes(VPTransformState *State, BasicBlock *BB);
+ /// Connect the VPBBs predecessors' in the VPlan CFG to the IR basic block
+ /// generated for this VPBB.
+ void connectToPredecessors(VPTransformState::CFGState &CFG);
+
private:
/// Create an IR BasicBlock to hold the output instructions generated by this
/// VPBasicBlock, and return it. Update the CFGState accordingly.
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