[llvm] c93e001 - [FIX][AMDGPU] Fix test case failures that caused by reapply of #112403

Shilei Tian via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 8 17:38:51 PST 2024


Author: Shilei Tian
Date: 2024-11-08T20:38:42-05:00
New Revision: c93e001ca695e905cb965b36d63f7a348d1dd809

URL: https://github.com/llvm/llvm-project/commit/c93e001ca695e905cb965b36d63f7a348d1dd809
DIFF: https://github.com/llvm/llvm-project/commit/c93e001ca695e905cb965b36d63f7a348d1dd809.diff

LOG: [FIX][AMDGPU] Fix test case failures that caused by reapply of #112403

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
    llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
    llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
    llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
    llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
index 88a7ba7ac98928..f2a4332bcb8ba6 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
@@ -3039,7 +3039,7 @@ define amdgpu_kernel void @dyn_extract_v5f64_s_s(ptr addrspace(1) %out, i32 %sel
 ; GPRIDX-NEXT:     enable_exception = 0
 ; GPRIDX-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; GPRIDX-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GPRIDX-NEXT:     enable_sgpr_queue_ptr = 0
+; GPRIDX-NEXT:     enable_sgpr_queue_ptr = 1
 ; GPRIDX-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GPRIDX-NEXT:     enable_sgpr_dispatch_id = 1
 ; GPRIDX-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -3130,7 +3130,7 @@ define amdgpu_kernel void @dyn_extract_v5f64_s_s(ptr addrspace(1) %out, i32 %sel
 ; MOVREL-NEXT:     enable_exception = 0
 ; MOVREL-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; MOVREL-NEXT:     enable_sgpr_dispatch_ptr = 1
-; MOVREL-NEXT:     enable_sgpr_queue_ptr = 0
+; MOVREL-NEXT:     enable_sgpr_queue_ptr = 1
 ; MOVREL-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; MOVREL-NEXT:     enable_sgpr_dispatch_id = 1
 ; MOVREL-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -3222,7 +3222,7 @@ define amdgpu_kernel void @dyn_extract_v5f64_s_s(ptr addrspace(1) %out, i32 %sel
 ; GFX10-NEXT:     enable_exception = 0
 ; GFX10-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; GFX10-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GFX10-NEXT:     enable_sgpr_queue_ptr = 0
+; GFX10-NEXT:     enable_sgpr_queue_ptr = 1
 ; GFX10-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GFX10-NEXT:     enable_sgpr_dispatch_id = 1
 ; GFX10-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -3314,7 +3314,7 @@ define amdgpu_kernel void @dyn_extract_v5f64_s_s(ptr addrspace(1) %out, i32 %sel
 ; GFX11-NEXT:     enable_exception = 0
 ; GFX11-NEXT:     enable_sgpr_private_segment_buffer = 0
 ; GFX11-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GFX11-NEXT:     enable_sgpr_queue_ptr = 0
+; GFX11-NEXT:     enable_sgpr_queue_ptr = 1
 ; GFX11-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GFX11-NEXT:     enable_sgpr_dispatch_id = 1
 ; GFX11-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -4054,7 +4054,7 @@ define amdgpu_kernel void @dyn_extract_v4f32_s_s_s(ptr addrspace(1) %out, i32 %s
 ; GPRIDX-NEXT:     enable_exception = 0
 ; GPRIDX-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; GPRIDX-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GPRIDX-NEXT:     enable_sgpr_queue_ptr = 0
+; GPRIDX-NEXT:     enable_sgpr_queue_ptr = 1
 ; GPRIDX-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GPRIDX-NEXT:     enable_sgpr_dispatch_id = 1
 ; GPRIDX-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -4138,7 +4138,7 @@ define amdgpu_kernel void @dyn_extract_v4f32_s_s_s(ptr addrspace(1) %out, i32 %s
 ; MOVREL-NEXT:     enable_exception = 0
 ; MOVREL-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; MOVREL-NEXT:     enable_sgpr_dispatch_ptr = 1
-; MOVREL-NEXT:     enable_sgpr_queue_ptr = 0
+; MOVREL-NEXT:     enable_sgpr_queue_ptr = 1
 ; MOVREL-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; MOVREL-NEXT:     enable_sgpr_dispatch_id = 1
 ; MOVREL-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -4223,7 +4223,7 @@ define amdgpu_kernel void @dyn_extract_v4f32_s_s_s(ptr addrspace(1) %out, i32 %s
 ; GFX10-NEXT:     enable_exception = 0
 ; GFX10-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; GFX10-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GFX10-NEXT:     enable_sgpr_queue_ptr = 0
+; GFX10-NEXT:     enable_sgpr_queue_ptr = 1
 ; GFX10-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GFX10-NEXT:     enable_sgpr_dispatch_id = 1
 ; GFX10-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -4308,7 +4308,7 @@ define amdgpu_kernel void @dyn_extract_v4f32_s_s_s(ptr addrspace(1) %out, i32 %s
 ; GFX11-NEXT:     enable_exception = 0
 ; GFX11-NEXT:     enable_sgpr_private_segment_buffer = 0
 ; GFX11-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GFX11-NEXT:     enable_sgpr_queue_ptr = 0
+; GFX11-NEXT:     enable_sgpr_queue_ptr = 1
 ; GFX11-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GFX11-NEXT:     enable_sgpr_dispatch_id = 1
 ; GFX11-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -4399,7 +4399,7 @@ define amdgpu_kernel void @dyn_extract_v4f64_s_s_s(ptr addrspace(1) %out, i32 %s
 ; GPRIDX-NEXT:     enable_exception = 0
 ; GPRIDX-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; GPRIDX-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GPRIDX-NEXT:     enable_sgpr_queue_ptr = 0
+; GPRIDX-NEXT:     enable_sgpr_queue_ptr = 1
 ; GPRIDX-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GPRIDX-NEXT:     enable_sgpr_dispatch_id = 1
 ; GPRIDX-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -4486,7 +4486,7 @@ define amdgpu_kernel void @dyn_extract_v4f64_s_s_s(ptr addrspace(1) %out, i32 %s
 ; MOVREL-NEXT:     enable_exception = 0
 ; MOVREL-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; MOVREL-NEXT:     enable_sgpr_dispatch_ptr = 1
-; MOVREL-NEXT:     enable_sgpr_queue_ptr = 0
+; MOVREL-NEXT:     enable_sgpr_queue_ptr = 1
 ; MOVREL-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; MOVREL-NEXT:     enable_sgpr_dispatch_id = 1
 ; MOVREL-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -4574,7 +4574,7 @@ define amdgpu_kernel void @dyn_extract_v4f64_s_s_s(ptr addrspace(1) %out, i32 %s
 ; GFX10-NEXT:     enable_exception = 0
 ; GFX10-NEXT:     enable_sgpr_private_segment_buffer = 1
 ; GFX10-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GFX10-NEXT:     enable_sgpr_queue_ptr = 0
+; GFX10-NEXT:     enable_sgpr_queue_ptr = 1
 ; GFX10-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GFX10-NEXT:     enable_sgpr_dispatch_id = 1
 ; GFX10-NEXT:     enable_sgpr_flat_scratch_init = 0
@@ -4662,7 +4662,7 @@ define amdgpu_kernel void @dyn_extract_v4f64_s_s_s(ptr addrspace(1) %out, i32 %s
 ; GFX11-NEXT:     enable_exception = 0
 ; GFX11-NEXT:     enable_sgpr_private_segment_buffer = 0
 ; GFX11-NEXT:     enable_sgpr_dispatch_ptr = 1
-; GFX11-NEXT:     enable_sgpr_queue_ptr = 0
+; GFX11-NEXT:     enable_sgpr_queue_ptr = 1
 ; GFX11-NEXT:     enable_sgpr_kernarg_segment_ptr = 1
 ; GFX11-NEXT:     enable_sgpr_dispatch_id = 1
 ; GFX11-NEXT:     enable_sgpr_flat_scratch_init = 0

diff  --git a/llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll b/llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
index 96d7f02cf2422a..835e5e5f06ef0f 100644
--- a/llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
@@ -6,7 +6,7 @@
 ; OBJDUMP-NEXT: 0010 00000000 00000000 00000000 00000000  ................
 ; OBJDUMP-NEXT: 0020 00000000 00000000 00000000 00000000  ................
 ; OBJDUMP-NOT:  0030 0000af00 94130000 1a000400 00000000  ................
-; OBJDUMP-NEXT: 0030 8000af00 98130000 1a000400 00000000  ................
+; OBJDUMP-NEXT: 0030 8000af00 98130000 1e000400 00000000  ................
 
 ; ASM-LABEL: amdhsa_kernarg_preload_4_implicit_6:
 ; ASM: .amdhsa_user_sgpr_count 12

diff  --git a/llvm/test/CodeGen/AMDGPU/attributor-noopt.ll b/llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
index 90562e25a3e9c1..55ed11ac629724 100644
--- a/llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
+++ b/llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
@@ -1,6 +1,6 @@
 ; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O2 | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 | FileCheck -check-prefix=OPT %s
-; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 | FileCheck -check-prefixes=NOOPT,COV4 %s
-; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 | FileCheck -check-prefixes=NOOPT,COV5 %s
+; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 | FileCheck -check-prefix=NOOPT %s
+; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 | FileCheck -check-prefix=NOOPT %s
 
 ; Check that AMDGPUAttributor is not run with -O0.
 ; OPT: .amdhsa_user_sgpr_private_segment_buffer 1
@@ -19,8 +19,7 @@
 
 ; NOOPT: .amdhsa_user_sgpr_private_segment_buffer 1
 ; NOOPT: .amdhsa_user_sgpr_dispatch_ptr 1
-; COV4: .amdhsa_user_sgpr_queue_ptr 1
-; COV5: .amdhsa_user_sgpr_queue_ptr 0
+; NOOPT: .amdhsa_user_sgpr_queue_ptr 1
 ; NOOPT: .amdhsa_user_sgpr_kernarg_segment_ptr 1
 ; NOOPT: .amdhsa_user_sgpr_dispatch_id 1
 ; NOOPT: .amdhsa_user_sgpr_flat_scratch_init 0

diff  --git a/llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll b/llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
index 8fde0dd2d28ed4..609425329e106b 100644
--- a/llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
+++ b/llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
@@ -31,7 +31,7 @@ define hidden void @use_queue_ptr() #1 {
 
 ; GCN-LABEL: {{^}}kern_indirect_use_queue_ptr:
 ; GCN: s_swappc_b64 s[30:31], s[10:11]
-; GCN: .amdhsa_user_sgpr_queue_ptr 0
+; GCN: .amdhsa_user_sgpr_queue_ptr 1
 define amdgpu_kernel void @kern_indirect_use_queue_ptr(i32) #1 {
   call void @use_queue_ptr()
   ret void
@@ -470,7 +470,7 @@ define hidden void @use_every_sgpr_input() #1 {
 
 ; GCN: .amdhsa_user_sgpr_private_segment_buffer 1
 ; GCN: .amdhsa_user_sgpr_dispatch_ptr 1
-; GCN: .amdhsa_user_sgpr_queue_ptr 0
+; GCN: .amdhsa_user_sgpr_queue_ptr 1
 ; GCN: .amdhsa_user_sgpr_kernarg_segment_ptr 1
 ; GCN: .amdhsa_user_sgpr_dispatch_id 1
 ; GCN: .amdhsa_user_sgpr_flat_scratch_init 1
@@ -495,7 +495,7 @@ define amdgpu_kernel void @kern_indirect_use_every_sgpr_input(i8) #1 {
 
 ; GCN: .amdhsa_user_sgpr_private_segment_buffer 1
 ; GCN: .amdhsa_user_sgpr_dispatch_ptr 1
-; GCN: .amdhsa_user_sgpr_queue_ptr 0
+; GCN: .amdhsa_user_sgpr_queue_ptr 1
 ; GCN: .amdhsa_user_sgpr_kernarg_segment_ptr 0
 ; GCN: .amdhsa_user_sgpr_dispatch_id 1
 ; GCN: .amdhsa_user_sgpr_flat_scratch_init 1

diff  --git a/llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll b/llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
index 6007dede902209..ea39df0ca01e2b 100644
--- a/llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
+++ b/llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
@@ -93,7 +93,7 @@ define amdgpu_kernel void @minimal_kernel_inputs_with_stack() #0 {
 ; WORKAROUND: .amdhsa_user_sgpr_count 15
 ; NOWORKAROUND: .amdhsa_user_sgpr_count 4
 ; GCN-NEXT: .amdhsa_user_sgpr_dispatch_ptr 0
-; GCN-NEXT: .amdhsa_user_sgpr_queue_ptr 0
+; GCN-NEXT: .amdhsa_user_sgpr_queue_ptr 1
 ; GCN-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 1
 ; GCN-NEXT: .amdhsa_user_sgpr_dispatch_id 0
 ; GCN-NEXT: .amdhsa_user_sgpr_private_segment_size 0
@@ -140,7 +140,7 @@ define amdgpu_kernel void @queue_ptr() #1 {
 ; WORKAROUND: .amdhsa_user_sgpr_count 13
 ; NOWORKAROUND: .amdhsa_user_sgpr_count 8
 ; GCN-NEXT: .amdhsa_user_sgpr_dispatch_ptr 1
-; GCN-NEXT: .amdhsa_user_sgpr_queue_ptr 0
+; GCN-NEXT: .amdhsa_user_sgpr_queue_ptr 1
 ; GCN-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 1
 ; GCN-NEXT: .amdhsa_user_sgpr_dispatch_id 1
 ; GCN-NEXT: .amdhsa_user_sgpr_private_segment_size 0


        


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