[llvm] [AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (PR #115285)

[Christudasan Devadasan via llvm-commits]

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@@ -1808,6 +1808,8 @@ void SIRegisterInfo::buildSpillLoadStore(
                            .addReg(SubReg, getKillRegState(IsKill));
         if (NeedSuperRegDef)
           AccRead.addReg(ValueReg, RegState::ImplicitDefine);
+        if (NeedSuperRegImpOperand && (IsFirstSubReg || IsLastSubReg))
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cdevadas wrote:

If adding the implicit operand to all the subregs is the right approach (as currently happening in the copyPhysReg), we should fix all the paths in this function to include the same for all sub-register spill instructions.

https://github.com/llvm/llvm-project/pull/115285