[llvm] 5adb5c0 - [RISCV] Add tests for memcmp expansion
via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 5 23:12:38 PST 2024
Author: Pengcheng Wang
Date: 2024-11-06T15:12:35+08:00
New Revision: 5adb5c05a2e9f31385fbba8b0436cbc07d91a44d
URL: https://github.com/llvm/llvm-project/commit/5adb5c05a2e9f31385fbba8b0436cbc07d91a44d
DIFF: https://github.com/llvm/llvm-project/commit/5adb5c05a2e9f31385fbba8b0436cbc07d91a44d.diff
LOG: [RISCV] Add tests for memcmp expansion
We add tests for the following cases:
* Length = 0, 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, 31, 32, 63, 64, 127,
128, runtime.
* Comparisons against zero.
* RUN lines for scalar/vector w/ or w/o strict align.
* Optimize for size.
Reviewers: topperc, preames
Reviewed By: topperc, preames
Pull Request: https://github.com/llvm/llvm-project/pull/107824
Added:
llvm/test/CodeGen/RISCV/memcmp-optsize.ll
llvm/test/CodeGen/RISCV/memcmp.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/memcmp-optsize.ll b/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
new file mode 100644
index 00000000000000..2dd6750e18d922
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
@@ -0,0 +1,1281 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-ALIGNED,CHECK-ALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-ALIGNED,CHECK-ALIGNED-RV64
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zbb -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-ALIGNED,CHECK-ALIGNED-RV32-ZBB
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zbb -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-ALIGNED,CHECK-ALIGNED-RV64-ZBB
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zbkb -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-ALIGNED,CHECK-ALIGNED-RV32-ZBKB
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zbkb -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-ALIGNED,CHECK-ALIGNED-RV64-ZBKB
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-ALIGNED,CHECK-ALIGNED-RV32-V
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-ALIGNED,CHECK-ALIGNED-RV64-V
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-UNALIGNED,CHECK-UNALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-UNALIGNED,CHECK-UNALIGNED-RV64
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zbb,+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-UNALIGNED,CHECK-UNALIGNED-RV32-ZBB
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zbb,+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-UNALIGNED,CHECK-UNALIGNED-RV64-ZBB
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zbkb,+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-UNALIGNED,CHECK-UNALIGNED-RV32-ZBKB
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zbkb,+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-UNALIGNED,CHECK-UNALIGNED-RV64-ZBKB
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+unaligned-scalar-mem,+unaligned-vector-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-UNALIGNED,CHECK-UNALIGNED-RV32-V
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+unaligned-scalar-mem,+unaligned-vector-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-UNALIGNED,CHECK-UNALIGNED-RV64-V
+
+declare i32 @bcmp(ptr, ptr, iXLen) nounwind readonly
+declare i32 @memcmp(ptr, ptr, iXLen) nounwind readonly
+
+define i32 @bcmp_size_0(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_0:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 0
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_0:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 0
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 0)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_1(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_1:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 1
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_1:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 1
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 1)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_2(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_2:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 2
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_2:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 2
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 2)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_3(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_3:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 3
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_3:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 3
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 3)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_4(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_4:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_4:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_5(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_5:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 5
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_5:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 5
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 5)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_6(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_6:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 6
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_6:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 6
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 6)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_7(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_7:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 7
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_7:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 7
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 7)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_8(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_8:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 8
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_8:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 8
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 8)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_15(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_15:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 15
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_15:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 15
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 15)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_16(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_16:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 16
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_16:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 16
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 16)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_31:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 31
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_31:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 31
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 31)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_32:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 32
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_32:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 32
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 32)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_63:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 63
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_63:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 63
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 63)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_64:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 64
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_64:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 64
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 64)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_127(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_127:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 127
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_127:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 127
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 127)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_128(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_128:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 128
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_128:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 128
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 128)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_runtime(ptr %s1, ptr %s2, iXLen %len) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_size_runtime:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_runtime:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen %len)
+ ret i32 %bcmp
+}
+
+define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_eq_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: seqz a0, a0
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_eq_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: seqz a0, a0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp eq i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i1 @bcmp_lt_zero(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_lt_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: srli a0, a0, 31
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_lt_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: slti a0, a0, 0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp slt i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i1 @bcmp_gt_zero(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: bcmp_gt_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: sgtz a0, a0
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_gt_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: sgtz a0, a0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp sgt i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i32 @memcmp_size_0(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-LABEL: memcmp_size_0:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: li a0, 0
+; CHECK-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 0)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_1(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_1:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 1
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_1:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 1
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 1)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_2(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_2:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 2
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_2:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 2
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 2)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_3:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 3
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_3:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 3
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 3)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_4(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_4:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_4:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_5(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_5:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 5
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_5:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 5
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 5)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_6(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_6:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 6
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_6:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 6
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 6)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_7(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_7:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 7
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_7:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 7
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 7)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_8(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_8:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 8
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_8:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 8
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 8)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_15(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_15:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 15
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_15:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 15
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 15)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_16(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_16:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 16
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_16:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 16
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 16)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_31:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 31
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_31:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 31
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 31)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_32:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 32
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_32:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 32
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 32)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_63(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_63:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 63
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_63:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 63
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 63)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_64(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_64:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 64
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_64:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 64
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 64)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_127(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_127:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 127
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_127:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 127
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 127)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_128(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_128:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 128
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_128:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 128
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 128)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_runtime(ptr %s1, ptr %s2, iXLen %len) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_size_runtime:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_runtime:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen %len)
+ ret i32 %memcmp
+}
+
+define i1 @memcmp_eq_zero(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-ALIGNED-RV32-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV32-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV32-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV32-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV32-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV32-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV32-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV32-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV32-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV32-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV32-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV64: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV64-NEXT: lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV64-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV64-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV64-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV64-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV64-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV64-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-NEXT: lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV64-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV64-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV64-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV64-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV64-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a5, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a6, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a7, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a1, a4, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: pack a1, a2, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a0, a7, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a2, a5, a6
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: pack a0, a2, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: packh a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a5, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: packh a2, a3, a4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a5, a5, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a0, a5
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-V-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV32-V-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-V-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV32-V-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV32-V-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV32-V-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV32-V-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV32-V-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV32-V-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV32-V-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV32-V-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-V-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-V-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV64-V-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-V-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV64-V-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV64-V-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV64-V-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV64-V-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV64-V-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV64-V-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV64-V-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV64-V-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-V-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-V-NEXT: ret
+;
+; CHECK-UNALIGNED-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED: # %bb.0: # %entry
+; CHECK-UNALIGNED-NEXT: lw a1, 0(a1)
+; CHECK-UNALIGNED-NEXT: lw a0, 0(a0)
+; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp eq i32 %memcmp, 0
+ ret i1 %ret
+}
+
+define i1 @memcmp_lt_zero(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_lt_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: srli a0, a0, 31
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_lt_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: slti a0, a0, 0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp slt i32 %memcmp, 0
+ ret i1 %ret
+}
+
+define i1 @memcmp_gt_zero(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-RV32-LABEL: memcmp_gt_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: sgtz a0, a0
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_gt_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: sgtz a0, a0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp sgt i32 %memcmp, 0
+ ret i1 %ret
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-ALIGNED: {{.*}}
+; CHECK-UNALIGNED-RV32: {{.*}}
+; CHECK-UNALIGNED-RV32-V: {{.*}}
+; CHECK-UNALIGNED-RV32-ZBB: {{.*}}
+; CHECK-UNALIGNED-RV32-ZBKB: {{.*}}
+; CHECK-UNALIGNED-RV64: {{.*}}
+; CHECK-UNALIGNED-RV64-V: {{.*}}
+; CHECK-UNALIGNED-RV64-ZBB: {{.*}}
+; CHECK-UNALIGNED-RV64-ZBKB: {{.*}}
diff --git a/llvm/test/CodeGen/RISCV/memcmp.ll b/llvm/test/CodeGen/RISCV/memcmp.ll
new file mode 100644
index 00000000000000..b156d5453a3958
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/memcmp.ll
@@ -0,0 +1,1281 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-ALIGNED,CHECK-ALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-ALIGNED,CHECK-ALIGNED-RV64
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zbb -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-ALIGNED,CHECK-ALIGNED-RV32-ZBB
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zbb -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-ALIGNED,CHECK-ALIGNED-RV64-ZBB
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zbkb -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-ALIGNED,CHECK-ALIGNED-RV32-ZBKB
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zbkb -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-ALIGNED,CHECK-ALIGNED-RV64-ZBKB
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-ALIGNED,CHECK-ALIGNED-RV32-V
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-ALIGNED,CHECK-ALIGNED-RV64-V
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-UNALIGNED,CHECK-UNALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-UNALIGNED,CHECK-UNALIGNED-RV64
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zbb,+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-UNALIGNED,CHECK-UNALIGNED-RV32-ZBB
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zbb,+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-UNALIGNED,CHECK-UNALIGNED-RV64-ZBB
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zbkb,+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-UNALIGNED,CHECK-UNALIGNED-RV32-ZBKB
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zbkb,+unaligned-scalar-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-UNALIGNED,CHECK-UNALIGNED-RV64-ZBKB
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+unaligned-scalar-mem,+unaligned-vector-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32,CHECK-UNALIGNED,CHECK-UNALIGNED-RV32-V
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+unaligned-scalar-mem,+unaligned-vector-mem -O2 \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,CHECK-UNALIGNED,CHECK-UNALIGNED-RV64-V
+
+declare i32 @bcmp(ptr, ptr, iXLen) nounwind readonly
+declare i32 @memcmp(ptr, ptr, iXLen) nounwind readonly
+
+define i32 @bcmp_size_0(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_0:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 0
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_0:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 0
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 0)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_1(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_1:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 1
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_1:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 1
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 1)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_2(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_2:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 2
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_2:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 2
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 2)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_3(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_3:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 3
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_3:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 3
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 3)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_4(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_4:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_4:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_5(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_5:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 5
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_5:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 5
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 5)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_6(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_6:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 6
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_6:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 6
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 6)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_7(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_7:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 7
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_7:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 7
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 7)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_8(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_8:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 8
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_8:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 8
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 8)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_15(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_15:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 15
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_15:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 15
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 15)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_16(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_16:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 16
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_16:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 16
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 16)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_31:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 31
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_31:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 31
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 31)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_32:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 32
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_32:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 32
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 32)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_63:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 63
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_63:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 63
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 63)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_64:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 64
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_64:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 64
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 64)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_127(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_127:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 127
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_127:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 127
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 127)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_128(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_128:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 128
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_128:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 128
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 128)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_runtime(ptr %s1, ptr %s2, iXLen %len) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_runtime:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_runtime:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen %len)
+ ret i32 %bcmp
+}
+
+define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_eq_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: seqz a0, a0
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_eq_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: seqz a0, a0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp eq i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i1 @bcmp_lt_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_lt_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: srli a0, a0, 31
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_lt_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: slti a0, a0, 0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp slt i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i1 @bcmp_gt_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: bcmp_gt_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: sgtz a0, a0
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_gt_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: sgtz a0, a0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp sgt i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i32 @memcmp_size_0(ptr %s1, ptr %s2) nounwind {
+; CHECK-LABEL: memcmp_size_0:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: li a0, 0
+; CHECK-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 0)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_1(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_1:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 1
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_1:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 1
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 1)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_2(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_2:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 2
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_2:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 2
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 2)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_3:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 3
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_3:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 3
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 3)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_4(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_4:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_4:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_5(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_5:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 5
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_5:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 5
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 5)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_6(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_6:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 6
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_6:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 6
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 6)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_7(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_7:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 7
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_7:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 7
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 7)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_8(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_8:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 8
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_8:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 8
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 8)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_15(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_15:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 15
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_15:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 15
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 15)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_16(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_16:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 16
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_16:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 16
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 16)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_31(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_31:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 31
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_31:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 31
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 31)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_32(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_32:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 32
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_32:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 32
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 32)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_63(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_63:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 63
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_63:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 63
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 63)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_64(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_64:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 64
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_64:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 64
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 64)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_127(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_127:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 127
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_127:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 127
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 127)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_128(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_128:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 128
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_128:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 128
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 128)
+ ret i32 %memcmp
+}
+
+define i32 @memcmp_size_runtime(ptr %s1, ptr %s2, iXLen %len) nounwind {
+; CHECK-RV32-LABEL: memcmp_size_runtime:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_size_runtime:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen %len)
+ ret i32 %memcmp
+}
+
+define i1 @memcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV32-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV32-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV32-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV32-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV32-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV32-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV32-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV32-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV32-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV32-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV64: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV64-NEXT: lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV64-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV64-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV64-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV64-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV64-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV64-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-NEXT: lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV64-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV64-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV64-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV64-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV64-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a5, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a6, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a7, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a1, a4, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: pack a1, a2, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a0, a7, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a2, a5, a6
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: pack a0, a2, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: packh a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a5, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: packh a2, a3, a4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a5, a5, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a0, a5
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-V-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV32-V-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-V-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV32-V-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV32-V-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV32-V-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV32-V-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV32-V-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV32-V-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV32-V-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV32-V-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-V-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-V-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a2, 1(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a4, 2(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: slli a2, a2, 8
+; CHECK-ALIGNED-RV64-V-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-V-NEXT: slli a4, a4, 16
+; CHECK-ALIGNED-RV64-V-NEXT: slli a1, a1, 24
+; CHECK-ALIGNED-RV64-V-NEXT: or a1, a1, a4
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a3, 0(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a4, 1(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: or a1, a1, a2
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: slli a4, a4, 8
+; CHECK-ALIGNED-RV64-V-NEXT: or a3, a4, a3
+; CHECK-ALIGNED-RV64-V-NEXT: slli a2, a2, 16
+; CHECK-ALIGNED-RV64-V-NEXT: slli a0, a0, 24
+; CHECK-ALIGNED-RV64-V-NEXT: or a0, a0, a2
+; CHECK-ALIGNED-RV64-V-NEXT: or a0, a0, a3
+; CHECK-ALIGNED-RV64-V-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-V-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-V-NEXT: ret
+;
+; CHECK-UNALIGNED-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED: # %bb.0: # %entry
+; CHECK-UNALIGNED-NEXT: lw a1, 0(a1)
+; CHECK-UNALIGNED-NEXT: lw a0, 0(a0)
+; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp eq i32 %memcmp, 0
+ ret i1 %ret
+}
+
+define i1 @memcmp_lt_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_lt_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: srli a0, a0, 31
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_lt_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: slti a0, a0, 0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp slt i32 %memcmp, 0
+ ret i1 %ret
+}
+
+define i1 @memcmp_gt_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-RV32-LABEL: memcmp_gt_zero:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: li a2, 4
+; CHECK-RV32-NEXT: call memcmp
+; CHECK-RV32-NEXT: sgtz a0, a0
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: memcmp_gt_zero:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: li a2, 4
+; CHECK-RV64-NEXT: call memcmp
+; CHECK-RV64-NEXT: sgtz a0, a0
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
+entry:
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp sgt i32 %memcmp, 0
+ ret i1 %ret
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-ALIGNED: {{.*}}
+; CHECK-UNALIGNED-RV32: {{.*}}
+; CHECK-UNALIGNED-RV32-V: {{.*}}
+; CHECK-UNALIGNED-RV32-ZBB: {{.*}}
+; CHECK-UNALIGNED-RV32-ZBKB: {{.*}}
+; CHECK-UNALIGNED-RV64: {{.*}}
+; CHECK-UNALIGNED-RV64-V: {{.*}}
+; CHECK-UNALIGNED-RV64-ZBB: {{.*}}
+; CHECK-UNALIGNED-RV64-ZBKB: {{.*}}
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