[llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)

[Craig Topper via llvm-commits]

Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>
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In-Reply-To: <llvm.org/llvm/llvm-project/pull/114784 at github.com>


topperc wrote:

> We (the IRTranslator) blindly translate `fneg` from LLVM-IR into G_FNEG. We state `def : GINodeEquiv<G_FNEG, fneg>; `. I believe there is not much space than adding fneg patterns.

SelectionDAG also creates ISD::FNEG in SelectionDAGBuilder, but AArch64 explicitly Custom lowers ISD::FNEG for scalable vectors using a function call `LowerToPredicatedOp`.

https://github.com/llvm/llvm-project/pull/114784