The Week Of Monday 28 October 2024 Archives by thread
Starting: Mon Oct 28 00:02:46 PDT 2024
Ending: Sun Nov 3 22:55:30 PST 2024
Messages: 5769
- [clang] [llvm] [RISCV]Add svvptc extension (PR #113758)
Pengcheng Wang via llvm-commits
- [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)
Aiden Grossman via llvm-commits
- [llvm] [RISCV] Fix typo in UserGuides.rst. NFC (PR #113861)
Brandon Wu via llvm-commits
- [llvm] [Test] Fix usage of constrained intrinsics (PR #113523)
Serge Pavlov via llvm-commits
- [llvm] 819abe4 - [Test] Fix usage of constrained intrinsics (#113523)
via llvm-commits
- [llvm] [InstCombine] Don't check uses of constant exprs (PR #113684)
Yingwei Zheng via llvm-commits
- [llvm] 5155c38 - [InstCombine] Don't check uses of constant exprs (#113684)
via llvm-commits
- [llvm] [X86][AVX512] Use comx for compare (PR #113567)
Phoebe Wang via llvm-commits
- [lld] [lld][LoongArch] Relax R_LARCH_PCALA_HI20 and R_LARCH_PCALA_LO12 (PR #112696)
via llvm-commits
- [llvm] fd85761 - [X86][BF16] Customize VSELECT for BF16 under AVX-NECONVERT (#113322)
via llvm-commits
- [llvm] [X86][BF16] Customize VSELECT for BF16 under AVX-NECONVERT (PR #113322)
Phoebe Wang via llvm-commits
- [llvm] [CodeGen] [AMDGPU] Attempt DAGCombine for fmul with select to ldexp (PR #111109)
Vikash Gupta via llvm-commits
- [llvm] [CodeGen] [AMDGPU] Adds pre-commit test for fmul-select combine (PR #111107)
Vikash Gupta via llvm-commits
- [compiler-rt] fix missing include for `abort` in `FuzzedDataProvider.h` (PR #113872)
Takuto Ikuta via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegisterUsageInfo to NPM (PR #113873)
Akshat Oke via llvm-commits
- [llvm] [RISCV] Use vsetvli instead of vlenb in Prologue/Epilogue (PR #113756)
Kito Cheng via llvm-commits
- [llvm] [CodeGen][NewPM] Port TailDuplicate pass to NPM (PR #113293)
Akshat Oke via llvm-commits
- [llvm] [mlir] [mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (PR #113799)
Corentin Ferry via llvm-commits
- [llvm] e7f422d - Add clang::lifetimebound annotation to ArrayRef constructors. (#113547)
via llvm-commits
- [llvm] Add clang::lifetimebound annotation to ArrayRef constructors. (PR #113547)
Haojian Wu via llvm-commits
- [llvm] 35f6cc6 - [RISCV] Add the Sha extension (#113820)
via llvm-commits
- [clang] [llvm] [RISCV] Add the Sha extension (PR #113820)
Alex Bradbury via llvm-commits
- [llvm] [SLP][AArch64][NFC] Add more tests for SLP vectorization of div (PR #113876)
Sushant Gokhale via llvm-commits
- [llvm] Add clang::lifetimebound annotation to StringRef constructors. (PR #113878)
Haojian Wu via llvm-commits
- [llvm] a4fd3db - [AMDGPU] Use wider loop lowering type for LowerMemIntrinsics (#112332)
via llvm-commits
- [llvm] [AMDGPU] Use wider loop lowering type for LowerMemIntrinsics (PR #112332)
Fabian Ritter via llvm-commits
- [llvm] [RegAlloc][RISCV] Increase the spill weight by target factor (PR #113675)
Pengcheng Wang via llvm-commits
- [llvm] [llvm-objdump] Fix coloring with nested WithMarkup (PR #113834)
James Henderson via llvm-commits
- [llvm] [SLP] NFC. Replace TreeEntry::setOperandsInOrder with VLOperands. (PR #113880)
Han-Kuan Chen via llvm-commits
- [llvm] 86f76c3 - [AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (#112171)
via llvm-commits
- [libunwind] [llvm] [AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (PR #112171)
Jack Styles via llvm-commits
- [clang] [compiler-rt] [llvm] [X86] Support -march=diamondrapids (PR #113881)
Freddy Ye via llvm-commits
- [llvm] [llvm] Fix __builtin_object_size interaction between Negative Offset … (PR #111827)
via llvm-commits
- [llvm] [llvm-objdump] Handle -M for --macho (PR #113795)
James Henderson via llvm-commits
- [llvm] [NFC] [CMake] Add -Wno-dangling-else for GCC built unittests (PR #112817)
James Henderson via llvm-commits
- [llvm] [LoongArch] Pass 'half' in the lower 16 bits of an f32 value with F/D ABI (PR #109368)
Trevor Gross via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly for PMLAL/PMULL instructions (PR #113564)
via llvm-commits
- [clang] [llvm] [X86] Support SM4 EVEX version intrinsics/instructions. (PR #113402)
LLVM Continuous Integration via llvm-commits
- [compiler-rt] [llvm] Add explicit symbol visibility macros to InstrProfData.inc (PR #110732)
Vassil Vassilev via llvm-commits
- [compiler-rt] d7ca703 - Add explicit symbol visibility macros to InstrProfData.inc (#110732)
via llvm-commits
- [llvm] [Remarks] Fix missing include in HotnessThresholdParser for Expected (PR #113755)
Vassil Vassilev via llvm-commits
- [llvm] 14171b0 - [Remarks] Fix missing include in HotnessThresholdParser for Expected (#113755)
via llvm-commits
- [lldb] [llvm] [DebugInfo] Add explicit visibility macros to CodeView template functions (PR #113102)
Vassil Vassilev via llvm-commits
- [clang] [llvm] [RISCV]Add svvptc extension (PR #113882)
via llvm-commits
- [compiler-rt] f6b513a - Revert "Add explicit symbol visibility macros to InstrProfData.inc (#110732)"
Vassil Vassilev via llvm-commits
- [llvm] [IR] Add `llvm.sincos` intrinsic (PR #109825)
Sander de Smalen via llvm-commits
- [llvm] dff114b - [ARM] Optimise non-ABI frame pointers (#110286)
via llvm-commits
- [llvm] [ARM] Optimise non-ABI frame pointers (PR #110286)
Oliver Stannard via llvm-commits
- [llvm] [lineeditor] Add `setHistorySize()` method for adjusting history size (PR #110092)
Vassil Vassilev via llvm-commits
- [llvm] [PAuthLR] Fix Unannoted Fallthrough (PR #113883)
Jack Styles via llvm-commits
- [llvm] 933a566 - [PAuthLR] Add Missing Break Statement for MachineOperand Switch Statement (#113883)
via llvm-commits
- [llvm] [RISCV] Separate HW/SW shadow stack on RISC-V (PR #112478)
Jesse Huang via llvm-commits
- [llvm] [reland][libc][bazel] Enable software prefetching for memcpy (PR #113886)
Guillaume Chatelet via llvm-commits
- [llvm] [VPlan] Refine the debug location passing for VPWidenIntrinsicRecipe (PR #113887)
Mel Chen via llvm-commits
- [llvm] 43a5719 - [RISCV] Use Sha extension in RVA23S64 profile (#113823)
via llvm-commits
- [clang] [llvm] [RISCV] Use Sha extension in RVA23S64 profile (PR #113823)
Alex Bradbury via llvm-commits
- [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove features which can be expressed as a combination of others. (PR #113580)
Alexandros Lamprineas via llvm-commits
- [llvm] [VPlan] Dispatch to multiple exit blocks via middle blocks. (PR #112138)
Florian Hahn via llvm-commits
- [llvm] [RDF] Fix cover check when linking refs to defs (PR #113888)
Yashas Andaluri via llvm-commits
- [llvm] 96f5c68 - [RISCV] Lower @llvm.experimental.vector.compress for zvfhmin/zvfbfmin (#113770)
via llvm-commits
- [llvm] [RISCV] Lower @llvm.experimental.vector.compress for zvfhmin/zvfbfmin (PR #113770)
Luke Lau via llvm-commits
- [llvm] [LSR][NFC] Use range-based `for` (PR #113889)
Piotr Fusik via llvm-commits
- [llvm] [SystemZ] SLP reductions: cost functions of reductions and scalarization (PR #112491)
Jonas Paulsson via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang] Introduce diagnostics suppression mappings (PR #112517)
kadir çetinkaya via llvm-commits
- [llvm] fa4790e - [AMDGPU][MC] Fix disassembler for VIMAGE when non-first vaddr is v0 (#113569)
via llvm-commits
- [llvm] [AMDGPU][MC] Fix disassembler for VIMAGE when non-first vaddr is v0 (PR #113569)
Mirko Brkušanin via llvm-commits
- [llvm] f78610a - [InstCombine] Add function attribute `instcombine-no-verify-fixpoint` (#113822)
via llvm-commits
- [llvm] [InstCombine] Add function attribute `instcombine-no-verify-fixpoint` (PR #113822)
Yingwei Zheng via llvm-commits
- [llvm] [VPlan] Refine the constructor of VPWidenIntrinsicRecipe. nfc (PR #113890)
Mel Chen via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for widening integer mul-add instructions (PR #112219)
Luke Lau via llvm-commits
- [llvm] [LV] Add initial support for vectorizing literal struct return values (PR #109833)
Benjamin Maxwell via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for integer multiply-add instructions (PR #112216)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add DestEEW = EEW1 to VMADC. (PR #113013)
Luke Lau via llvm-commits
- [llvm] [DO NOT MERGE] Test libc++ CI LLDB DAP failures (PR #113891)
Michael Buch via llvm-commits
- [clang] [compiler-rt] [XRay] Remove reliance on default PIC behavior in DSO tests (PR #113892)
Sebastian Kreutzer via llvm-commits
- [llvm] GlobalISel/MachineIRBuilder: Construct DstOp with VRegAttrs (PR #113581)
Petar Avramovic via llvm-commits
- [llvm] [ORC] Add signext on @sum() arguments in test. (PR #113308)
Jonas Paulsson via llvm-commits
- [llvm] [FuncSpec] Enable SpecializeLiteralConstant by default (PR #113442)
Hari Limaye via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Alexandros Lamprineas via llvm-commits
- [clang] [llvm] [RISCV] Mark pointer masking extensions as non-experimental (PR #113618)
Luke Lau via llvm-commits
- [llvm] f5d8a48 - [RISCV] Fix typo in UserGuides.rst. NFC (#113861)
via llvm-commits
- [llvm] [SystemZ] Silence compiler warning (PR #113894)
Jonas Paulsson via llvm-commits
- [llvm] 09160a9 - [SystemZ] Silence compiler warning (#113894)
via llvm-commits
- [llvm] 6414894 - [AArch64] Add assembly/disassembly for zeroing SVE2 integer instructions (#113473)
via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly for zeroing SVE2 integer instructions (PR #113473)
via llvm-commits
- [llvm] [GlobalISel] Combine G_ZEXT of undef -> 0 (PR #113764)
Thorsten Schütt via llvm-commits
- [llvm] [mlir] Fix CMake dependencies on mlir-linalg-ods-yaml-gen (PR #113565)
Thomas Preud'homme via llvm-commits
- [llvm] InstCombine: Fold shufflevector(select) and shufflevector(phi) (PR #113746)
Simon Pilgrim via llvm-commits
- [llvm] [Exegesis] Implemented strategy for load operation (PR #113458)
via llvm-commits
- [llvm] [AArch64] Add getStreamingHazardSize() to AArch64Subtarget (PR #113679)
Benjamin Maxwell via llvm-commits
- [llvm] [AArch64][SVE] Use SVE for scalar FP converts in streaming[-compatible] functions (PR #112564)
Benjamin Maxwell via llvm-commits
- [llvm] [AArch64]Add convert and multiply-add SIMD&FP assembly/disassembly in… (PR #113296)
via llvm-commits
- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
via llvm-commits
- [clang] [llvm] Ci wrapper (PR #113896)
David Spickett via llvm-commits
- [clang] [llvm] Implement operand bundles for floating-point operations (PR #109798)
Serge Pavlov via llvm-commits
- [lldb] [llvm] [lldb-dap] Support column breakpoints (PR #113787)
Adrian Vogelsgesang via llvm-commits
- [compiler-rt] [llvm] Add extendhfxf2 into compiler rt (PR #113897)
B I Mohammed Abbas via llvm-commits
- [llvm] [RISCV] Remove support for pre-RA vsetvli insertion (PR #110796)
Luke Lau via llvm-commits
- [llvm] 0cbccb1 - [RISCV] Remove support for pre-RA vsetvli insertion (#110796)
via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly for FMOP4{A,S} (non-widening) double-precision instructions (PR #113345)
Jonathan Thackray via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly for FMOP4{A,S} (non-widening) half-precision instructions (PR #113343)
Jonathan Thackray via llvm-commits
- [llvm] [FuncSpec] Improve accounting of specialization codesize growth (PR #113448)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly of FMOP4{A,S} (non-widening) single-precision instructions (PR #113344)
Jonathan Thackray via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
Jonathan Thackray via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
Jonathan Thackray via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Add asssembly/disassembly for FMOP4{A, S} (widening, 2-way, FP16 to FP32) instructions (PR #113346)
Momchil Velikov via llvm-commits
- [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)
via llvm-commits
- [llvm] [MSan] Update 32-bit test checks (PR #112401)
via llvm-commits
- [llvm] 056cf93 - [DAG] Fold (and X, (bswap/bitreverse (not Y))) -> (and X, (not (bswap/bitreverse Y))) (#112547)
via llvm-commits
- [llvm] [DAG] Fold (and X, (bswap/bitreverse (not Y))) -> (and X, (not (bswap/bitreverse Y))) (PR #112547)
Simon Pilgrim via llvm-commits
- [llvm] 75c75fc - [RISCV]Add svvptc extension (#113882)
via llvm-commits
- [llvm] 233e64d - [gn build] Port 0be1883c36fc
LLVM GN Syncbot via llvm-commits
- [llvm] cbaecb5 - [gn build] Port 3d6923dbac16
LLVM GN Syncbot via llvm-commits
- [llvm] 595ec4e - [gn build] Port 5aa1275d03b6
LLVM GN Syncbot via llvm-commits
- [llvm] 2a4bab3 - [gn build] Port cfde4fbccf5d
LLVM GN Syncbot via llvm-commits
- [llvm] 1164bd7 - [gn build] Port e146c1867e8d
LLVM GN Syncbot via llvm-commits
- [llvm] [RISCV] Account for factor in interleave memory op costs (PR #111511)
Luke Lau via llvm-commits
- [flang] [llvm] [flang][OpenMP] Update handling of DEPEND clause (PR #113620)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)
Kiran Chandramohan via llvm-commits
- [llvm] [llvm-exegesis] Add Pfm Counters for SapphireRapids (PR #113847)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Simon Pilgrim via llvm-commits
- [llvm] [VPlan] Reverse instruction cost calculation for recipes in the VPBasicblock. (PR #113902)
Elvis Wang via llvm-commits
- [llvm] [CostModel][LoopVectorize] Move some loop vectoriser tests (PR #113702)
Simon Pilgrim via llvm-commits
- [llvm] [RISCV] fix SP recovery in a function epilogue (PR #110809)
via llvm-commits
- [clang] [llvm] [RISCV] Mark the RVA23S64 and RVA23U64 profiles as non-experimental (PR #113826)
Alex Bradbury via llvm-commits
- [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Elvis Wang via llvm-commits
- [llvm] ba7555e - [RISCV] Mark the RVA23S64 and RVA23U64 profiles as non-experimental (#113826)
via llvm-commits
- [clang] [llvm] [HLSL] Re-implement countbits with the correct return type (PR #113189)
Simon Pilgrim via llvm-commits
- [llvm] ddd463b - [AArch64] Add getStreamingHazardSize() to AArch64Subtarget (#113679)
via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Fix crash with thread local storage. (PR #113904)
Carlos Alberto Enciso via llvm-commits
- [llvm] https://github.com/llvm/llvm-project/pull/113567 (PR #113905)
via llvm-commits
- [llvm] Add DILabel functions for LLVM-C (PR #112840)
via llvm-commits
- [llvm] [LoopVectorize][NFC] Rewrite tests to check output of vplan cost model (PR #113697)
David Green via llvm-commits
- [llvm] 9090430 - Add clang::lifetimebound annotation to StringRef constructors. (#113878)
via llvm-commits
- [llvm] [ADT] Teach StringRef to derive from std::string_view (PR #113752)
Aaron Ballman via llvm-commits
- [llvm] [AMDGPU][True16][test] update VOPC/VOPCX test for true16/fake16 (PR #112829)
Brox Chen via llvm-commits
- [llvm] [DAGCombiner] Add combine avg from shifts (PR #113909)
via llvm-commits
- [llvm] [RISCV] Refactor FP, SP and RA in RISCVFrameLowering.cpp. NFC (PR #113818)
Mark Zhuang via llvm-commits
- [compiler-rt] [compiler-rt] Replace direct calls to pipe with internal_pipe (PR #97186)
Sirui Mu via llvm-commits
- [llvm] Adding more vector calls for -fveclib=AMDLIBM (PR #109662)
Simon Pilgrim via llvm-commits
- [llvm] [clang] Deduplicate the logic between StringMapEntry.first() and StringMapEntry.getKey() (PR #113735)
Boaz Brickner via llvm-commits
- [llvm] [CGData] Stable Function Map (PR #112662)
Kyungwoo Lee via llvm-commits
- [llvm] [X86] Insert CALLSEQ when lowering GlobalTLSAddress for ELF targets (PR #113706)
Fabian Ritter via llvm-commits
- [clang] [llvm] [PAC][ELF][AArch64] Support signed personality function pointer (PR #113148)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld] Test warning emitted for non-PAuth-marked files with `-z pac-plt` (PR #112958)
Daniil Kovalev via llvm-commits
- [llvm] ce0368e - [AArch64] Add assembly/disassembly for PMLAL/PMULL instructions (#113564)
via llvm-commits
- [llvm] 7152bf3 - [SLP]Do not create new vector node if scalars fully overlap with the existing one
Alexey Bataev via llvm-commits
- [llvm] disable test for AIX, z/OS due to missing DWARF sections (PR #113910)
Abhina Sree via llvm-commits
- [llvm] [BOLT] Abort on out-of-section symbols in GOT (PR #100801)
Paschalis Mpeis via llvm-commits
- [flang] [llvm] [mlir] [flang][OpenMP][MLIR] Add MLIR op for loop directive (PR #113911)
Kareem Ergawy via llvm-commits
- [clang] [llvm] [clang][LLVM Demangler] Add a diagnostic that validates that all mang… (PR #111391)
Viktoriia Bakalova via llvm-commits
- [llvm] [Backend] Add clearSubtargetMap API for TargetMachine. (PR #112383)
weiwei chen via llvm-commits
- [llvm] 42eb54b - [Clang] Put offloading globals in the `.llvm.rodata.offloading` section (#111890)
via llvm-commits
- [clang] [llvm] [Clang] Put offloading globals in the `.llvm.rodata.offloading` section (PR #111890)
Joseph Huber via llvm-commits
- [llvm] [AMDGPU] Add Wave Reduce Intrinsics for i32 type (PR #111342)
Pravin Jagtap via llvm-commits
- [llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)
Alexey Bataev via llvm-commits
- [llvm] [AArch64] Add patterns for constructive splice. (PR #113912)
Sander de Smalen via llvm-commits
- [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)
Callum Fare via llvm-commits
- [llvm] [VPlan] Use ResumePhi to create reduction resume phis. (PR #110004)
Florian Hahn via llvm-commits
- [llvm] Revert "AMDGPU/GlobalISel: Add stub custom regbankselect pass" (PR #113913)
Petar Avramovic via llvm-commits
- [llvm] AMDGPU/GlobalISel: Add skeletons for new register bank select passes (PR #112862)
Petar Avramovic via llvm-commits
- [llvm] [LV][EVL] Support call instruction with EVL-vectorization (PR #110412)
Alexey Bataev via llvm-commits
- [llvm] [LV][EVL] Support icmp/fcmp instruction with EVL-vectorization (PR #108533)
Alexey Bataev via llvm-commits
- [llvm] [SCEV] Collect and merge loop guards through PHI nodes with multiple incoming values (PR #113915)
Julian Nagele via llvm-commits
- [llvm] [AArch64] Add assembly/disassembly for zeroing SVE FCVT{X} and BFCVT (PR #113916)
via llvm-commits
- [clang] [llvm] [RISCV] Mark RVB23U64 and RVB23S64 as non-experimental (PR #113918)
Alex Bradbury via llvm-commits
- [llvm] [PowerPC] Add custom lowering for ssubo (PR #111748)
Zaara Syeda via llvm-commits
- [flang] [llvm] [mlir] [Flang][OpenMP] Update MapInfoFinalization to use BlockArgs Interface… (PR #113919)
via llvm-commits
- [compiler-rt] [llvm] Revert "[runtimes] Allow building against an installed LLVM tree" (PR #113920)
Nikolas Klauser via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
Paul Walker via llvm-commits
- [llvm] [TableGen] [NFC] Remove Unused Imports in TableGen BE (PR #113725)
Jerry Sun via llvm-commits
- [llvm] 40363d5 - [RISCV] Add cost model tests for fp rounding ops for bf16. NFC
Luke Lau via llvm-commits
- [clang] [llvm] [X86][AMX] Support AMX-TRANSPOSE (PR #113532)
Feng Zou via llvm-commits
- [llvm] c9f01f6 - [SLP][AArch64][NFC] Add more tests for SLP vectorization of div (#113876)
via llvm-commits
- [llvm] [llvm][Support] Enable pass timing in StandardInstrumentations constr… (PR #108983)
Tarun Prabhu via llvm-commits
- [llvm] AMDGPU: Treat uint32_max as the default value for amdgpu-max-num-workgroups (PR #113751)
Krzysztof Drewniak via llvm-commits
- [llvm] [BOLT] Extend profile stats pass (PR #96969)
via llvm-commits
- [llvm] [BOLT][X86]Redirect never-taken jumps (PR #113923)
via llvm-commits
- [llvm] [RISCV] Mark f16/bf16 lrint and llrint cost as invalid (PR #113924)
Luke Lau via llvm-commits
- [llvm] [llvm-cov] Fix branch counts of template functions (#111743) (PR #113925)
via llvm-commits
- [llvm] [NFC][DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Infrastructure to collect shader flags for each function (PR #112967)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] Add support for single reductions in ComplexDeinterleavingPass (PR #112875)
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- [llvm] [VPlan] Introduce scalar loop header in plan, remove VPLiveOut. (PR #109975)
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- [llvm] 94e7d9c - [RISCV] Remove Zvk* dependency checks from RISCVISAInfo::checkDependency.
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- [llvm] 9a7519f - Revert "[NFC][AMDGPU][Attributor] Exit earlier if entry CC (#114177)"
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James Henderson via llvm-commits
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Jay Foad via llvm-commits
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Paul Osmialowski via llvm-commits
- [llvm] 0394888 - Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFC
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- [llvm] f7b5f0c - [DAG] Fold (and X, (rot (not Y), Z)) -> (and X, (not (rot Y, Z)))
Simon Pilgrim via llvm-commits
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Jay Foad via llvm-commits
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- [llvm] cea9dd8 - [CodeGen] Change MachineInstr::isConstantValuePHI to return Register. NFC. (#112901)
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Stephen Tozer via llvm-commits
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Stephen Tozer via llvm-commits
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Simon Pilgrim via llvm-commits
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Jay Foad via llvm-commits
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Stephen Tozer via llvm-commits
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- [llvm] [DebugInfo][SimplifyCFG] Fully propagate merged invoke DILocations (PR #114235)
Stephen Tozer via llvm-commits
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Valery Pykhtin via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Rahul Joshi via llvm-commits
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Tom Eccles via llvm-commits
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Pavel Labath via llvm-commits
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Nathan Gauër via llvm-commits
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Stephen Tozer via llvm-commits
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Teresa Johnson via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Mark Zhuang via llvm-commits
- [llvm] 4015e18 - [AArch64] Add assembly/disassembly for BFMOP4{A,S} (non-widening) instructions (#113342)
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Hari Limaye via llvm-commits
- [llvm] f405c68 - [OPT] Search whole BB for convergence token. (#112728)
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- [llvm] e989e31 - [RISCV] Mark f16/bf16 lrint and llrint cost as invalid (#113924)
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- [llvm] [CodeGen] Avoid sinking vector comparisons during CodeGenPrepare (PR #113158)
David Sherwood via llvm-commits
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Yingwei Zheng via llvm-commits
- [llvm] 475e736 - [MemProf] Include <ctime> to avoid MSVC failure (#114246)
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- [llvm] 72b1153 - [GlobalISel] Import samesign flag (#113090)
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Jonas Paulsson via llvm-commits
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- [llvm] 4c03d37 - [SPIR-V] Fix broken test due to G_BITCAST (#114242)
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- [clang] [llvm] [llvm] Allow always dropping all llvm.type.test sequences (PR #112787)
Paul Kirth via llvm-commits
- [llvm] [RISCV] Cost ordered bf16/f16 w/ zvfhmin reductions as invalid (PR #114250)
Luke Lau via llvm-commits
- [llvm] [CostModel][X86] Add initial costs for non-lane-crossing one/two input shuffles (PR #114254)
Simon Pilgrim via llvm-commits
- [clang] [llvm] [Clang] restrict use of attribute names reserved by the C++ standard (PR #106036)
Oleksandr T. via llvm-commits
- [llvm] Revert "[GlobalISel] Import samesign flag" (PR #114256)
Thorsten Schütt via llvm-commits
- [llvm] 4b02877 - Revert "[GlobalISel] Import samesign flag" (#114256)
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- [libcxxabi] [llvm] [demangler] Enhance demangling in llvm-cxxfilt for fixed-point types. (PR #114257)
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- [llvm] [AArch64] Add assembly/disassembly for {S,SU,US,U}MOP4{A,S} instructions (PR #113349)
Jonathan Thackray via llvm-commits
- [llvm] 8ee5e19 - [AMDGPU] Fix @llvm.amdgcn.cs.chain with SGPR args not provably uniform (#114232)
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- [llvm] 1ddea4f - [AArch64] NFC: Refactoring of the SubRegIndexes in AArch64RegisterInfo.td
Sander de Smalen via llvm-commits
- [llvm] 6bf4476 - [AMDGPU] Fix @llvm.amdgcn.cs.chain with callee not provably uniform (#114200)
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- [llvm] [Bolt] Fix address translation for KASLR kernel (PR #114261)
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- [llvm] [SimplifyCFG] Simplify switch instruction that has duplicate arms (PR #114262)
Michael Maitland via llvm-commits
- [llvm] 0227b73 - [AMDGPU][True16][test] update VOP2 asm/dasm file with true16/fake16 (#113101)
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- [llvm] 311c077 - [AMDGPU] Fix test failures after #114232 and #114200
Jay Foad via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
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- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
Simon Pilgrim via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
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Matt Arsenault via llvm-commits
- [llvm] [AArch64] Define high bits of FPR and GPR registers. (PR #114263)
Sander de Smalen via llvm-commits
- [llvm] cc2d8e7 - [AArch64] Add assembly/disassembly of FMOP4{A,S} (non-widening) single-precision instructions (#113344)
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Daniel Zabawa via llvm-commits
- [llvm] d7e6cba - [RISCV] Use bit or bits for some tablegen class arguments. NFC
Craig Topper via llvm-commits
- [llvm] [GlobalISel] Import samesign flag (second attempt) (PR #114267)
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- [llvm] [llvm][docs] Fix links to clang-format-diff.py and git-clang-format. (PR #110731)
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- [clang] [llvm] [HLSL] implement elementwise firstbithigh hlsl builtin (PR #111082)
Farzon Lotfi via llvm-commits
- [llvm] 70d35fb - [ORC] Fix include guard names. NFC.
Lang Hames via llvm-commits
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Lang Hames via llvm-commits
- [llvm] [Transforms][Utils][PromoteMem2Reg] Propagate nnan flag on par with the nsz flag (PR #114271)
Paul Osmialowski via llvm-commits
- [llvm] [RISCV] Add hasPostISelHook to sf.vfnrclip pseudo instructions. (PR #114274)
Craig Topper via llvm-commits
- [clang] [libunwind] [llvm] Replace documentation mentions of IRC with Discord (PR #114276)
Aaron Ballman via llvm-commits
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Jake Egan via llvm-commits
- [llvm] [InstSimplify][InstCombine][ConstantFold] Move vector div/rem by zero fold to InstCombine (PR #114280)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Optimistically allow multiple shufflevector uses in foldOpPhi (PR #114278)
Yingwei Zheng via llvm-commits
- [llvm] AMDGPU: Disable pattern matching "x<<32-y>>32-y" to "bfe x, 0, y" (PR #114279)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Disable pattern matching "x<<32-y>>32-y" to "bfe x, 0, y" (PR #114279)
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- [llvm] AMDGPU: Disable pattern matching "x<<32-y>>32-y" to "bfe x, 0, y" (PR #114279)
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- [llvm] AMDGPU: Disable pattern matching "x<<32-y>>32-y" to "bfe x, 0, y" (PR #114279)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Disable pattern matching "x<<32-y>>32-y" to "bfe x, 0, y" (PR #114279)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Disable pattern matching "x<<32-y>>32-y" to "bfe x, 0, y" (PR #114279)
Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Disable pattern matching "x<<32-y>>32-y" to "bfe x, 0, y" (PR #114279)
Changpeng Fang via llvm-commits
- [llvm] [CGP] [CodeGenPrepare] Folding `urem` with loop invariant value plus offset (PR #104724)
Simon Pilgrim via llvm-commits
- [llvm] ca1154d - AMDGPU: Disable pattern matching "x<<32-y>>32-y" to "bfe x, 0, y" (#114279)
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- [llvm] [SLP]Support reordered buildvector nodes for better clustering (PR #114284)
Alexey Bataev via llvm-commits
- [llvm] c3724ba - [RISCV] Add OperandType for vector rounding mode operands. (#114179)
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- [llvm] [NFC][Coro] Add helpers for coro cloning with a TimeTraceScope (PR #112948)
Artem Pianykh via llvm-commits
- [clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)
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- [llvm] 71b6f6b - [RISCV] Add missing hasPostISelHook = 1 to vector pseudos that might read FRM. (#114186)
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- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Michael Maitland via llvm-commits
- [llvm] 47d9db7 - [AArch64] Add asssembly/disassembly for FMOP4{A,S} (widening, 2-way, FP16 to FP32) instructions (#113346)
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- [llvm] 408c84f - [RISCV] Add hasPostISelHook to sf.vfnrclip pseudo instructions. (#114274)
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- [llvm] d8295e2 - [SPIRV][HLSL] Handle arrays of resources (#111564)
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- [llvm] [RISCV] Sink hasPostISelHook = 1 for vector pseudos into the subclasses that set HasRoundModeOp. (PR #114294)
Craig Topper via llvm-commits
- [clang] [llvm] [clang] NFC: Remove `{File, Directory}Entry::getName()` (PR #74910)
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- [clang] [lld] [llvm] [Windows] Add support for emitting PGO/LTO magic strings in the Windows PE debug directory (PR #114260)
Tobias Hieta via llvm-commits
- [llvm] [SelectionDAG] Support integer promotion for VP_LOAD and VP_STORE (PR #81299)
Craig Topper via llvm-commits
- [llvm] c616f24 - [SPIR-V] Do instruction selection for G_BITCAST on an earlier stage (#114216)
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- [llvm] [RISCV] Remove duplicate vector conversion pseudos. (PR #114287)
Philip Reames via llvm-commits
- [llvm] [AMDGPU] Extend mov_dpp8 intrinsic lowering for generic types (PR #114296)
Stanislav Mekhanoshin via llvm-commits
- [llvm] e89f821 - [NFC][NVPTX] Cleanup getPreferredVectorAction() (#114115)
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- [lld] [LLD][COFF] Create EC alias symbols for entry points and exports (PR #114297)
Jacek Caban via llvm-commits
- [llvm] 0167a92 - [RISCV] Use unsigned instead of int64_t for two small positive shift amounts. NFC
Craig Topper via llvm-commits
- [llvm] 1c2824e - [NFC][Coro] Add helpers for coro cloning with a TimeTraceScope (#112948)
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- [llvm] 84a78ab - [NFC][Utils] Extract CloneFunctionAttributesInto from CloneFunctionInto (#112976)
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Felipe de Azevedo Piovezan via llvm-commits
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Felipe de Azevedo Piovezan via llvm-commits
- [llvm] [X86] Use getAllOnesConstant instead of getConstant(-1). NFC (PR #114299)
Craig Topper via llvm-commits
- [llvm] [AMDGPU][GlobalISel] Allow bitcast of bf16 (PR #81674)
Rahul Joshi via llvm-commits
- [llvm] [VPlan] Introduce VPScalarPHIRecipe, use for can & EVL IV codegen (NFC). (PR #114305)
Florian Hahn via llvm-commits
- [llvm] [VPlan][NFC] Add new getMiddleBlock interface to VPlan (PR #113558)
Florian Hahn via llvm-commits
- [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Unify the benchmarks with the test suite (PR #101399)
Louis Dionne via llvm-commits
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Princeton Ferro via llvm-commits
- [llvm] 56dcfbe - [RISCV] Remove duplicate vector conversion pseudos. (#114287)
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- [llvm] [AMDGPU] In instruction selector, allow copy from physical reg to s1 (PR #96157)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
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- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Thorsten Schütt via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Thorsten Schütt via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Thorsten Schütt via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Thorsten Schütt via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Thorsten Schütt via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Thorsten Schütt via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Matt Arsenault via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (PR #114309)
Craig Topper via llvm-commits
- [llvm] [GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE (PR #114310)
Thorsten Schütt via llvm-commits
- [lldb] [llvm] [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (PR #112811)
Zequan Wu via llvm-commits
- [llvm] AMDGPU/GlobalISel: Handle atomic sextload and zextload (PR #111721)
Matt Arsenault via llvm-commits
- [llvm] [RISCV] Remove RISCVISD::VFCVT_X(U)_F_VL by using VFCVT_RM_X(U)_F_VL with DYN rounding mode. NFC (PR #114306)
Philip Reames via llvm-commits
- [llvm] Revert "[TLI] Add support for hypot libcall." (PR #114312)
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- [llvm] [RISCV] fix SP recovery in varargs functions (PR #114316)
Jessica Clarke via llvm-commits
- [llvm] 1cb5998 - [RISCV] Remove redundant +zfh from +zvfh[min] tests. NFC
Luke Lau via llvm-commits
- [llvm] [GISel] Return const APInt & from getIConstantFromReg. NFC (PR #114320)
Craig Topper via llvm-commits
- [llvm] Revert "[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic" (PR #114322)
Adam Yang via llvm-commits
- [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)
Jason Molenda via llvm-commits
- [llvm] [NVPTX, InstCombine] instcombine known pointer AS checks. (PR #114325)
Artem Belevich via llvm-commits
- [llvm] Reland "[NVPTX] Prefer prmt.b32 over bfi.b32" (PR #114326)
Justin Fargnoli via llvm-commits
- [llvm] 847f4ef - [X86] Use getAllOnesConstant instead of getConstant(-1). NFC (#114299)
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- [llvm] [RISCV] Assign separate PseudoVSHA2MS_VV opcodes for each SEW (PR #114317)
Min-Yih Hsu via llvm-commits
- [lld] [lld][WebAssembly] Implement --thinlto-index-only and --lto-obj-path. (PR #114327)
Sam Clegg via llvm-commits
- [llvm] [RISCV] Change vector tuple type's TypeSize to scalable (PR #114329)
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- [llvm] [LLVM] Add `LLVMIntrinsicCopyName` to LLVM C API (PR #112197)
Matt Arsenault via llvm-commits
- [llvm] [SimplifyLibCalls][NFC] Fix Typo in Header Comment (PR #114314)
Yingwei Zheng via llvm-commits
- [llvm] b01e2a8 - [llvm] Allow always dropping all llvm.type.test sequences
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- [clang] [llvm] [llvm][fatlto] Drop any CFI related instrumentation after emitting bitcode (PR #112788)
Paul Kirth via llvm-commits
- [llvm] 36b7915 - [gn] port 508263824f4ef (BuiltinsX86.td)
Nico Weber via llvm-commits
- [llvm] [GlobalISel] Combine G_MERGE_VALUES of x and undef (PR #113616)
Matt Arsenault via llvm-commits
- [llvm] [DirectX] Flatten arrays (PR #114332)
Farzon Lotfi via llvm-commits
- [llvm] cf9d1c1 - [SDAG] Simplify `SDNodeFlags` with bitwise logic (#114061)
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- [llvm] [SelectionDAG] Remove unneeded assert from SelectionDAG::getSignedConstant. NFC (PR #114336)
Craig Topper via llvm-commits
- [llvm] f582cd3 - [SelectionDAG] Fix a warning
Kazu Hirata via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Paul Kirth via llvm-commits
- [llvm] [InstCombine] Missed optimization: Fold (sext(a) & c1) == c2 to (a & c3) == trunc(c2) (PR #112646)
Lee Wei via llvm-commits
- [llvm] [MC][Mips] Rename MipsMCAsmInfo to MipsELFMCAsmInfo (PR #112592)
YunQiang Su via llvm-commits
- [llvm] [DAGCombine] Propagate truncate to operands (PR #98666)
Justin Fargnoli via llvm-commits
- [llvm] [RISCV] Lower scalar_to_vector for supported FP types (PR #114340)
Luke Lau via llvm-commits
- [llvm] 8127162 - [X86][AMX] Support AMX-FP8 (#113850)
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- [llvm] f0bae56 - [GISel] Return const APInt & from getIConstantFromReg. NFC (#114320)
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- [llvm] 55dbacb - [RISCV] Remove RISCVISD::VFCVT_X(U)_F_VL by using VFCVT_RM_X(U)_F_VL with DYN rounding mode. NFC (#114306)
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- [llvm] [docs] Point to Discourse for creating RFCs (PR #114341)
Jan Svoboda via llvm-commits
- [llvm] [TLI] Add support for hypot libcall. (PR #114343)
Kenji Mouri / 毛利 研二 via llvm-commits
- [llvm] ccdfd1a - [gn build] Port 8127162427c5
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- [llvm] [InstCombine] Use `m_NotForbidPoison` when folding `(X u< Y) ? -1 : (~X + Y) --> uadd.sat(~X, Y)` (PR #114345)
Yingwei Zheng via llvm-commits
- [llvm] [LLVM] Change `LLVMIntrinsicCopyOverloadedName` API return type (PR #114334)
Rahul Joshi via llvm-commits
- [llvm] Reapply "StructurizeCFG: Optimize phi insertion during ssa reconstruction (#101301)" (PR #114347)
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- [llvm] 948249d - Revert "[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic" (#114322)
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- [llvm] [RISCV] Remove redundant SDNode creation for same reg class value (PR #114348)
Brandon Wu via llvm-commits
- [llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #114349)
Adam Yang via llvm-commits
- [llvm] 6bf214b - [GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE (#114310)
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- [llvm] [ORC] skip reoptimization tests on i386 (PR #114351)
Tom Stellard via llvm-commits
- [llvm] Revert "[GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE" (PR #114353)
Thorsten Schütt via llvm-commits
- [llvm] 6effab9 - Revert "[GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE" (#114353)
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- [llvm] [InstCombine] Fix FMF propagation in `foldSelectIntoOp` (PR #114356)
Yingwei Zheng via llvm-commits
- [llvm] [WIP][AMDGPU][Attributor] Make `AAAMDFlatWorkGroupSize` honor existing attribute (PR #114357)
Shilei Tian via llvm-commits
- [llvm] 50896e7 - [ARM] Use getSignedConstant. NFC
Craig Topper via llvm-commits
- [llvm] 00cbb68 - [LegalizeDAG] Use getSignedConstant. NFC
Craig Topper via llvm-commits
- [llvm] a33fd61 - [RISCV] Remove dead code from IntrinsicsRISCVXsf.td. NFC
Craig Topper via llvm-commits
- [llvm] [WebAssembly] Fix comments in CFGStackify (NFC) (PR #114362)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Add/Reorder legacy EH tests (PR #114363)
Heejin Ahn via llvm-commits
- [clang] [llvm] [InstrPGO] Avoid using global variable to fix potential data race (PR #114364)
Lei Wang via llvm-commits
- [llvm] [RISCV] Combine concat_vectors of single element scalar_to_vector (PR #114366)
Luke Lau via llvm-commits
- [llvm] 9735c05 - [ValueTracking] Compute KnownFP state from recursive select/phi. (#113686)
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- [llvm] [LoongArch] Enable FeatureExtLSX for generic-la64 processor (PR #113421)
Lu Weining via llvm-commits
- [llvm] 1897bf6 - [LoongArch] Enable FeatureExtLSX for generic-la64 processor (#113421)
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- [llvm] 7cd2974 - [AMDGPU] Extend mov_dpp8 intrinsic lowering for generic types (#114296)
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- [llvm] 862074f - [LoongArch][NFC] Pre-commit tests for the adjacency of expanded pseudo-insns
WANG Rui via llvm-commits
- [llvm] [llvm][docs] Add Approvals section to GitHub guide (PR #113434)
David Spickett via llvm-commits
- [llvm] [RISCV][TTI] Add vp.fneg intrinsic cost with functionalOP (PR #114378)
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- [llvm] [SPIR-V] Add missing ScalarOpts library (PR #114384)
Sven van Haastregt via llvm-commits
- [clang] [flang] [llvm] [openmp] [flang][driver] rename flang-new to flang (PR #110023)
Sylvestre Ledru via llvm-commits
- [llvm] 28d0718 - [DAGCombiner] Add combine avg from shifts (#113909)
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- [llvm] 78a98c7 - [gn build] Port e67e03a22c27
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Nathan Gauër via llvm-commits
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- [llvm] [DAG] SimplifyMultipleUseDemandedBits - ignore SRL node if we're just demanding known sign bits (PR #114389)
Simon Pilgrim via llvm-commits
- [llvm] d924a9b - Revert "[InstrPGO] Support cold function coverage instrumentation (#109837)"
Dmitry Chernenkov via llvm-commits
- [llvm] 92af82a - [VectorCombine] Fold "shuffle (binop (shuffle, shuffle)), undef" --> "binop (shuffle), (shuffle)" (#114101)
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- [clang] [llvm] [LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (PR #112548)
Paul Walker via llvm-commits
- [llvm] 95c5042 - [AArch64] Add assembly/disassembly for {S,SU,US,U}MOP4{A,S} instructions (#113349)
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- [llvm] [RISCV] Add tests for memcmp expansion (PR #107824)
Pengcheng Wang via llvm-commits
- [llvm] 18f0f70 - [RISCV] Support llvm.masked.expandload intrinsic (#101954)
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- [llvm] b185e92 - [AArch64] Add assembly/disassembly for {S,U,SU,US}TMOPA instructions (#113946)
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- [llvm] [docs] Update docs on code-review process (PR #111735)
Andrzej Warzyński via llvm-commits
- [llvm] cf3d6fd - [SPIR-V] Re-enable -verify-machineinstrs on tests (#114388)
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Xi Ruoyao via llvm-commits
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Lewis Crawford via llvm-commits
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Janek van Oirschot via llvm-commits
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Jan Patrick Lehr via llvm-commits
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Sam Clegg via llvm-commits
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Jeremy Morse via llvm-commits
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Jay Foad via llvm-commits
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James Chesterman via llvm-commits
- [llvm] [MachineVerifier] Allow KILL MI with dangling MMO in MachineVerifier. (PR #114407)
Jonas Paulsson via llvm-commits
- [llvm] 1e072ae - [CGP] [CodeGenPrepare] Folding `urem` with loop invariant value plus offset (#104724)
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Timm Baeder via llvm-commits
- [llvm] c485ee1 - [AArch64] Add assembly/disassembly for zeroing SVE REV{B,H,W,D} and RBIT (#114110)
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- [llvm] [SLP]Do not account external uses in EH block and in non-returning blocks (PR #112045)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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- [llvm] 1240902 - AMDGPU/GlobalISel: Handle atomic sextload and zextload (#111721)
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Matt Arsenault via llvm-commits
- [llvm] 41448c1 - [AArch64] NFC: Add RUN line for +sve2 for sve-intrinsics-perm-select.ll
Sander de Smalen via llvm-commits
- [llvm] 7e877fc - [Reland][TLI] Add support for hypot libcall. (#114343)
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Sander de Smalen via llvm-commits
- [compiler-rt] 4ccd2b0 - Reland "[rtsan] Intercept aligned_alloc on all versions of OSX if available on the build machine" (#114153)
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- [llvm] db5bcb2 - GlobalISel: Fix combine duplicating atomic loads (#111730)
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- [llvm] [TableGen] Fix concatenation of subreg and artificial subregs (PR #114391)
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- [llvm] 8a2113c - Reapply "[SelectionDAG] Add preliminary plumbing for `samesign` flag"
Antonio Frighetto via llvm-commits
- [llvm] Revert "[PowerPC] Add custom lowering for ssubo (#111748)" (PR #114672)
Maryam Moghadas via llvm-commits
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- [llvm] c7c5042 - Revert "[PowerPC] Add custom lowering for ssubo (#111748)" (#114672)
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- [llvm] [llvm-profdata] Fix typo in llfm-profdata (PR #114675)
Peter Jung via llvm-commits
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Jan Svoboda via llvm-commits
- [llvm] fcd51de - [InstCombine] Factorise Add and Min/Max using distributivity (#101717)
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Hervé Poussineau via llvm-commits
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Vassil Vassilev via llvm-commits
- [llvm] [Support] Add clang tooling generated explicit visibility macros (PR #113097)
Vassil Vassilev via llvm-commits
- [llvm] [IR] Remove unused includes (NFC) (PR #114679)
Kazu Hirata via llvm-commits
- [llvm] [CostModel][X86] Add initial costs for non-lane-crossing one/two input shuffles (PR #114680)
Simon Pilgrim via llvm-commits
- [llvm] 11df0ce - [NFC][AMDGPU] Use structured binding to replace explicit use of std::pair
Shilei Tian via llvm-commits
- [llvm] af6ebb7 - [VPlan] Implement computeCost for remaining VPSingleDefRecipes.
Florian Hahn via llvm-commits
- [llvm] [MC] Make generated `MCInstPrinter::getMnemonic` const (NFC) (PR #114682)
Sergei Barannikov via llvm-commits
- [llvm] [NVPTX] Implement isTruncateFree and isZExtFree for i32/i64 Optimizations (PR #114683)
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- [llvm] 6f10b65 - [IR] Remove unused includes (NFC) (#114679)
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- [llvm] 5091a35 - [ConstantFold] Special case log1p +/-0.0 (#114635)
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- [llvm] [ValueTracking] Handle recursive select/PHI in ComputeKnownBits/IsKnownNonZero (PR #114689)
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- [llvm] [WebAssembly] Fix rethrow's index calculation (PR #114693)
Heejin Ahn via llvm-commits
- [llvm] bf099f4 - [llvm][ADT] Structured bindings for move-only types in `StringMap` (#114676)
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- [compiler-rt] [compiler-rt][profile] Add support for LLVM profile for Haiku (PR #107575)
Brad Smith via llvm-commits
- [llvm] 229abcd - [RISCV] Add testcase for outlining leaf descendants (#114450)
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- [llvm] [SelectionDAG] Remove unused includes (NFC) (PR #114697)
Kazu Hirata via llvm-commits
- [llvm] [AsmPrinter] Remove unused includes (NFC) (PR #114698)
Kazu Hirata via llvm-commits
- [llvm] [LSV] Prepare atomicrmw operands for vectorization (PR #114702)
Anshil Gandhi via llvm-commits
- [llvm] [Attributor] Teach HeapToStack about conservative GC allocators (PR #113299)
Elias Naur via llvm-commits
- [llvm] [X86][AMX] Reserve all pair registers when AMXTRANSPOSE is not ready (PR #114706)
Phoebe Wang via llvm-commits
- [llvm] 2fccd5c - [AsmPrinter] Remove unused includes (NFC) (#114698)
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- [llvm] 6927a43 - [SelectionDAG] Remove unused includes (NFC) (#114697)
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- [llvm] [InstCombine] Remove unused includes (NFC) (PR #114709)
Kazu Hirata via llvm-commits
- [llvm] llvm-project runtimes cmake fix old todo (PR #114710)
Valery Mironov via llvm-commits
- [llvm] 23d209f - [SPARC] Allow overaligned `alloca`s (#107223)
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- [llvm] e5bf14e - [InstCombine] Remove unused includes (NFC) (#114709)
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- [llvm] da9fece - [Sparc] Fix a warning
Kazu Hirata via llvm-commits
- [llvm] aa825b7 - [Vectorize] Remove unused includes (NFC) (#114643)
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- [llvm] eeb987f - [MC] Make generated `MCInstPrinter::getMnemonic` const (NFC) (#114682)
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- [llvm] M68k ccr mov (PR #114714)
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- [llvm] [IPO] Remove unused includes (NFC) (PR #114716)
Kazu Hirata via llvm-commits
- [llvm] 3098200 - [ISel] Propagate disjoint flag in ShrinkDemandedOp (#114560)
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- [llvm] 98ea1a8 - [IPO] Remove unused includes (NFC) (#114716)
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- [llvm] 6bad451 - [AArch64] Extend vector mull test coverage. NFC
David Green via llvm-commits
- [llvm] beb12f9 - [RISCV] Add +optimized-nfN-segment-load-store (#114414)
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- [llvm] [memprof] Add const to isAllocationWithHotColdVariant (NFC) (PR #114719)
Kazu Hirata via llvm-commits
- [clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)
Chris Copeland via llvm-commits
- [llvm] Rework i1->i32 zext/anyext translation (PR #114721)
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- [llvm] [memprof] Use MinimumSupportedVersion in place of Verion0 (NFC) (PR #114723)
Kazu Hirata via llvm-commits
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Vitaly Buka via llvm-commits
- [llvm] 77b7d9d - [memprof] Add const to isAllocationWithHotColdVariant (NFC) (#114719)
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- [llvm] 8251754 - [MSan] Update 32-bit test checks (#112401)
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- [llvm] 2ac156a - [RISCV] Remove +zfh from shuffle test. NFC
Luke Lau via llvm-commits
- [llvm] 798c5fb - [RISCV] Remove unused check prefixes. NFC
Luke Lau via llvm-commits
- [compiler-rt] [ASan][test] Enable ASan tests on SPARC (PR #107405)
Brad Smith via llvm-commits
- [llvm] [RISCV] Lower shuffle_vector for bf16 (PR #114731)
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- [llvm] dc45ff1 - [PassBuilder] Add `ThinOrFullLTOPhase` to early simplication EP call backs (#114547)
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- [clang] [llvm] [PassBuilder] Add `ThinOrFullLTOPhase` to optimizer pipeline (PR #114577)
Shilei Tian via llvm-commits
- [llvm] 390300d - [PassBuilder] Add `ThinOrFullLTOPhase` to optimizer pipeline (#114577)
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- [llvm] [LoongArch] Support llvm.lround intrinsics with i32 return type. (PR #114733)
Zhaoxin Yang via llvm-commits
- [llvm] [CostModel][AArch64] Make extractelement, with fmul user, free whenev… (PR #111479)
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Archived on: Sun Nov 3 22:55:32 PST 2024
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