[llvm] [AArch64] Add patterns for constructive splice. (PR #113912)

[Paul Walker via llvm-commits]

paulwalker-arm wrote:

> According to this: https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions/SPLICE--Splice-two-vectors-under-predicate-control- the splice instructions require both SVE2 _and_ SME, it looks like the splice definition currently is guarded under "SVE2OrSME".

The specification says:
```
if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then
    EndOfDecode(Decode_UNDEF);
```
If both features are not implemented then it's a decode error.  This implies either of the features is sufficient to enable the instruction (along with a streaming mode check when targeting SME without SVE).

https://github.com/llvm/llvm-project/pull/113912