[llvm] [LV][EVL] Emit vp.merge intrinsic to enable out-loop reduction in EVL vectorization. (PR #101641)

[Mel Chen via llvm-commits]

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@@ -9386,10 +9397,8 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
                cast<VPInstruction>(&U)->getOpcode() ==
                    VPInstruction::ComputeReductionResult;
       });
-      if (PreferPredicatedReductionSelect ||
-          TTI.preferPredicatedReductionSelect(
-              PhiR->getRecurrenceDescriptor().getOpcode(), PhiTy,
-              TargetTransformInfo::ReductionFlags()))
+      if (CM.usePredicatedReductionSelect(
+              PhiR->getRecurrenceDescriptor().getOpcode(), PhiTy))
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Mel-Chen wrote:

You've raised a good point. 
Adjusting the reduction phi too early can indeed cause some issues. Fortunately, this issue is related to performance rather than correctness. We can proceed with this approach for now and address this performance issue in a later patch.

https://github.com/llvm/llvm-project/pull/101641