[llvm] [RISCV] Change vector tuple type's TypeSize to scalable (PR #114329)
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Wed Oct 30 16:46:02 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Brandon Wu (4vtomat)
<details>
<summary>Changes</summary>
Vector tuple is basically multiple grouped vector, so its size is also
determined by vscale, we need not to model it as a vector type but its
size need to be scalable.
---
Full diff: https://github.com/llvm/llvm-project/pull/114329.diff
4 Files Affected:
- (modified) llvm/include/llvm/CodeGen/ValueTypes.td (+1)
- (modified) llvm/lib/CodeGen/ValueTypes.cpp (+1-1)
- (modified) llvm/lib/CodeGenTypes/LowLevelType.cpp (+5)
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+27-20)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/ValueTypes.td b/llvm/include/llvm/CodeGen/ValueTypes.td
index 6d6b92958b4321..ee1b31703e12b9 100644
--- a/llvm/include/llvm/CodeGen/ValueTypes.td
+++ b/llvm/include/llvm/CodeGen/ValueTypes.td
@@ -63,6 +63,7 @@ class VTVecTup<int size, int nf, ValueType dummy_elt, int value>
let NF = nf;
let ElementType = dummy_elt;
let isRISCVVecTuple = true;
+ let isScalable = true;
}
defset list<ValueType> ValueTypes = {
diff --git a/llvm/lib/CodeGen/ValueTypes.cpp b/llvm/lib/CodeGen/ValueTypes.cpp
index e3c746b274dde1..2c80eee7c904c1 100644
--- a/llvm/lib/CodeGen/ValueTypes.cpp
+++ b/llvm/lib/CodeGen/ValueTypes.cpp
@@ -163,7 +163,7 @@ std::string EVT::getEVTString() const {
switch (V.SimpleTy) {
default:
if (isRISCVVectorTuple()) {
- unsigned Sz = getSizeInBits();
+ unsigned Sz = getSizeInBits().getKnownMinValue();
unsigned NF = getRISCVVectorTupleNumFields();
unsigned MinNumElts = Sz / (NF * 8);
return "riscv_nxv" + utostr(MinNumElts) + "i8x" + utostr(NF);
diff --git a/llvm/lib/CodeGenTypes/LowLevelType.cpp b/llvm/lib/CodeGenTypes/LowLevelType.cpp
index 5530a2ea952dd9..a798d8855a4636 100644
--- a/llvm/lib/CodeGenTypes/LowLevelType.cpp
+++ b/llvm/lib/CodeGenTypes/LowLevelType.cpp
@@ -22,6 +22,11 @@ LLT::LLT(MVT VT) {
init(/*IsPointer=*/false, asVector, /*IsScalar=*/!asVector,
VT.getVectorElementCount(), VT.getVectorElementType().getSizeInBits(),
/*AddressSpace=*/0);
+ } else if (VT.isRISCVVectorTuple()) {
+ // TODO: Correctly model RISC-V vector tuple type
+ init(/*IsPointer=*/false, /*IsVector=*/false, /*IsScalar=*/true,
+ ElementCount::getFixed(0), VT.getSizeInBits().getKnownMinValue(),
+ /*AddressSpace=*/0);
} else if (VT.isValid() && !VT.isScalableTargetExtVT()) {
// Aggregates are no different from real scalars as far as GlobalISel is
// concerned.
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index af7a39b2580a37..210657a7481d08 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -2416,8 +2416,9 @@ unsigned RISCVTargetLowering::getSubregIndexByMVT(MVT VT, unsigned Index) {
unsigned RISCVTargetLowering::getRegClassIDForVecVT(MVT VT) {
if (VT.isRISCVVectorTuple()) {
unsigned NF = VT.getRISCVVectorTupleNumFields();
- unsigned RegsPerField = std::max(1U, (unsigned)VT.getSizeInBits() /
- (NF * RISCV::RVVBitsPerBlock));
+ unsigned RegsPerField =
+ std::max(1U, (unsigned)VT.getSizeInBits().getKnownMinValue() /
+ (NF * RISCV::RVVBitsPerBlock));
switch (RegsPerField) {
case 1:
if (NF == 2)
@@ -7006,7 +7007,7 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
SDLoc DL(Op);
MVT XLenVT = Subtarget.getXLenVT();
unsigned NF = VecTy.getRISCVVectorTupleNumFields();
- unsigned Sz = VecTy.getSizeInBits();
+ unsigned Sz = VecTy.getSizeInBits().getKnownMinValue();
unsigned NumElts = Sz / (NF * 8);
int Log2LMUL = Log2_64(NumElts) - 3;
@@ -7049,7 +7050,7 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
SDLoc DL(Op);
MVT XLenVT = Subtarget.getXLenVT();
unsigned NF = VecTy.getRISCVVectorTupleNumFields();
- unsigned Sz = VecTy.getSizeInBits();
+ unsigned Sz = VecTy.getSizeInBits().getKnownMinValue();
unsigned NumElts = Sz / (NF * 8);
int Log2LMUL = Log2_64(NumElts) - 3;
@@ -21309,6 +21310,25 @@ bool RISCVTargetLowering::splitValueIntoRegisterParts(
return true;
}
+ if (ValueVT.isRISCVVectorTuple() && PartVT.isRISCVVectorTuple()) {
+ unsigned ValNF = ValueVT.getRISCVVectorTupleNumFields();
+ [[maybe_unused]] unsigned ValLMUL =
+ divideCeil(ValueVT.getSizeInBits().getKnownMinValue(),
+ ValNF * RISCV::RVVBitsPerBlock);
+ unsigned PartNF = PartVT.getRISCVVectorTupleNumFields();
+ [[maybe_unused]] unsigned PartLMUL =
+ divideCeil(PartVT.getSizeInBits().getKnownMinValue(),
+ PartNF * RISCV::RVVBitsPerBlock);
+ assert(ValNF == PartNF && ValLMUL == PartLMUL &&
+ "RISC-V vector tuple type only accepts same register class type "
+ "TUPLE_INSERT");
+
+ Val = DAG.getNode(RISCVISD::TUPLE_INSERT, DL, PartVT, DAG.getUNDEF(PartVT),
+ Val, DAG.getVectorIdxConstant(0, DL));
+ Parts[0] = Val;
+ return true;
+ }
+
if (ValueVT.isScalableVector() && PartVT.isScalableVector()) {
LLVMContext &Context = *DAG.getContext();
EVT ValueEltVT = ValueVT.getVectorElementType();
@@ -21344,22 +21364,6 @@ bool RISCVTargetLowering::splitValueIntoRegisterParts(
}
}
- if (ValueVT.isRISCVVectorTuple() && PartVT.isRISCVVectorTuple()) {
- unsigned ValNF = ValueVT.getRISCVVectorTupleNumFields();
- [[maybe_unused]] unsigned ValLMUL =
- divideCeil(ValueVT.getSizeInBits(), ValNF * RISCV::RVVBitsPerBlock);
- unsigned PartNF = PartVT.getRISCVVectorTupleNumFields();
- [[maybe_unused]] unsigned PartLMUL =
- divideCeil(PartVT.getSizeInBits(), PartNF * RISCV::RVVBitsPerBlock);
- assert(ValNF == PartNF && ValLMUL == PartLMUL &&
- "RISC-V vector tuple type only accepts same register class type "
- "TUPLE_INSERT");
-
- Val = DAG.getNode(RISCVISD::TUPLE_INSERT, DL, PartVT, DAG.getUNDEF(PartVT),
- Val, DAG.getVectorIdxConstant(0, DL));
- Parts[0] = Val;
- return true;
- }
return false;
}
@@ -21378,6 +21382,9 @@ SDValue RISCVTargetLowering::joinRegisterPartsIntoValue(
return Val;
}
+ if (ValueVT.isRISCVVectorTuple())
+ return SDValue();
+
if (ValueVT.isScalableVector() && PartVT.isScalableVector()) {
LLVMContext &Context = *DAG.getContext();
SDValue Val = Parts[0];
``````````
</details>
https://github.com/llvm/llvm-project/pull/114329
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