[llvm] [NFC][AMDGPU] Use C++17 structured bindings as much as possible (PR #113939)

via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 28 10:22:07 PDT 2024


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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git-clang-format --diff f14743794587db102c6d1b20f9c87a1ac20decfd 5bbbd8f9860c12cd7398bcd4ba81109917d6318a --extensions cpp -- llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index deeacdf75b..52ca38aca5 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -5783,8 +5783,8 @@ SDValue SITargetLowering::splitTernaryVectorOp(SDValue Op,
 
   SDValue Op0 = Op.getOperand(0);
   auto [Lo0, Hi0] = Op0.getValueType().isVector()
-                           ? DAG.SplitVectorOperand(Op.getNode(), 0)
-                           : std::pair(Op0, Op0);
+                        ? DAG.SplitVectorOperand(Op.getNode(), 0)
+                        : std::pair(Op0, Op0);
 
   auto [Lo1, Hi1] = DAG.SplitVectorOperand(Op.getNode(), 1);
   auto [Lo2, Hi2] = DAG.SplitVectorOperand(Op.getNode(), 2);

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https://github.com/llvm/llvm-project/pull/113939


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