[llvm] [DAG] SimplifyMultipleUseDemandedBits - ignore SRL node if we're just demanding known sign bits (PR #114389)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 31 06:39:01 PDT 2024
https://github.com/jayfoad approved this pull request.
https://github.com/llvm/llvm-project/pull/114389
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