[llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 3 09:42:46 PST 2024

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https://github.com/RKSimon converted_to_draft https://github.com/llvm/llvm-project/pull/112588

Previous message: [llvm] [DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (PR #112588)
Next message: [llvm] [VPlan] Reverse instruction cost calculation for recipes in the VPBasicblock. (PR #113902)
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