[llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)

[Min-Yih Hsu via llvm-commits]

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@@ -17923,6 +17931,7 @@ AArch64TargetLowering::isDesirableToCommuteWithShift(const SDNode *N,
       }
     }
   }
+
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mshockwave wrote:

please don't make unnecessary change

https://github.com/llvm/llvm-project/pull/101294