[llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)

[David Green via llvm-commits]

================
@@ -37,6 +37,20 @@ define void @set_fpsr(i64 %sr) {
   ret void
 }
 
+define dso_local void @set_fpmr(i64 %sr) {
+; CHECK-LABEL: set_fpmr:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mrs x8, FPMR
+; CHECK-NEXT:    cmp x8, x0
+; CHECK-NEXT:    b.eq .LBB4_2
+; CHECK-NEXT:  // %bb.1:
+; CHECK-NEXT:    msr FPMR, x0
----------------
davemgreen wrote:

Can you explain why this conditionally sets the register, if it doesn't match already? I would expect it would just set the value using a single msr.

https://github.com/llvm/llvm-project/pull/114248