[llvm] [AArch64] Define high bits of FPR and GPR registers. (PR #114263)

[Matt Arsenault via llvm-commits]

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@@ -424,6 +424,58 @@ AArch64RegisterInfo::explainReservedReg(const MachineFunction &MF,
   return {};
 }
 
+static SmallVector<MCPhysReg> ReservedHi = {
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arsenm wrote:

Make this std::array or a regular C array. Alternatively could introduce a new register class for the synthetic cases.

It might also be possible to get away without explicitly marking these as reserved 

https://github.com/llvm/llvm-project/pull/114263