[llvm] [AArch64] Avoid GPR trip when moving truncated i32 vector elements (PR #114541)

[Paul Walker via llvm-commits]

paulwalker-arm wrote:

Are we just missing a DAG combine whereby
```
%c = extractelement <2 x i64> %b, i32 1
%d = trunc i64 %c to i32
```
can be rewritten as
```
%e = reinterpret_cast <2 x i64> %b to <4 x i32>
%d = extractelement <4 x i32> %e, i32 2
```

NOTE: IR form is just to aid my comment. `reinterpret_cast` doesn't existing in IR, but during code generation there is `AArch64ISD::REINTERPRET_CAST`.

https://github.com/llvm/llvm-project/pull/114541