[llvm] [RISCV] Use vsetvli instead of vlenb in Prologue/Epilogue (PR #113756)

[Pengcheng Wang via llvm-commits]

wangpc-pp wrote:

I think we should make it a feature. For Xiangshan, IIUC, `csrr a0, vlenb` will be decoded as `addi a0, zero, $vlenb`, and with fusion/wide issue width, it won't be slower than `vsetvli`. There are too many things we can do with the implementation of `vsetvli` and as a consequence we can't assume the behavior here.

https://github.com/llvm/llvm-project/pull/113756