[llvm] Enable aggressive constant merge in GlobalMerge for AIX (PR #113956)

via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 28 12:38:25 PDT 2024


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-powerpc

Author: Zaara Syeda (syzaara)

<details>
<summary>Changes</summary>

Enable merging all constants without looking at use in GlobalMerge by default to replace PPCMergeStringPool pass on AIX.

---

Patch is 45.00 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/113956.diff


12 Files Affected:

- (modified) llvm/include/llvm/CodeGen/GlobalMerge.h (+3) 
- (modified) llvm/include/llvm/CodeGen/Passes.h (+2-1) 
- (modified) llvm/lib/CodeGen/GlobalMerge.cpp (+9-4) 
- (modified) llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (+6-3) 
- (modified) llvm/test/CodeGen/PowerPC/O3-pipeline.ll (-3) 
- (modified) llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll (+3-3) 
- (modified) llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll (+6-3) 
- (modified) llvm/test/CodeGen/PowerPC/aix-xcoff-used-with-stringpool.ll (+4-2) 
- (modified) llvm/test/CodeGen/PowerPC/merge-private.ll (+2-2) 
- (modified) llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll (+75-68) 
- (modified) llvm/test/CodeGen/PowerPC/mergeable-string-pool-tls.ll (+36-29) 
- (modified) llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll (+68-62) 


``````````diff
diff --git a/llvm/include/llvm/CodeGen/GlobalMerge.h b/llvm/include/llvm/CodeGen/GlobalMerge.h
index 1577bcf8903f52..f1fb467fc77576 100644
--- a/llvm/include/llvm/CodeGen/GlobalMerge.h
+++ b/llvm/include/llvm/CodeGen/GlobalMerge.h
@@ -30,6 +30,9 @@ struct GlobalMergeOptions {
   bool MergeExternal = true;
   /// Whether we should merge constant global variables.
   bool MergeConstantGlobals = false;
+  /// Whether we should merge constant global variables aggressively without
+  /// looking at use.
+  bool MergeConstAggressive = false;
   /// Whether we should try to optimize for size only.
   /// Currently, this applies a dead simple heuristic: only consider globals
   /// used in minsize functions for merging.
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
index e12c1f076f133c..a3dc2551e1133b 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -480,7 +480,8 @@ namespace llvm {
   Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
                               bool OnlyOptimizeForSize = false,
                               bool MergeExternalByDefault = false,
-                              bool MergeConstantByDefault = false);
+                              bool MergeConstantByDefault = false,
+                              bool MergeConstAggressiveByDefault = false);
 
   /// This pass splits the stack into a safe stack and an unsafe stack to
   /// protect against stack-based overflow vulnerabilities.
diff --git a/llvm/lib/CodeGen/GlobalMerge.cpp b/llvm/lib/CodeGen/GlobalMerge.cpp
index 4c6c8c600ee2bb..9a939d06946dff 100644
--- a/llvm/lib/CodeGen/GlobalMerge.cpp
+++ b/llvm/lib/CodeGen/GlobalMerge.cpp
@@ -202,12 +202,13 @@ class GlobalMerge : public FunctionPass {
 
   explicit GlobalMerge(const TargetMachine *TM, unsigned MaximalOffset,
                        bool OnlyOptimizeForSize, bool MergeExternalGlobals,
-                       bool MergeConstantGlobals)
+                       bool MergeConstantGlobals, bool MergeConstAggressive)
       : FunctionPass(ID), TM(TM) {
     Opt.MaxOffset = MaximalOffset;
     Opt.SizeOnly = OnlyOptimizeForSize;
     Opt.MergeExternal = MergeExternalGlobals;
     Opt.MergeConstantGlobals = MergeConstantGlobals;
+    Opt.MergeConstAggressive = MergeConstAggressive;
     initializeGlobalMergePass(*PassRegistry::getPassRegistry());
   }
 
@@ -268,7 +269,7 @@ bool GlobalMergeImpl::doMerge(SmallVectorImpl<GlobalVariable *> &Globals,
       });
 
   // If we want to just blindly group all globals together, do so.
-  if (!GlobalMergeGroupByUse || (GlobalMergeAllConst && isConst)) {
+  if (!GlobalMergeGroupByUse || (Opt.MergeConstAggressive && isConst)) {
     BitVector AllGlobals(Globals.size());
     AllGlobals.set();
     return doMerge(Globals, AllGlobals, M, isConst, AddrSpace);
@@ -758,10 +759,14 @@ bool GlobalMergeImpl::run(Module &M) {
 Pass *llvm::createGlobalMergePass(const TargetMachine *TM, unsigned Offset,
                                   bool OnlyOptimizeForSize,
                                   bool MergeExternalByDefault,
-                                  bool MergeConstantByDefault) {
+                                  bool MergeConstantByDefault,
+                                  bool MergeConstAggressiveByDefault) {
   bool MergeExternal = (EnableGlobalMergeOnExternal == cl::BOU_UNSET) ?
     MergeExternalByDefault : (EnableGlobalMergeOnExternal == cl::BOU_TRUE);
   bool MergeConstant = EnableGlobalMergeOnConst || MergeConstantByDefault;
+  bool MergeConstAggressive = GlobalMergeAllConst.getNumOccurrences() > 0
+                                  ? GlobalMergeAllConst
+                                  : MergeConstAggressiveByDefault;
   return new GlobalMerge(TM, Offset, OnlyOptimizeForSize, MergeExternal,
-                         MergeConstant);
+                         MergeConstant, MergeConstAggressive);
 }
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index cd188304595e18..133c47174570cc 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -505,10 +505,13 @@ bool PPCPassConfig::addPreISel() {
           ? EnableGlobalMerge
           : (TM->getTargetTriple().isOSAIX() &&
              getOptLevel() != CodeGenOptLevel::None))
-    addPass(
-        createGlobalMergePass(TM, GlobalMergeMaxOffset, false, false, true));
+    addPass(createGlobalMergePass(TM, GlobalMergeMaxOffset, false, false, true,
+                                  true));
 
-  if (MergeStringPool && getOptLevel() != CodeGenOptLevel::None)
+  if ((MergeStringPool.getNumOccurrences() > 0)
+          ? MergeStringPool
+          : (TM->getTargetTriple().isOSLinux() &&
+             getOptLevel() != CodeGenOptLevel::None))
     addPass(createPPCMergeStringPoolPass());
 
   if (!DisableInstrFormPrep && getOptLevel() != CodeGenOptLevel::None)
diff --git a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
index 21bd4bb8502c3d..8aeea4ba045bf3 100644
--- a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
+++ b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
@@ -70,9 +70,6 @@
 ; CHECK-NEXT:       CodeGen Prepare
 ; CHECK-NEXT:       Dominator Tree Construction
 ; CHECK-NEXT:       Exception handling preparation
-; CHECK-NEXT:       PPC Merge String Pool
-; CHECK-NEXT:       FunctionPass Manager
-; CHECK-NEXT:       Dominator Tree Construction
 ; CHECK-NEXT:       Natural Loop Information
 ; CHECK-NEXT:       Scalar Evolution Analysis
 ; CHECK-NEXT:       Prepare loop for ppc preferred instruction forms
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
index c7b1d2a0771c1f..f14901017982b4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
@@ -1,13 +1,13 @@
 ; This file tests the codegen of mergeable const in AIX assembly.
 ; This file also tests mergeable const in XCOFF object file generation.
 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
-; RUN:     -data-sections=false -xcoff-traceback-table=false < %s | \
+; RUN:     -global-merge-all-const=false -data-sections=false -xcoff-traceback-table=false < %s | \
 ; RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
-; RUN:     -xcoff-traceback-table=false -data-sections=false < %s | \
+; RUN:     -global-merge-all-const=false -xcoff-traceback-table=false -data-sections=false < %s | \
 ; RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
-; RUN:     -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
+; RUN:     -global-merge-all-const=false -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
 ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s
 ; RUN: llvm-readobj -s %t.o | FileCheck --check-prefix=CHECKSYM %s
 
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
index f70428b1028951..5462240846994f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
@@ -4,12 +4,15 @@
 ; tests for XCOFF object files.
 
 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -xcoff-traceback-table=false \
-; RUN:     -mtriple powerpc-ibm-aix-xcoff  -data-sections=false -ppc-merge-string-pool=false < %s | FileCheck %s
+; RUN:     -mtriple powerpc-ibm-aix-xcoff  -data-sections=false -ppc-merge-string-pool=false \
+; RUN:     -global-merge-all-const=false < %s | FileCheck %s
 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -xcoff-traceback-table=false \
-; RUN:     -mtriple powerpc64-ibm-aix-xcoff -data-sections=false -ppc-merge-string-pool=false < %s | FileCheck %s
+; RUN:     -mtriple powerpc64-ibm-aix-xcoff -data-sections=false -ppc-merge-string-pool=false \
+; RUN:     -global-merge-all-const=false < %s | FileCheck %s
 
 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
-; RUN:     -xcoff-traceback-table=false -data-sections=false -ppc-merge-string-pool=false -filetype=obj -o %t.o < %s
+; RUN:     -xcoff-traceback-table=false -data-sections=false -ppc-merge-string-pool=false \
+; RUN:     -global-merge-all-const=false -filetype=obj -o %t.o < %s
 ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s
 
 @magic16 = private unnamed_addr constant [4 x i16] [i16 264, i16 272, i16 213, i16 0], align 2
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-used-with-stringpool.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-used-with-stringpool.ll
index fa9a8fb457518a..7f93661c37ee8c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-used-with-stringpool.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-used-with-stringpool.ll
@@ -1,10 +1,12 @@
 ;; Test that the string pooling pass does not pool globals that are
 ;; in llvm.used or in llvm.compiler.used.
 
-; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple powerpc-ibm-aix-xcoff -data-sections=false < %s | \
+; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple powerpc-ibm-aix-xcoff \
+; RUN:   -ppc-merge-string-pool=true -global-merge-all-const=false -data-sections=false < %s | \
 ; RUN:   FileCheck %s
 
-; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple powerpc64-ibm-aix-xcoff -data-sections=false < %s | \
+; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple powerpc64-ibm-aix-xcoff \
+; RUN:   -ppc-merge-string-pool=true -global-merge-all-const=false -data-sections=false < %s | \
 ; RUN:   FileCheck %s
 
 @keep_this = internal constant [5 x i8] c"keep1", align 1
diff --git a/llvm/test/CodeGen/PowerPC/merge-private.ll b/llvm/test/CodeGen/PowerPC/merge-private.ll
index 0ca706abb275fc..d3f29108264233 100644
--- a/llvm/test/CodeGen/PowerPC/merge-private.ll
+++ b/llvm/test/CodeGen/PowerPC/merge-private.ll
@@ -1,9 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 \
-; RUN:     -ppc-asm-full-reg-names -ppc-global-merge=true < %s | FileCheck %s \
+; RUN:     -ppc-asm-full-reg-names < %s | FileCheck %s \
 ; RUN:     --check-prefix=AIX64
 ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 \
-; RUN:     -ppc-asm-full-reg-names -ppc-global-merge=true < %s | FileCheck %s \
+; RUN:     -ppc-asm-full-reg-names < %s | FileCheck %s \
 ; RUN:     --check-prefix=AIX32
 ; RUN: llc -verify-machineinstrs -mtriple powerpc64le-unknown-linux -mcpu=pwr8 \
 ; RUN:     -ppc-asm-full-reg-names -ppc-global-merge=true < %s | FileCheck %s \
diff --git a/llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll b/llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
index b182763ccc1462..27923e47b86b66 100644
--- a/llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
+++ b/llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 \
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 -ppc-global-merge-max-offset=50000 \
 ; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX32
-; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 \
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 -ppc-global-merge-max-offset=50000 \
 ; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX64
 ; RUN: llc -verify-machineinstrs -mtriple powerpc64-unknown-linux -mcpu=pwr8 \
 ; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64BE
@@ -242,10 +242,8 @@ define dso_local signext i32 @str1() local_unnamed_addr #0 {
 ; AIX32:       # %bb.0: # %entry
 ; AIX32-NEXT:    mflr r0
 ; AIX32-NEXT:    stwu r1, -64(r1)
-; AIX32-NEXT:    lwz r3, L..C0(r2) # @__ModuleStringPool
+; AIX32-NEXT:    lwz r3, L..C0(r2) # @_MergedGlobals
 ; AIX32-NEXT:    stw r0, 72(r1)
-; AIX32-NEXT:    addi r3, r3, -29924
-; AIX32-NEXT:    addis r3, r3, 1
 ; AIX32-NEXT:    bl .callee[PR]
 ; AIX32-NEXT:    nop
 ; AIX32-NEXT:    addi r1, r1, 64
@@ -257,11 +255,8 @@ define dso_local signext i32 @str1() local_unnamed_addr #0 {
 ; AIX64:       # %bb.0: # %entry
 ; AIX64-NEXT:    mflr r0
 ; AIX64-NEXT:    stdu r1, -112(r1)
-; AIX64-NEXT:    li r4, 0
-; AIX64-NEXT:    ld r3, L..C0(r2) # @__ModuleStringPool
+; AIX64-NEXT:    ld r3, L..C0(r2) # @_MergedGlobals
 ; AIX64-NEXT:    std r0, 128(r1)
-; AIX64-NEXT:    ori r4, r4, 35612
-; AIX64-NEXT:    add r3, r3, r4
 ; AIX64-NEXT:    bl .callee[PR]
 ; AIX64-NEXT:    nop
 ; AIX64-NEXT:    addi r1, r1, 112
@@ -318,17 +313,16 @@ define dso_local signext i32 @array0() local_unnamed_addr #0 {
 ; AIX32:       # %bb.0: # %entry
 ; AIX32-NEXT:    mflr r0
 ; AIX32-NEXT:    stwu r1, -96(r1)
-; AIX32-NEXT:    lis r6, 0
-; AIX32-NEXT:    lwz r5, L..C0(r2) # @__ModuleStringPool
-; AIX32-NEXT:    li r4, 12
+; AIX32-NEXT:    lwz r6, L..C0(r2) # @_MergedGlobals
+; AIX32-NEXT:    li r7, 24
 ; AIX32-NEXT:    addi r3, r1, 64
+; AIX32-NEXT:    li r4, 12
 ; AIX32-NEXT:    stw r0, 104(r1)
-; AIX32-NEXT:    ori r7, r6, 35596
-; AIX32-NEXT:    rlwimi r4, r3, 0, 30, 27
-; AIX32-NEXT:    lxvw4x vs0, r5, r7
-; AIX32-NEXT:    stxvw4x vs0, 0, r4
-; AIX32-NEXT:    ori r4, r6, 35584
-; AIX32-NEXT:    lxvw4x vs0, r5, r4
+; AIX32-NEXT:    mr r5, r3
+; AIX32-NEXT:    lxvw4x vs0, r6, r7
+; AIX32-NEXT:    rlwimi r5, r4, 0, 28, 29
+; AIX32-NEXT:    stxvw4x vs0, 0, r5
+; AIX32-NEXT:    lxvw4x vs0, r6, r4
 ; AIX32-NEXT:    stxvw4x vs0, 0, r3
 ; AIX32-NEXT:    bl .calleeInt[PR]
 ; AIX32-NEXT:    nop
@@ -341,15 +335,14 @@ define dso_local signext i32 @array0() local_unnamed_addr #0 {
 ; AIX64:       # %bb.0: # %entry
 ; AIX64-NEXT:    mflr r0
 ; AIX64-NEXT:    stdu r1, -144(r1)
-; AIX64-NEXT:    li r3, 0
-; AIX64-NEXT:    ld r4, L..C0(r2) # @__ModuleStringPool
+; AIX64-NEXT:    ld r3, L..C0(r2) # @_MergedGlobals
+; AIX64-NEXT:    li r4, 24
 ; AIX64-NEXT:    std r0, 160(r1)
-; AIX64-NEXT:    ori r5, r3, 35596
-; AIX64-NEXT:    ori r3, r3, 35584
-; AIX64-NEXT:    lxvw4x vs0, r4, r5
-; AIX64-NEXT:    addi r5, r1, 124
-; AIX64-NEXT:    stxvw4x vs0, 0, r5
-; AIX64-NEXT:    lxvw4x vs0, r4, r3
+; AIX64-NEXT:    lxvw4x vs0, r3, r4
+; AIX64-NEXT:    addi r4, r1, 124
+; AIX64-NEXT:    stxvw4x vs0, 0, r4
+; AIX64-NEXT:    li r4, 12
+; AIX64-NEXT:    lxvw4x vs0, r3, r4
 ; AIX64-NEXT:    addi r3, r1, 112
 ; AIX64-NEXT:    stxvw4x vs0, 0, r3
 ; AIX64-NEXT:    bl .calleeInt[PR]
@@ -418,28 +411,35 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
 ; AIX32:       # %bb.0: # %entry
 ; AIX32-NEXT:    mflr r0
 ; AIX32-NEXT:    stwu r1, -176(r1)
-; AIX32-NEXT:    lwz r4, L..C0(r2) # @__ModuleStringPool
+; AIX32-NEXT:    lwz r4, L..C0(r2) # @_MergedGlobals
+; AIX32-NEXT:    li r3, 136
 ; AIX32-NEXT:    li r5, 96
-; AIX32-NEXT:    addi r3, r1, 64
 ; AIX32-NEXT:    stw r0, 184(r1)
-; AIX32-NEXT:    lxvw4x vs0, r4, r5
+; AIX32-NEXT:    lxvw4x vs0, r4, r3
+; AIX32-NEXT:    addi r3, r1, 64
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 80
+; AIX32-NEXT:    li r5, 120
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
+; AIX32-NEXT:    li r5, 80
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 64
+; AIX32-NEXT:    li r5, 104
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
+; AIX32-NEXT:    li r5, 64
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 48
+; AIX32-NEXT:    li r5, 88
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
+; AIX32-NEXT:    li r5, 48
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 32
+; AIX32-NEXT:    li r5, 72
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
+; AIX32-NEXT:    li r5, 32
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 16
+; AIX32-NEXT:    li r5, 56
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
+; AIX32-NEXT:    li r5, 16
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    lxvw4x vs0, 0, r4
+; AIX32-NEXT:    li r5, 40
+; AIX32-NEXT:    lxvw4x vs0, r4, r5
 ; AIX32-NEXT:    stxvw4x vs0, 0, r3
 ; AIX32-NEXT:    bl .calleeInt[PR]
 ; AIX32-NEXT:    nop
@@ -452,28 +452,35 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
 ; AIX64:       # %bb.0: # %entry
 ; AIX64-NEXT:    mflr r0
 ; AIX64-NEXT:    stdu r1, -224(r1)
-; AIX64-NEXT:    ld r4, L..C0(r2) # @__ModuleStringPool
+; AIX64-NEXT:    ld r4, L..C0(r2) # @_MergedGlobals
+; AIX64-NEXT:    li r3, 136
 ; AIX64-NEXT:    li r5, 96
-; AIX64-NEXT:    addi r3, r1, 112
 ; AIX64-NEXT:    std r0, 240(r1)
-; AIX64-NEXT:    lxvw4x vs0, r4, r5
+; AIX64-NEXT:    lxvw4x vs0, r4, r3
+; AIX64-NEXT:    addi r3, r1, 112
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    li r5, 80
+; AIX64-NEXT:    li r5, 120
 ; AIX64-NEXT:    lxvw4x vs0, r4, r5
+; AIX64-NEXT:    li r5, 80
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    li r5, 64
+; AIX64-NEXT:    li r5, 104
 ; AIX64-NEXT:    lxvw4x vs0, r4, r5
+; AIX64-NEXT:    li r5, 64
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    li r5, 48
+; AIX64-NEXT:    li r5, 88
 ; AIX64-NEXT:    lxvw4x vs0, r4, r5
+; AIX64-NEXT:    li r5, 48
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    li r5, 32
+; AIX64-NEXT:    li r5, 72
 ; AIX64-NEXT:    lxvw4x vs0, r4, r5
+; AIX64-NEXT:    li r5, 32
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    li r5, 16
+; AIX64-NEXT:    li r5, 56
 ; AIX64-NEXT:    lxvw4x vs0, r4, r5
+; AIX64-NEXT:    li r5, 16
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    lxvw4x vs0, 0, r4
+; AIX64-NEXT:    li r5, 40
+; AIX64-NEXT:    lxvw4x vs0, r4, r5
 ; AIX64-NEXT:    stxvw4x vs0, 0, r3
 ; AIX64-NEXT:    bl .calleeInt[PR]
 ; AIX64-NEXT:    nop
@@ -565,34 +572,34 @@ define dso_local signext i32 @array2() local_unnamed_addr #0 {
 ; AIX32:       # %bb.0: # %entry
 ; AIX32-NEXT:    mflr r0
 ; AIX32-NEXT:    stwu r1, -176(r1)
-; AIX32-NEXT:    lwz r4, L..C0(r2) # @__ModuleStringPool
-; AIX32-NEXT:    li r3, 208
+; AIX32-NEXT:    lwz r4, L..C0(r2) # @_MergedGlobals
+; AIX32-NEXT:    li r3, 248
 ; AIX32-NEXT:    li r5, 96
 ; AIX32-NEXT:    stw r0, 184(r1)
 ; AIX32-NEXT:    lxvw4x vs0, r4, r3
 ; AIX32-NEXT:    addi r3, r1, 64
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 192
+; AIX32-NEXT:    li r5, 232
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
 ; AIX32-NEXT:    li r5, 80
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 176
+; AIX32-NEXT:    li r5, 216
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
 ; AIX32-NEXT:    li r5, 64
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 160
+; AIX32-NEXT:    li r5, 200
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
 ; AIX32-NEXT:    li r5, 48
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 144
+; AIX32-NEXT:    li r5, 184
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
 ; AIX32-NEXT:    li r5, 32
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 128
+; AIX32-NEXT:    li r5, 168
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
 ; AIX32-NEXT:    li r5, 16
 ; AIX32-NEXT:    stxvw4x vs0, r3, r5
-; AIX32-NEXT:    li r5, 112
+; AIX32-NEXT:    li r5, 152
 ; AIX32-NEXT:    lxvw4x vs0, r4, r5
 ; AIX32-NEXT:    stxvw4x vs0, 0, r3
 ; AIX32-NEXT:    bl .calleeInt[PR]
@@ -606,34 +613,34 @@ define dso_local signext i32 @array2() local_unnamed_addr #0 {
 ; AIX64:       # %bb.0: # %entry
 ; AIX64-NEXT:    mflr r0
 ; AIX64-NEXT:    stdu r1, -224(r1)
-; AIX64-NEXT:    ld r4, L..C0(r2) # @__ModuleStringPool
-; AIX64-NEXT:    li r3, 208
+; AIX64-NEXT:    ld r4, L..C0(r2) # @_MergedGlobals
+; AIX64-NEXT:    li r3, 248
 ; AIX64-NEXT:    li r5, 96
 ; AIX64-NEXT:    std r0, 240(r1)
 ; AIX64-NEXT:    lxvw4x vs0, r4, r3
 ; AIX64-NEXT:    addi r3, r1, 112
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    li r5, 192
+; AIX64-NEXT:    li r5, 232
 ; AIX64-NEXT:    lxvw4x vs0, r4, r5
 ; AIX64-NEXT:    li r5, 80
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    li r5, 176
+; AIX64-NEXT:    li r5, 216
 ; AIX64-NEXT:    lxvw4x vs0, r4, r5
 ; AIX64-NEXT:    li r5, 64
 ; AIX64-NEXT:    stxvw4x vs0, r3, r5
-; AIX64-NEXT:    li r5, 160
+; AIX64-NEXT:    li r5, 200
 ; AIX64-NEXT:    lxvw4x vs0, r4, r5
 ; AIX64-NEXT:    l...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/113956


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