[llvm] [Analysis] isTriviallyVectorizable add vectorization for atan2 intrinsic (PR #113637)
Tex Riddell via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 28 16:06:58 PDT 2024
https://github.com/tex3d updated https://github.com/llvm/llvm-project/pull/113637
>From 139d5f9f96dc1653ab73104bd782631b38a4e69f Mon Sep 17 00:00:00 2001
From: Tex Riddell <texr at microsoft.com>
Date: Mon, 21 Oct 2024 16:44:01 -0700
Subject: [PATCH 1/2] [Analysis] isTriviallyVectorizable add vectorization for
atan2 intrinsic
This change is part of this proposal: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294
This returns true from isTriviallyVectorizable for llvm.atan2 intrinsic.
It also adds llvm atan2 intrinsic equivalents to VecFuncs.def for massv.
Part of: Implement the atan2 HLSL Function #70096.
---
llvm/include/llvm/Analysis/VecFuncs.def | 2 +
llvm/lib/Analysis/VectorUtils.cpp | 1 +
.../LoopVectorize/PowerPC/massv-calls.ll | 46 +++++++++++++++++++
3 files changed, 49 insertions(+)
diff --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def
index c4586894e3e490..6f0ba3f9e406c4 100644
--- a/llvm/include/llvm/Analysis/VecFuncs.def
+++ b/llvm/include/llvm/Analysis/VecFuncs.def
@@ -289,7 +289,9 @@ TLI_DEFINE_VECFUNC("acosf", "__acosf4", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("atan", "__atand2", FIXED(2), "_ZGV_LLVM_N2v")
TLI_DEFINE_VECFUNC("atanf", "__atanf4", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("atan2", "__atan2d2", FIXED(2), "_ZGV_LLVM_N2vv")
+TLI_DEFINE_VECFUNC("llvm.atan2.f64", "__atan2d2", FIXED(2), "_ZGV_LLVM_N2vv")
TLI_DEFINE_VECFUNC("atan2f", "__atan2f4", FIXED(4), "_ZGV_LLVM_N4vv")
+TLI_DEFINE_VECFUNC("llvm.atan2.f32", "__atan2f4", FIXED(4), "_ZGV_LLVM_N4vv")
// Hyperbolic Functions
TLI_DEFINE_VECFUNC("sinh", "__sinhd2", FIXED(2), "_ZGV_LLVM_N2v")
diff --git a/llvm/lib/Analysis/VectorUtils.cpp b/llvm/lib/Analysis/VectorUtils.cpp
index 37c443011719b6..f3ffddeb40d4b4 100644
--- a/llvm/lib/Analysis/VectorUtils.cpp
+++ b/llvm/lib/Analysis/VectorUtils.cpp
@@ -69,6 +69,7 @@ bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) {
case Intrinsic::asin:
case Intrinsic::acos:
case Intrinsic::atan:
+ case Intrinsic::atan2:
case Intrinsic::sin:
case Intrinsic::cos:
case Intrinsic::tan:
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
index ba6e85e2852952..badc67866d2bad 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
@@ -1244,6 +1244,52 @@ for.end:
ret void
}
+define void @atan2_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-LABEL: @atan2_f64_intrinsic(
+; CHECK: __atan2d2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.atan2.f64(double %conv, double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan2_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-LABEL: @atan2_f32_intrinsic(
+; CHECK: __atan2f4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.atan2.f32(float %conv, float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
define void @sinh_f64(ptr nocapture %varray) {
; CHECK-LABEL: @sinh_f64(
; CHECK: __sinhd2{{.*}}<2 x double>
>From 72efe7be8c161fd223db09877c832b0bb4950aaa Mon Sep 17 00:00:00 2001
From: Tex Riddell <texr at microsoft.com>
Date: Mon, 28 Oct 2024 13:18:03 -0700
Subject: [PATCH 2/2] Add atan2 to accelerate vector library and
hasOptimizedCodeGen
---
.../include/llvm/Analysis/TargetLibraryInfo.h | 1 +
llvm/include/llvm/Analysis/VecFuncs.def | 2 +
...ccelerate-vector-functions-inseltpoison.ll | 100 ++++++++++++++++++
.../AArch64/accelerate-vector-functions.ll | 100 ++++++++++++++++++
4 files changed, 203 insertions(+)
diff --git a/llvm/include/llvm/Analysis/TargetLibraryInfo.h b/llvm/include/llvm/Analysis/TargetLibraryInfo.h
index aeb8de3973f732..531ec1abfb3dfe 100644
--- a/llvm/include/llvm/Analysis/TargetLibraryInfo.h
+++ b/llvm/include/llvm/Analysis/TargetLibraryInfo.h
@@ -410,6 +410,7 @@ class TargetLibraryInfo {
// clang-format off
case LibFunc_acos: case LibFunc_acosf: case LibFunc_acosl:
case LibFunc_asin: case LibFunc_asinf: case LibFunc_asinl:
+ case LibFunc_atan2: case LibFunc_atan2f: case LibFunc_atan2l:
case LibFunc_atan: case LibFunc_atanf: case LibFunc_atanl:
case LibFunc_ceil: case LibFunc_ceilf: case LibFunc_ceill:
case LibFunc_copysign: case LibFunc_copysignf: case LibFunc_copysignl:
diff --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def
index 6f0ba3f9e406c4..7c7357e3efde17 100644
--- a/llvm/include/llvm/Analysis/VecFuncs.def
+++ b/llvm/include/llvm/Analysis/VecFuncs.def
@@ -56,6 +56,8 @@ TLI_DEFINE_VECFUNC("acosf", "vacosf", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.acos.f32", "vacosf", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("atanf", "vatanf", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.atan.f32", "vatanf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("atan2f", "vatan2f", FIXED(4), "_ZGV_LLVM_N4vv")
+TLI_DEFINE_VECFUNC("llvm.atan2.f32", "vatan2f", FIXED(4), "_ZGV_LLVM_N4vv")
// Hyperbolic Functions
TLI_DEFINE_VECFUNC("sinhf", "vsinhf", FIXED(4), "_ZGV_LLVM_N4v")
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
index 40ce26f8c4ed48..5ad976ebec2951 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
@@ -801,6 +801,106 @@ entry:
%vecins.3 = insertelement <4 x float> %vecins.2, float %4, i32 3
ret <4 x float> %vecins.3
}
+declare float @atan2f(float,float) readonly nounwind willreturn
+define <4 x float> @atan2_4x(ptr %a, ptr %b) {
+; CHECK-LABEL: @atan2_4x(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
+; CHECK-NEXT: [[BB:%.*]] = load <4 x float>, ptr [[B:%.*]], align 16
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @vatan2f(<4 x float> [[TMP0]], <4 x float> [[BB]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+; NOACCELERATE-LABEL: @atan2_4x(
+; NOACCELERATE-NEXT: entry:
+; NOACCELERATE-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
+; NOACCELERATE-NEXT: [[BB:%.*]] = load <4 x float>, ptr [[B:%.*]], align 16
+; NOACCELERATE-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
+; NOACCELERATE-NEXT: [[VECEXTB:%.*]] = extractelement <4 x float> [[BB]], i32 0
+; NOACCELERATE-NEXT: [[TMP1:%.*]] = tail call fast float @atan2f(float [[VECEXT]], float [[VECEXTB]])
+; NOACCELERATE-NEXT: [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
+; NOACCELERATE-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
+; NOACCELERATE-NEXT: [[VECEXTB_1:%.*]] = extractelement <4 x float> [[BB]], i32 1
+; NOACCELERATE-NEXT: [[TMP2:%.*]] = tail call fast float @atan2f(float [[VECEXT_1]], float [[VECEXTB_1]])
+; NOACCELERATE-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
+; NOACCELERATE-NEXT: [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
+; NOACCELERATE-NEXT: [[VECEXTB_2:%.*]] = extractelement <4 x float> [[BB]], i32 2
+; NOACCELERATE-NEXT: [[TMP3:%.*]] = tail call fast float @atan2f(float [[VECEXT_2]], float [[VECEXTB_2]])
+; NOACCELERATE-NEXT: [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
+; NOACCELERATE-NEXT: [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
+; NOACCELERATE-NEXT: [[VECEXTB_3:%.*]] = extractelement <4 x float> [[BB]], i32 3
+; NOACCELERATE-NEXT: [[TMP4:%.*]] = tail call fast float @atan2f(float [[VECEXT_3]], float [[VECEXTB_3]])
+; NOACCELERATE-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
+; NOACCELERATE-NEXT: ret <4 x float> [[VECINS_3]]
+;
+entry:
+ %0 = load <4 x float>, ptr %a, align 16
+ %bb = load <4 x float>, ptr %b, align 16
+ %vecext = extractelement <4 x float> %0, i32 0
+ %vecextb = extractelement <4 x float> %bb, i32 0
+ %1 = tail call fast float @atan2f(float %vecext, float %vecextb)
+ %vecins = insertelement <4 x float> poison, float %1, i32 0
+ %vecext.1 = extractelement <4 x float> %0, i32 1
+ %vecextb.1 = extractelement <4 x float> %bb, i32 1
+ %2 = tail call fast float @atan2f(float %vecext.1, float %vecextb.1)
+ %vecins.1 = insertelement <4 x float> %vecins, float %2, i32 1
+ %vecext.2 = extractelement <4 x float> %0, i32 2
+ %vecextb.2 = extractelement <4 x float> %bb, i32 2
+ %3 = tail call fast float @atan2f(float %vecext.2, float %vecextb.2)
+ %vecins.2 = insertelement <4 x float> %vecins.1, float %3, i32 2
+ %vecext.3 = extractelement <4 x float> %0, i32 3
+ %vecextb.3 = extractelement <4 x float> %bb, i32 3
+ %4 = tail call fast float @atan2f(float %vecext.3, float %vecextb.3)
+ %vecins.3 = insertelement <4 x float> %vecins.2, float %4, i32 3
+ ret <4 x float> %vecins.3
+}
+define <4 x float> @int_atan2_4x(ptr %a, ptr %b) {
+; CHECK-LABEL: @int_atan2_4x(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
+; CHECK-NEXT: [[BB:%.*]] = load <4 x float>, ptr [[B:%.*]], align 16
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @vatan2f(<4 x float> [[TMP0]], <4 x float> [[BB]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+; NOACCELERATE-LABEL: @int_atan2_4x(
+; NOACCELERATE-NEXT: entry:
+; NOACCELERATE-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
+; NOACCELERATE-NEXT: [[BB:%.*]] = load <4 x float>, ptr [[B:%.*]], align 16
+; NOACCELERATE-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
+; NOACCELERATE-NEXT: [[VECEXTB:%.*]] = extractelement <4 x float> [[BB]], i32 0
+; NOACCELERATE-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.atan2.f32(float [[VECEXT]], float [[VECEXTB]])
+; NOACCELERATE-NEXT: [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
+; NOACCELERATE-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
+; NOACCELERATE-NEXT: [[VECEXTB_1:%.*]] = extractelement <4 x float> [[BB]], i32 1
+; NOACCELERATE-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.atan2.f32(float [[VECEXT_1]], float [[VECEXTB_1]])
+; NOACCELERATE-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
+; NOACCELERATE-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
+; NOACCELERATE-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[BB]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
+; NOACCELERATE-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.atan2.v2f32(<2 x float> [[TMP3]], <2 x float> [[TMP4]])
+; NOACCELERATE-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; NOACCELERATE-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[VECINS_1]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+; NOACCELERATE-NEXT: ret <4 x float> [[VECINS_31]]
+;
+entry:
+ %0 = load <4 x float>, ptr %a, align 16
+ %bb = load <4 x float>, ptr %b, align 16
+ %vecext = extractelement <4 x float> %0, i32 0
+ %vecextb = extractelement <4 x float> %bb, i32 0
+ %1 = tail call fast float @llvm.atan2.f32(float %vecext, float %vecextb)
+ %vecins = insertelement <4 x float> poison, float %1, i32 0
+ %vecext.1 = extractelement <4 x float> %0, i32 1
+ %vecextb.1 = extractelement <4 x float> %bb, i32 1
+ %2 = tail call fast float @llvm.atan2.f32(float %vecext.1, float %vecextb.1)
+ %vecins.1 = insertelement <4 x float> %vecins, float %2, i32 1
+ %vecext.2 = extractelement <4 x float> %0, i32 2
+ %vecextb.2 = extractelement <4 x float> %bb, i32 2
+ %3 = tail call fast float @llvm.atan2.f32(float %vecext.2, float %vecextb.2)
+ %vecins.2 = insertelement <4 x float> %vecins.1, float %3, i32 2
+ %vecext.3 = extractelement <4 x float> %0, i32 3
+ %vecextb.3 = extractelement <4 x float> %bb, i32 3
+ %4 = tail call fast float @llvm.atan2.f32(float %vecext.3, float %vecextb.3)
+ %vecins.3 = insertelement <4 x float> %vecins.2, float %4, i32 3
+ ret <4 x float> %vecins.3
+}
declare float @sinhf(float) readonly nounwind willreturn
define <4 x float> @sinh_4x(ptr %a) {
; CHECK-LABEL: @sinh_4x(
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
index 285b85ed69be6b..7b78d12ef9a773 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
@@ -801,6 +801,106 @@ entry:
%vecins.3 = insertelement <4 x float> %vecins.2, float %4, i32 3
ret <4 x float> %vecins.3
}
+declare float @atan2f(float,float) readonly nounwind willreturn
+define <4 x float> @atan2_4x(ptr %a, ptr %b) {
+; CHECK-LABEL: @atan2_4x(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
+; CHECK-NEXT: [[BB:%.*]] = load <4 x float>, ptr [[B:%.*]], align 16
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @vatan2f(<4 x float> [[TMP0]], <4 x float> [[BB]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+; NOACCELERATE-LABEL: @atan2_4x(
+; NOACCELERATE-NEXT: entry:
+; NOACCELERATE-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
+; NOACCELERATE-NEXT: [[BB:%.*]] = load <4 x float>, ptr [[B:%.*]], align 16
+; NOACCELERATE-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
+; NOACCELERATE-NEXT: [[VECEXTB:%.*]] = extractelement <4 x float> [[BB]], i32 0
+; NOACCELERATE-NEXT: [[TMP1:%.*]] = tail call fast float @atan2f(float [[VECEXT]], float [[VECEXTB]])
+; NOACCELERATE-NEXT: [[VECINS:%.*]] = insertelement <4 x float> undef, float [[TMP1]], i32 0
+; NOACCELERATE-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
+; NOACCELERATE-NEXT: [[VECEXTB_1:%.*]] = extractelement <4 x float> [[BB]], i32 1
+; NOACCELERATE-NEXT: [[TMP2:%.*]] = tail call fast float @atan2f(float [[VECEXT_1]], float [[VECEXTB_1]])
+; NOACCELERATE-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
+; NOACCELERATE-NEXT: [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
+; NOACCELERATE-NEXT: [[VECEXTB_2:%.*]] = extractelement <4 x float> [[BB]], i32 2
+; NOACCELERATE-NEXT: [[TMP3:%.*]] = tail call fast float @atan2f(float [[VECEXT_2]], float [[VECEXTB_2]])
+; NOACCELERATE-NEXT: [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
+; NOACCELERATE-NEXT: [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
+; NOACCELERATE-NEXT: [[VECEXTB_3:%.*]] = extractelement <4 x float> [[BB]], i32 3
+; NOACCELERATE-NEXT: [[TMP4:%.*]] = tail call fast float @atan2f(float [[VECEXT_3]], float [[VECEXTB_3]])
+; NOACCELERATE-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
+; NOACCELERATE-NEXT: ret <4 x float> [[VECINS_3]]
+;
+entry:
+ %0 = load <4 x float>, ptr %a, align 16
+ %bb = load <4 x float>, ptr %b, align 16
+ %vecext = extractelement <4 x float> %0, i32 0
+ %vecextb = extractelement <4 x float> %bb, i32 0
+ %1 = tail call fast float @atan2f(float %vecext, float %vecextb)
+ %vecins = insertelement <4 x float> undef, float %1, i32 0
+ %vecext.1 = extractelement <4 x float> %0, i32 1
+ %vecextb.1 = extractelement <4 x float> %bb, i32 1
+ %2 = tail call fast float @atan2f(float %vecext.1, float %vecextb.1)
+ %vecins.1 = insertelement <4 x float> %vecins, float %2, i32 1
+ %vecext.2 = extractelement <4 x float> %0, i32 2
+ %vecextb.2 = extractelement <4 x float> %bb, i32 2
+ %3 = tail call fast float @atan2f(float %vecext.2, float %vecextb.2)
+ %vecins.2 = insertelement <4 x float> %vecins.1, float %3, i32 2
+ %vecext.3 = extractelement <4 x float> %0, i32 3
+ %vecextb.3 = extractelement <4 x float> %bb, i32 3
+ %4 = tail call fast float @atan2f(float %vecext.3, float %vecextb.3)
+ %vecins.3 = insertelement <4 x float> %vecins.2, float %4, i32 3
+ ret <4 x float> %vecins.3
+}
+define <4 x float> @int_atan2_4x(ptr %a, ptr %b) {
+; CHECK-LABEL: @int_atan2_4x(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
+; CHECK-NEXT: [[BB:%.*]] = load <4 x float>, ptr [[B:%.*]], align 16
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @vatan2f(<4 x float> [[TMP0]], <4 x float> [[BB]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+; NOACCELERATE-LABEL: @int_atan2_4x(
+; NOACCELERATE-NEXT: entry:
+; NOACCELERATE-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A:%.*]], align 16
+; NOACCELERATE-NEXT: [[BB:%.*]] = load <4 x float>, ptr [[B:%.*]], align 16
+; NOACCELERATE-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
+; NOACCELERATE-NEXT: [[VECEXTB:%.*]] = extractelement <4 x float> [[BB]], i32 0
+; NOACCELERATE-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.atan2.f32(float [[VECEXT]], float [[VECEXTB]])
+; NOACCELERATE-NEXT: [[VECINS:%.*]] = insertelement <4 x float> undef, float [[TMP1]], i32 0
+; NOACCELERATE-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
+; NOACCELERATE-NEXT: [[VECEXTB_1:%.*]] = extractelement <4 x float> [[BB]], i32 1
+; NOACCELERATE-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.atan2.f32(float [[VECEXT_1]], float [[VECEXTB_1]])
+; NOACCELERATE-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
+; NOACCELERATE-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
+; NOACCELERATE-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[BB]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
+; NOACCELERATE-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.atan2.v2f32(<2 x float> [[TMP3]], <2 x float> [[TMP4]])
+; NOACCELERATE-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; NOACCELERATE-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[VECINS_1]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+; NOACCELERATE-NEXT: ret <4 x float> [[VECINS_31]]
+;
+entry:
+ %0 = load <4 x float>, ptr %a, align 16
+ %bb = load <4 x float>, ptr %b, align 16
+ %vecext = extractelement <4 x float> %0, i32 0
+ %vecextb = extractelement <4 x float> %bb, i32 0
+ %1 = tail call fast float @llvm.atan2.f32(float %vecext, float %vecextb)
+ %vecins = insertelement <4 x float> undef, float %1, i32 0
+ %vecext.1 = extractelement <4 x float> %0, i32 1
+ %vecextb.1 = extractelement <4 x float> %bb, i32 1
+ %2 = tail call fast float @llvm.atan2.f32(float %vecext.1, float %vecextb.1)
+ %vecins.1 = insertelement <4 x float> %vecins, float %2, i32 1
+ %vecext.2 = extractelement <4 x float> %0, i32 2
+ %vecextb.2 = extractelement <4 x float> %bb, i32 2
+ %3 = tail call fast float @llvm.atan2.f32(float %vecext.2, float %vecextb.2)
+ %vecins.2 = insertelement <4 x float> %vecins.1, float %3, i32 2
+ %vecext.3 = extractelement <4 x float> %0, i32 3
+ %vecextb.3 = extractelement <4 x float> %bb, i32 3
+ %4 = tail call fast float @llvm.atan2.f32(float %vecext.3, float %vecextb.3)
+ %vecins.3 = insertelement <4 x float> %vecins.2, float %4, i32 3
+ ret <4 x float> %vecins.3
+}
declare float @sinhf(float) readonly nounwind willreturn
define <4 x float> @sinh_4x(ptr %a) {
; CHECK-LABEL: @sinh_4x(
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