[llvm] [RISCV] Add missing hasPostISelHook = 1 to vector pseudos that might read FRM. (PR #114186)

[Philip Reames via llvm-commits]

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@@ -2617,6 +2617,13 @@ bool RISCVInstrInfo::verifyInstruction(const MachineInstr &MI,
     }
   }
 
+  if (int Idx = RISCVII::getFRMOpNum(Desc);
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preames wrote:

This is checking the pseudo form, is there any way that we can add an additional assert which checks the pseudo against the underlying instruction?  The underlying instruction needs to have the use of FRM too doesn't it?

(Possible follow up)

https://github.com/llvm/llvm-project/pull/114186