[llvm] [GlobalISel][AArch64] Legalize G_SPLAT_VECTOR (PR #114006)

[David Green via llvm-commits]

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In-Reply-To: <llvm.org/llvm/llvm-project/pull/114006 at github.com>


davemgreen wrote:

Oh I see - it is related to the legal types in SDAG, and the i8/i16 being promoted to i32. We usually have to widen the variable in regbankselect / pre-select, to make sure the patterns can trigger. The other option might be to do it during legalization, but that might not handle h/b fp registers correctly.

Could you change the tests to something that won't eventually turn into another instruction (addimm in this case)? Either by changing the opcode (although that still feels more complex than it needs to be) or just returning the splat value. We will have to start going through extract_elements and adding combines so more will work properly and we can rely on better tests.

https://github.com/llvm/llvm-project/pull/114006