[llvm] [RISCV] Set a barrier between mask producer and user of V0 (PR #114012)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 29 15:06:14 PDT 2024
https://github.com/michaelmaitland commented:
I want to make sure I understand what is going on in this patch.
Prior to this patch, we should have data dependency edges between an instruction that consumes the mask and the instruction that produces it. This patch on the other hand adds artificial edges between v0 mask producer instruction and the previous consumer of a v0 mask.
We might have a program like this:
```
livein: v0
v0_a = produce v0
v0_b = consume_and_produce v0
c = consume v0
```
Without this patch, we have two data dependency edges: `(v0_b, v0_a)` and `(c, v0_b)`. With this patch, I think are adding an artificial edge from `(v0_a, v0_b)`.
Can you help me understand how this leads to making live intervals of mask registers longer?
https://github.com/llvm/llvm-project/pull/114012
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