[llvm] [RISCV] Remove redundant SDNode creation for same reg class value (PR #114348)

[Brandon Wu via llvm-commits]

4vtomat wrote:

We still need this "TUPLE_INSERT" since it's possible that `ValueVT` and `PartVT` has different type but has same register class such as fractional LMUL and LMUL = 1.

https://github.com/llvm/llvm-project/pull/114348